TEXAS INSTRUMENTS TPS74401 Technical data

TPS74401

TPS74401

TPS74401

GND

EN

FB

IN PG

SS

OUT

V

IN

V

OUT

V

PG

R

1

R

2

R

3

C

OUT

Optional

C

IN

1 Fm

C

SS

V

BIAS

C

BIAS

1 Fm

BIAS

1V/div

500mV/div

Time(1ms/div)

C =0 FSSm

C =0.001 FSSm

C =0.0047 FSSm

V

OUT

V

EN

0V

1.1V

TPS74401

www.ti.com

3.0A Ultra-LDO with Programmable Soft-Start

1

FEATURES

2

• Soft-Start (SS) Pin Provides a Linear Startup

with Ramp Time Set by External Capacitor

• 1% Accuracy Over Line, Load, and

Temperature

• Supports Input Voltages as Low as 0.9V with

External Bias Supply

• Adjustable Output (0.8V to 3.6V)

• Ultra-Low Dropout: 115mV at 3.0A (typ)

• Stable with Any or No Output Capacitor

• Excellent Transient Response

• Available in 5mm × 5mm × 1mm QFN and

DDPAK-7 Packages

• Open-Drain Power-Good (QFN only)

• Active High Enable

APPLICATIONS

• FPGA Applications

• DSP Core and I/O Voltages

• Post-Regulation Applications

• Applications with Special Start-Up Time or

Sequencing Requirements

• Hot-Swap and Inrush Controls

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

DESCRIPTION

The TPS74401 low-dropout (LDO) linear regulator
provides an easy-to-use robust power management
solution for a wide variety of applications.
User-programmable soft-start minimizes stress on the
input power source by reducing capacitive inrush
current on start-up. The soft-start is monotonic and
well-suited for powering many different types of
processors and ASICs. The enable input and
power-good output allow easy sequencing with
external regulators. This complete flexibility permits
the user to configure a solution that will meet the
sequencing requirements of FPGAs, DSPs, and other
applications with specific start-up requirements.

A precision reference and error amplifier deliver 1%
accuracy over load, line, temperature, and process.
Each LDO is stable with low-cost ceramic output
capacitors and the device is fully specified from
– 40 ° C to +125 ° C. The TPS74401 is offered in a small
(5mm × 5mm) QFN package, yielding a highly
compact total solution size. For applications that
require additional power dissipation, the DDPAK
(KTW) package is also available.

Figure 1. Typical Application Circuit

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

2 All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Figure 2. Turn-On Response

Copyright © 2005 – 2008, Texas Instruments Incorporated

www.ti.com

TPS74401

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

PRODUCT V

TPS744 xxyyyz XX is nominal output voltage (for example, 12 = 1.2V, 15 = 1.5V, 01 = Adjustable).

(1)

(2)

OUT

(3)

YYY is package designator.
Z is package quantity.

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com .

(2) Output voltages from 0.9V to 1.5V in 50mV increments and 1.5V to 3.6V in 100mV increments are available through the use of

innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability.

(3) For fixed 0.8V operation, tie FB to OUT.

ABSOLUTE MAXIMUM RATINGS

(1)

At TJ= – 40 ° C to +125 ° C, unless otherwise noted. All voltages are with respect to GND.

TPS74401 UNIT

VIN, V

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these conditions is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.

Input voltage range – 0.3 to +6 V

BIAS

V

Enable voltage range – 0.3 to +6 V

EN

V

Power-good voltage range – 0.3 to +6 V

PG

IPGPG sink current 0 to +1.5 mA

V

SS pin voltage range – 0.3 to +6 V

SS

V

Feedback pin voltage range – 0.3 to +6 V

FB

V

Output voltage range – 0.3 to VIN+ 0.3 V

OUT

I

Maximum output current Internally limited

OUT

Output short circuit duration Indefinite

P

Continuous total power dissipation See Dissipation Ratings Table

DISS

TJOperating junction temperature range – 40 to +125 ° C

T

Storage junction temperature range – 55 to +150 ° C

STG

DISSIPATION RATINGS

PACKAGE θ

RGW (QFN)

KTW (DDPAK)

(1)

(2)

JA

36.5 ° C/W 4.05 ° C/W 2.74W 27.4mW/ ° C

18.8 ° C/W 2.32 ° C/W 5.32W 53.2mW/ ° C

θ

JC

(1) See Figure 33 for PCB layout description.
(2) See Figure 36 for PCB layout description.

2 Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated

Product Folder Link(s): TPS74401

TA< +25 ° C DERATING FACTOR

POWER RATING ABOVE TA= +25 ° C

www.ti.com

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

ELECTRICAL CHARACTERISTICS

At V

= 1.1V, V

EN

unless otherwise noted. Typical values are at TJ= +25 ° C.

V

IN

V

BIAS

V

REF

V

OUT

V

/V

OUT

IN

V

/I

OUT

OUT

V

DO

ICLCurrent limit A

I

BIAS

I

SHDN

IFBFeedback pin current

(4)

PSRR

Noise Output noise voltage 16 × V

V

TRAN

t

STR

ISSSoft-start charging current V

V

EN, HI

V

EN, LO

V

EN, HYS

V

EN, DG

IENEnable pin current V
V

IT

V

HYS

V

PG, LO

I

PG, LKG

T

J

= V

OUT

+ 0.3V, C

IN

= C

IN

BIAS

= 0.1 µ F, C

OUT

= 10 µ F, I

OUT

= 50mA, V

BIAS

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input voltage range V

OUT

Bias pin voltage range 2.375 5.25 V
Internal reference (Adj.) TJ= +25 ° C 0.796 0.8 0.804 V
Output voltage range VIN= 5V, I
Accuracy

Line regulation %/V

Load regulation

VINdropout voltage

V

Bias pin current I
Shutdown supply current

(V

Power-supply rejection
(V

Power-supply rejection
(V

(1)

2.97V ≤ V
V

OUT (NOM)

V

OUT (NOM)

0mA ≤ I
50mA ≤ I
I

= 3.0A, V

(2)

dropout voltage

BIAS

)

IN

(2)

(3)

OUT

I

= 3.0A, V

OUT

DDPAK
I

= 3.0A, VIN= V

OUT

V

= 80% × V

OUT

V

= 80% × V

OUT

= 0mA to 3.0A 2 4 mA

OUT

V

≤ 0.4V 1 100 µ A

EN

I

= 50mA to 3.0A – 250 95 250 nA

OUT

1kHz, I

to V

IN

)

OUT

800kHz, I
V

= 1.5V

OUT

1kHz, I

to V

BIAS

)

OUT

800kHz, I
V

= 1.5V

OUT

100Hz to 100kHz, I
C

= 0.001 µ F

SS

%V

droop during load

OUT

transient
Minimum startup time I

I

= 100mA to 3.0A at 1A/ µ s, C

OUT

= 1.5A, C

OUT

= 0.4V 0.5 0.73 1 µ A

SS

= 1.5A, V

OUT

≤ 5.25V, 50mA ≤ I

BIAS

+ 0.3 ≤ V
+ 0.3 ≤ V

≤ 50mA 0.013 %/mA

OUT

≤ 3.0A 0.03 %/A

OUT

– V

BIAS

– V

BIAS

BIAS
OUT (NOM)
OUT (NOM)

= 1.5A, VIN= 1.8V, V

OUT

= 1.5A, VIN= 1.8V,

OUT

= 1.5A, VIN= 1.8V, V

OUT

= 1.5A, VIN= 1.8V,

OUT

OUT

= open 100 µ s

SS

= 5V V

BIAS

≤ 3.0A – 1 ± 0.2 +1 %

OUT

≤ 5.5V, QFN 0.0005 0.05

IN

≤ 5.5V, DDPAK 0.0005 0.06

IN

OUT (NOM)
OUT (NOM)

≥ 1.62V, QFN 115 195
≥ 1.62V,

, QFN 3.8 6.0
, DDPAK 3.5 6.0

= 1.5V 73

OUT

= 1.5V 62

OUT

= 1.5A,

= 0 µ F 4 %V

OUT

Enable input high level 1.1 5.5 V
Enable input low level 0 0.4 V
Enable pin hysteresis 50 mV
Enable pin deglitch time 20 µ s

= 5V 0.1 1 µ A

EN

PG trip threshold V

decreasing 86.5 90 93.5 %V

OUT

PG trip hysteresis 3 %V
PG output low voltage IPG= 1mA (sinking), V
PG leakage current V

PG

= 5.25V, V

OUT

Operating junction
temperature

< V

OUT

IT

> V

IT

– 40 +125 ° C

TPS74401

= 5.0V, and TJ= – 40 ° C to +125 ° C,

TPS74401

+ V

DO

REF

120 240

42

50

OUT

0.03 1 µ A

5.5 V

3.6 V

1.62 V

0.3 V

mV

dB

dB

µ V

RMS

OUT

OUT
OUT

(1) Adjustable devices tested at 0.8V; external resistor tolerance is not taken into account.
(2) Dropout is defined as the voltage from the input to V
(3) IFBcurrent flow is out of the device.

when V

OUT

is 2% below nominal.

OUT

(4) See Figure 10 to Figure 13 for PSRR at different conditions.

Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Link(s): TPS74401

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Thermal

Limit

Soft-Start

Discharge

OUT

V

OUT

FB

PG

IN

BIAS

SS

EN

Hysteresis

andDe-Glitch

Current

Limit

UVLO

0.73 Am

0.8V
Reference

0.9 ´ V

REF

GND

C

SS

R

1

R

2

V =0.8x( )

OUT

1+

R

1

R

2

TPS74401

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

ELECTRICAL CHARACTERISTICS (continued)

At V

= 1.1V, V

EN

unless otherwise noted. Typical values are at TJ= +25 ° C.

T

SD

= V

OUT

+ 0.3V, C

IN

= C

IN

BIAS

= 0.1 µ F, C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Thermal shutdown
temperature

Shutdown, temperature increasing +155
Reset, temperature decreasing +140

BLOCK DIAGRAM

OUT

= 10 µ F, I

OUT

= 50mA, V

= 5.0V, and TJ= – 40 ° C to +125 ° C,

BIAS

TPS74401

° C

Table 1. Standard 1% Resistor Values for Programming the Output Voltage

R1(k Ω ) R2(k Ω ) V

(1)

(V)

OUT

Short Open 0.8

0.619 4.99 0.9

1.13 4.53 1.0

1.37 4.42 1.05

1.87 4.99 1.1

2.49 4.99 1.2

4.12 4.75 1.5

3.57 2.87 1.8

3.57 1.69 2.5

3.57 1.15 3.3

(1) V

= 0.8 × (1 + R1/R2)

OUT

4 Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated

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5 5QFN(RGW)´

Package TopView¾

IN

IN

IN

PG

BIAS

OUT

OUT

OUT

NC

FB

TPS74401

IN

EN

11

GND

12

NC

13

NC

14

SS

15

6

7

8

9

10

20

19

18

17

16

5

NC4

NC3

NC2

OUT1

GND

7-Lead

DDPAK(KTW)

Surface-Mount

OUT

GND

BIAS

IN

FB

SS

1 2 3 4

5

6EN7

Table 2. Standard Capacitor Values for Programming the Soft-Start Time

(1) tSS(s) = 0.8 × CSS(F)/7.3 × 10

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

C

SS

SOFT-START TIME

Open 0.1ms

470pF 0.5ms
1000pF 1ms
4700pF 5ms

0.01 µ F 10ms

0.015 µ F 16ms

– 7

TPS74401

(1)

PIN DESCRIPTIONS

NAME KTW (DDPAK) RGW (QFN) DESCRIPTION

IN 5 5 – 8 Unregulated input to the device.
EN 7 11
SS 1 15 Soft-Start pin. A capacitor connected on this pin to ground sets the start-up

BIAS 6 10 Bias input voltage for error amplifier, reference, and internal control circuits.

PG N/A 9 low-impedance state. A pull-up resistor from 10k Ω to 1M Ω should be connected

FB 2 16

OUT 3 1, 18 – 20 Regulated output voltage. No capacitor is required on this pin for stability.

NC N/A 2 – 4, 13, 14, 17

GND 4 12 Ground

PAD/TAB Should be soldered to the ground plane for increased thermal performance.

Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5

Enable pin. Driving this pin high enables the regulator. Driving this pin low puts
the regulator into shutdown mode. This pin must not be left floating.

time. If this pin is left floating, the regulator output soft-start ramp time is
typically 100 µ s.

Power-Good (PG) is an open-drain, active-high output that indicates the status
of V

. When V

OUT

high-impedance state. When V

exceeds the PG trip threshold, the PG pin goes into a

OUT

is below this threshold the pin is driven to a

OUT

from this pin to a supply up to 5.5V. The supply can be higher than the input
voltage. Alternatively, the PG pin can be left floating if output monitoring is not
necessary.

This pin is the feedback connection to the center tap of an external resistor
divider network that sets the output voltage. This pin must not be left floating.

No connection. This pin can be left floating or connected to GND to allow better
thermal contact to the top-side plane.

Product Folder Link(s): TPS74401

www.ti.com

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

-0.1
0

10 20 30 40

ChangeinV (%)

OUT

I (mA)

OUT

50

+125 C°

+25 C°

-40 C°

ReferredtoI =50mA

OUT

0.050

0.025

0

-0.025

-0.050

-0.075

-0.100

-0.125

-0.150

50

500 1000 1500 2000 2500

ChangeinV (%)

OUT

I (mA)

OUT

3000

+125 C°

+25 C°

- °40 C

ReferredtoI =50mA

OUT

0.05

0.04

0.03

0.02

0.01

0

-0.01

-0.02

-0.03

-0.04

-0.05

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

ChangeinV (%)

OUT

V V-

IN OUT

(V)

4.5

T = 40- °JC

TJ=+25°C

TJ=+125°C

0

500 1000 1500 2000 2500

I (mA)

OUT

3000

200

150

100

50

0

DropoutV

oltage(mV)

+125 C°

+25 C°

- °40 C

300

250

200

150

100

50

0

0.9

1.4 1.9 2.4 2.9 3.4

DropoutV

oltage(mV)

V V-

BIAS OUT

(V)

3.9

+125 C°

+25 C°

- °40 C

I =3.0A

OUT

200

180

160

140

120

100

80

60

40

20

0

0.9

1.4 1.9 2.4 2.9 3.4

DropoutVoltage(mV)

V V-

BIAS OUT

(V)

3.9

+125 C°

+25 C°

-40°C

I =1.5A

OUT

TPS74401

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

At TJ= +25 ° C, V

OUT

= 1.5V, V

= V

IN

LOAD REGULATION LOAD REGULATION

Figure 3. Figure 4.

TYPICAL CHARACTERISTICS

OUT(TYP)

+ 0.3V, V

C

= 10 µ F, unless otherwise noted.

OUT

BIAS

= 3.3V, I

OUT

= 50mA, C

IN

= 1 µ F, C

= 1 µ F, C

BIAS

SS

= 0.01 µ F, and

LINE REGULATION I

AND TEMPERATURE (TJ)

OUT

Figure 5. Figure 6.

VINDROPOUT VOLTAGE vs VINDROPOUT VOLTAGE vs

V

– V

VINDROPOUT VOLTAGE vs

BIAS

AND TEMPERATURE (TJ) V

OUT

– V

BIAS

AND TEMPERATURE (TJ)

OUT

6 Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated

Figure 7. Figure 8.

Product Folder Link(s): TPS74401

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1400

1300

1200

1100

1000

900

800

700

600

500

0

500 1000 1500 2000 2500

DropoutVoltage(mV)

I (mA)

OUT

3000

+125 C°

+25 C°

-40 C°

V =V

IN BIAS

80

70

60

50

40

30

20

10

0

10

100 1k 10k 100k 1M

Power-SupplyRejectionRatio(dB)

Frequency(Hz)

10M

I =3.0A

OUT

100

90

80

70

60

50

40

30

20

10

0

10

100 1k 10k 100k 1M

Power

-SupplyRejectionRatio(dB)

Frequency(Hz)

10M

V =1.8,V =1.5V

IN OUT OUT

,I =1.5A

C =0 F

OUT

m

C =10 F

OUT

m

C =100 F

OUT

m

100

90

80

70

60

50

40

30

20

10

0

10

100 1k 10k 100k 1M

Power

-SupplyRejectionRatio(dB)

Frequency(Hz)

10M

V =1.8,V =1.5V

IN OUT OUT

,I =100mA

C =10 F

OUT

m

C =100 F

OUT

m

C =0 F

OUT

m

100

90

80

70

60

50

40

30

20

10

0

10

100 1k 10k 100k 1M

Power

-SupplyRejectionRatio(dB)

Frequency(Hz)

10M

V =1.8,V =1.5V

IN OUT OUT

,I =3A

C =100 F

OUT

m

C =0 F

OUT

m

C =10 F

OUT

m

90

80

70

60

50

40

30

20

10

0

0

0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25

Power-SupplyRejectionRatio(dB)

V V-

IN OUT

(V)

2.50

1kHz

100kHz

300kHz

700kHz

C =22 F
I =1.5A

m

OUT

OUT

At TJ= +25 ° C, V
C

= 10 µ F, unless otherwise noted.

OUT

TYPICAL CHARACTERISTICS (continued)

= 1.5V, V

OUT

V

BIAS

I

AND TEMPERATURE (TJ) V

OUT

= V

IN

OUT(TYP)

DROPOUT VOLTAGE vs

+ 0.3V, V

BIAS

= 3.3V, I

OUT

= 50mA, C

TPS74401

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

IN

= 1 µ F, C

BIAS

= 1 µ F, C

BIAS

SS

= 0.01 µ F, and

PSRR vs FREQUENCY

Figure 9. Figure 10.

VINPSRR vs FREQUENCY VINPSRR vs FREQUENCY

Figure 11. Figure 12.

VINPSRR vs FREQUENCY VINPSRR vs V

– V

IN

OUT

Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 7

Figure 13. Figure 14.

Product Folder Link(s): TPS74401

www.ti.com

1

0.1

0.01

100

1k 10k

OutputSpectralNoiseDensity(

mV/

Ö )Hz

Frequency(Hz)

100k

C =1nF

SS

C =0nF

SS

C =10nF

SS

I =3A

OUT

V =1.1V

OUT

1

0.1

0.01

100

1k 10k

OutputSpectralNoiseDensity( V/

)

m Ö

Hz

Frequency(Hz)

100k

V =3.3V

OUT

V =2.5V

OUT

V =1.5V

OUT

V =1.1V

OUT

V =0.8V

OUT

V :V +1.62V

BIAS OUT

I :3A

OUT

C :1 F(Ceramic)m

IN

C :1 F(Ceramic)m

OUT

R ,R :(seeTable1)

1 2

2.85

2.65

2.45

2.25

2.05

1.85

1.65

1.45

1.25
0

500 1000 1500 2000 2500

BiasCurrent(mA)

I (mA)

OUT

3000

+125 C°

+25 C°

- °40 C

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

2.0

2.5 3.0 3.5 4.0 4.5

BiasCurrent(mA)

V (V)

BIAS

5.0

T =J+125 C°

T =+25 C°

J

T =J- °40 C

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

-40

-20 0 20 40 60 80 100

BiasCurrent( A)m

120

V =2.375V

BIAS

V =5.5V

BIAS

TPS74401

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

At TJ= +25 ° C, V
C

= 10 µ F, unless otherwise noted.

OUT

OUT

= 1.5V, V

= V

IN

NOISE SPECTRAL DENSITY NOISE SPECTRAL DENSITY

Figure 15. Figure 16.

TYPICAL CHARACTERISTICS (continued)

OUT(TYP)

+ 0.3V, V

BIAS

= 3.3V, I

OUT

= 50mA, C

IN

= 1 µ F, C

= 1 µ F, C

BIAS

SS

= 0.01 µ F, and

I

vs I

BIAS

AND TEMPERATURE I

OUT

vs V

BIAS

AND V

BIAS

OUT

Figure 17. Figure 18.

I

SHUTDOWN vs TEMPERATURE

BIAS

8 Submit Documentation Feedback Copyright © 2005 – 2008, Texas Instruments Incorporated

Figure 19.

Product Folder Link(s): TPS74401

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765

750

735

720

705

690

675

-40

-20 0 20 40 60 80 100 120

I

(nA)

SS

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

V Low-LevelPGVoltage(V)

OL

0

2 4

6 8 10

12

PGCurrent(mA)

At TJ= +25 ° C, V
C

= 10 µ F, unless otherwise noted.

OUT

OUT

= 1.5V, V

TYPICAL CHARACTERISTICS (continued)

= V

IN

OUT(TYP)

+ 0.3V, V

BIAS

= 3.3V, I

OUT

= 50mA, C

TPS74401

SBVS066H – DECEMBER 2005 – REVISED MARCH 2008

IN

= 1 µ F, C

= 1 µ F, C

BIAS

SS

= 0.01 µ F, and

SOFT-START CHARGING CURRENT (ISS)

vs TEMPERATURE LOW-LEVEL PG VOLTAGE vs PG CURRENT

Figure 20. Figure 21.

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