TEXAS INSTRUMENTS TPS65160, TPS65160A Technical data

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COMP

VINB

FREQ

EN1
EN2
DRN
FBN
REF
PGND
PGND

SW
SW

AVIN

FB

GND

OS

DRP

FBP

Boot

SWB

NC

DLY1

TPS65160

SS

VINB

GD

FBB

DLY2

SUP

12 V

C1

2*22 F

C3

1 F

C16

1 F

C6

0.47 FD2

D3

VGL

−5 V/50 mA

R3
620 k

R4

150 k

C8
220 nF

C7

470 F

C9

22 nF

C10
10 nF

C11

10 nF

C17
22 nF

R8

1.2 k

R7
2 k

D6
SL22

L2

15 H

Cb
100 nF

R6
56 k

C14
10 nF

C12
2*22 F

3.3 V/1.5 A

C13

0.47 F

R5

1 M

VGH

23 V/50 mA

D5

D4

GD

0.47 F

C5

C15

470 nF

R2
56 k

R1
680 k

C2

3* 22 F

C4

22 pF

D1

SL22

L1

10 H

15 V/1.5 A

8
12
20

21
22

16

9
11
13
24

6

7
28
25

4
5
1
3
23
27
10
14
17
18
19
15
2

26

V

IN

V

LOGIC

V

S

BIAS POWER SUPPLY FOR TV AND MONITOR TFT LCD PANELS

TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

FEATURES

• Gate Drive Signal to Drive External MOSFET

• 8-V to 14-V Input Voltage Range • Internal and Adjustable Soft Start

• V

Output Voltage Range up to 20 V • Short-Circuit Protection

S

• 1% Accurate Boost Converter With 2.8-A • 23-V (TPS65160) Overvoltage Protection

Switch Current

• 1.5% accurate 1.8-A Step-Down Converter

• 500-kHz/750-kHz Fixed Switching Frequency

• 19.5-V (TPS65160A) Overvoltage Protection

• Thermal Shutdown

• Available in TSSOP-28 Package

• Negative Charge Pump Driver for VGL

• Positive Charge Pump Driver for VGH

• Adjustable Sequencing for VGL, VGH

APPLICATIONS

• TFT LCD Displays for Monitor and LCD TV

DESCRIPTION

The TPS65160 offers a compact power supply solution to provide all four voltages required by thin-film transistor
(TFT) LCD panel. With its high current capabilities, the device is ideal for large screen monitor panels and LCD
TV applications.

TYPICAL APPLICATION

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2005, Texas Instruments Incorporated

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TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

DESCRIPTION (CONTINUED)

The device can be powered directly from a 12-V input voltage generating the bias voltages VGH and VGL, as
well as the source voltage V
provide the source voltage V
and a negative charge-pump driver provide adjustable regulated output voltages VGL and VGH to bias the TFT.
Both boost and step-down converters, as well as the charge-pump driver, operate with a fixed switching
frequency of 500 kHz or 750 kHz, selectable by the FREQ pin. The TPS65160 includes adjustable power-on
sequencing. The device includes safety features like overvoltage protection of the boost converter and
short-circuit protection of the buck converter, as well as thermal shutdown. Additionally, the device incorporates a
gate drive signal to control an isolation MOSFET switch in series with V
the end of this data sheet.

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.

and logic voltage for the LCD panels. The device consists of a boost converter to

S

and a step-down converter to provide the logic voltage for the system. A positive

S

or VGH. See the application circuits at

S

ORDERING INFORMATION

T

A

–40 ° C to 85 ° C

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com .

(2) The PWP package is available taped and reeled. Add R-suffix to the device type (TPS65160PWPR) to order the device taped and

reeled. The TPS65160PWPR package has quantities of 2000 devices per reel. Without suffix, the TPS65160PWP is shipped in tubes
with 50 devices per tube.

UVLO Overvoltage protection ORDERING PACKAGE

(typ) Vs (typ) MARKING

6 V 23 V TPS65160PWP TSSOP28 (PWP) TPS65160
8 V 19.5 V TPS65160APWP TSSOP28 (PWP) TPS65160A

(1)

(2)

PACKAGE

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

Voltages on pin VIN, SUP
Voltages on pin EN1, EN2, FREQ
Voltage on pin SW
Voltage on pin SWB
Voltages on pin OS, GD
Continuous power dissipation See Dissipation Rating Table

T

A

T

stg

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

(2) All voltage values are with respect to network ground terminal.

Operating junction temperature –40 ° C to 150 ° C
Storage temperature range –65 ° C to 150 ° C
Temperature (soldering, 10 s) 260 ° C

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

(2)

(2)

(2)

(2)

(1)

UNIT

–0.3 V to 16.5 V

–0.3 V to 15 V

25 V
20 V
25 V

DISSIPATION RATINGS

PACKAGE RTH

28-Pin TSSOP 28 ° C/W (PowerPAD

(1) See Texas Instruments application report SLMA002 regarding thermal characteristics of the PowerPAD package.

2

JA

(1)

soldered) 3.57 W 1.96 W 1.42 W

TA≤ 25 ° C TA= 70 ° C TA= 85 ° C

POWER RATING POWER RATING POWER RATING

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TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

V

S

V

SUP

C

IN

L µH

V

LOGIC

C

O

T

A

T

J

(1) See application section for further information.

ELECTRICAL CHARACTERISTICS

V

IN

(unless otherwise noted)

SUPPLY CURRENT

V

IN

I

QIN

I

SD

I

SUP

V

UVLO

V

REF

LOGIC SIGNALS EN1, EN2, FREQ

V

IH

V

IL

V

IH

V

IL

I

I

CONTROL AND SOFT START DLY1, DLY2, SS

I

DLY1

I

DLY2

I

SS

Output voltage range of the main boost converter TPS65160 20 V

TPS65160A 17.5 V
Maximum operating voltage at the charge-pump driver supply pin SUP 15 V
Input capacitor at VINB 2x22 µF
Input capacitor AVIN 1 µF
Inductor boost converter
Inductor buck converter
Output voltage range of the step-down converter V

(1)

(1)

LOGIC

1.8 5.0 V

10
15

Output capacitor boost converter 3x22
Output capacitor buck converter 2x22
Operating ambient temperature –40 85 ° C
Operating junction temperature –40 125 ° C

= 12 V, SUP = VIN, EN1 = EN2 = VIN, VS= 15 V, V

= 3.3 V, TA= –40 ° C to 85 ° C, typical values are at TA= 25 ° C

LOGIC

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input voltage range

TPS65160 8 14 V
TPS65160A 9.2 14 V

VGH = 2 x VS, 0.2 2

Quiescent current into AVIN Boost converter not

switching
VGH = 2 x VS, 0.2 0.5

Quiescent current into VINB Buck converter not

switching
Shutdown current into AVIN EN1 = EN2 = GND 0.1 2
Shutdown current into VINB EN1 = EN2 = GND 0.1 2
Shutdown current into SUP EN1 = EN2 = GND 0.1 4 µA
Quiescent current into SUP VGH = 2 x V

Undervoltage lockout threshold

TPS65160 VINfalling 6 6.4 V
TPS65160A VINfalling 8 8.8 V

S

0.2 2 mA

Reference voltage 1.203 1.213 1.223 V
Thermal shutdown Temperature rising 155 ° C
Thermal shutdown hysteresis 5 ° C

High-level input voltage EN1, EN2 2.0 V
Low-level input voltage EN1, EN2 0.8 V
High-level input voltage FREQ 1.7 V
Low-level input voltage FREQ 0.4 V

Input leakage current

EN1 = EN2 = FREQ = 0.01 0.1 µA

GND or V

IN

Delay1 charge current 3.3 4.8 6.2 µA
Delay2 charge current V

THRESHOLD

= 1.213 V 3.3 4.8 6.2 µA

SS charge current 6 9 12 µA

µF

mA

µA

3

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TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

ELECTRICAL CHARACTERISTICS (continued)

V

= 12 V, SUP = VIN, EN1 = EN2 = VIN, VS= 15 V, V

IN

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

INTERNAL OSCILLATOR

f

OSC

BOOST CONVERTER (VS)

V

V
I

FB

r

DS(ON)

I

MAX

I

LIM

Ileak Switch leakage current V

Vovp Overvoltage protection

GATE DRIVE (GD)

V
V

STEP-DOWN CONVERTER (V

V
V
I

FBB

r

DS(ON)

I

LIM

Ileak Switch leakage current V

(1) The GD signal is latched low when the main boost converter output VSis within regulation. The GD signal is reset when the input

Oscillator frequency kHz

Output voltage range

S

Feedback regulation voltage 1.136 1.146 1.156 V

FB

TPS65160 20 V
TPS65160A 17.5 V

Feedback input bias current 10 100 nA
N-MOSFET on-resistance (Q1) ISW= 500 mA 100 185 m Ω
P-MOSFET on-resistance (Q2) ISW= 200 mA 10 16 Ω
Maximum P-MOSFET peak switch current 1 A
N-MOSFET switch current limit (Q1) 2.8 3.5 4.2 A

TPS65160 V

TPS65160A V
Line regulation
Load regulation 0.03 %/A

Gate drive threshold

GD

GD output low voltage I

OL

(1)

GD output leakage current VGD = 20 V 0.05 1 µA

)

LOGIC

Output voltage range 1.8 5 V

LOGIC

Feedback regulation voltage 1.195 1.213 1.231 V

FBB

Feedback input bias current 10 100 nA
N-MOSFET on-resistance (Q1) ISW= 500 mA 175 300 m Ω
N-MOSFET switch current limit (Q1) 2 2.6 3.3 A

Line regulation
Load regulation 0.037 %/A

voltage or enable of the boost converter is cycled low.

= 3.3 V, TA= –40 ° C to 85 ° C, typical values are at TA= 25 ° C

LOGIC

FREQ = high 600 750 900
FREQ = low 400 500 600

= 15 V 1 10 µA

SW

rising 22 23 24.5 V

OUT

rising 18 19.5 20.5 V

OUT

10.6 V ≤ Vin ≤ 11.6 V 0.0008 %/V
at 1 mA

V

rising Vs-12% Vs-8% Vs-4% V

FB

= 500 µA 0.3 V

(sink)

= 0 V 1 10 µA

SW

10.6 V ≤ VIN≤ 11.6 V 0.0018 %/V
at 1 mA

4

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1
2

3
4
5

6
7
8
9

10
11
12

28
27

26
25
24

23
22
21
20
19
18
17

FB

COMP

OS

SW

SW
PGND
PGND

SUP

EN2

DRP

DRN

FREQ

SS
GD

DLY2
DLY1
REF
GND

AVIN

VINB
VINB
NC
SWB
BOOT

Thermal PAD (see Note)

13
14

16
15

FBN

FBP

EN1
FBB

TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

ELECTRICAL CHARACTERISTICS (continued)

V

= 12 V, SUP = VIN, EN1 = EN2 = VIN, VS= 15 V, V

IN

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

NEGATIVE CHARGE-PUMP VGL

VGL Output voltage range –2 V
V
I

FBN

r

DS(ON)

V

POSITIVE CHARGE-PUMP OUTPUT VGH

V
I

FBP

r

DS(ON)

V

Feedback regulation voltage –36 0 36 mV

FBN

Feedback input bias current 10 100 nA
Q4 P-Channel switch r

Current sink voltage drop

DropN

Feedback regulation voltage 1.187 1.213 1.238 V

FBP

Feedback input bias current 10 100 nA
Q3 N-Channel switch r

Current source voltage drop

DropP

(Vsup – V

)

DRP

DS(ON)

(2)

DS(ON)

(2)

= 3.3 V, TA= –40 ° C to 85 ° C, typical values are at TA= 25 ° C

LOGIC

I

= 20 mA 4.4 Ω

OUT

I

= 50 mA, 130 190

DRN

V

= V

FBN

FBNnominal

I

= 100 mA, 270 420

DRN

V

= V

FBN

FBNnominal

I

= 20 mA 1.1 Ω

OUT

I

= 50 mA, 400 680

DRP

V

= V

FBP

FBPnominal

I

= 100 mA, 850 1600

DRP

V

= V

FBP

FBPnominal

–5%

–5%

–5%

–5%

mV

mV

(2) The maximum charge-pump output current is typically half the drive current of the internal current source or current sink.

NOTE: The thermally enhanced PowerPAD™ is connected to PGND.

5

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TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

TERMINAL FUNCTIONS

TERMINAL

NAME NO.

SUP 8 I of the TPS65160 main boost converter. Because the SUP pin is rated to a maximum voltage of 15 V, it needs to

FREQ 12 I

AVIN 22 I
VINB 20, 21 I Power input voltage pin for the buck converter.

EN1 16 I converter starts up, and after a delay time set by DLY1, the negative charge pump comes up. This pin must be

EN2 9 I charge pump starts up after the buck converter is within regulation and a delay time set by DLY2 has passed by.

DRN 11 O Drive pin of the negative charge pump.
FBN 13 I Feedback pin of negative charge pump.
REF 24 O Internal reference output typically 1.213 V
PGND 6, 7 Power ground

SS 28 O

DLY1 25 O

DLY2 26 O

COMP 2
FBB 15 I Feedback pin of the buck converter

SWB 18 O Switch pin of the buck converter
NC 19 Not connected

BOOT 17 I
FBP 14 I Feedback pin of positive charge pump.

DRP 10 O Drive pin of the positive charge pump.

GD 27

GND 23 Analog ground

OS 3 I

FB 1 I Feedback of the main boost converter generating Vsource (V
SW 4, 5 I Switch pin of the boost converter generating Vsource (VS).
PowerPAD The PowerPAD needs to be connected and soldered to power ground (PGND).

I/O DESCRIPTION

This is the supply pin of the positive and negative charge-pump driver and can be connected to the input or output
be connected to the input of the TPS65160 for an output voltage greater than 15 V.

Frequency adjust pin. This pin allows setting the switching frequency with a logic level to 500 kHz = low and
750 kHz = high.

Analog input voltage of the device. This is the input for the analog circuits of the device and should be bypassed
with a 1- µ F ceramic capacitor for good filtering.

This is the enable pin of the buck converter and negative charge pump. When this pin is pulled high, the buck
terminated and not be left floating. A logic high enables the device and a logic low shuts down the device.

The boost converter starts only with EN1 = high, after the step-down converter is enabled. EN2 is the enable pin
of the boost converter and positive charge pump. When this pin is pulled high, the boost converter and positive

This pin must be terminated and not be left floating. A logic high enables the device and a logic low shuts down
the device.

This pin allows setting the soft-start time for the main boost converter VS. Typically a 22-nF capacitor needs to be
connected to this pin to set the soft-start time.

Connecting a capacitor from this pin to GND allows the setting of the delay time between V
converter output high) to VGL during start-up.

Connecting a capacitor from this pin to GND allows the setting of the delay time between V
converter output high) to VSBoost converter and positive charge-pump VGH during start-up.

This is the compensation pin for the main boost converter. A small capacitor and, if required, a resistor is
connected to this pin.

N-channel MOSFET gate drive voltage for the buck converter. Connect a capacitor from the switch node SWB to
this pin.

This is the gate drive pin which can be used to control an external MOSFET switch to provide input to output
isolation of VSor VGH. See the circuit diagrams at the end of this data sheet. GD is an open-drain output and is
latched low as soon as the boost converter is within 8% of its nominal regulated output voltage. GD goes high
impedance when the EN2 input voltage is cycled low.

Output sense pin. The OS pin is connected to the internal rectifier switch and overvoltage protection comparator.
This pin needs to be connected to the output of the boost converter and cannot be connected to any other voltage
rail. Connect a 470-nF capacitor from OS pin to GND to avoid noise coupling into this pin. The PCB trace of the
OS pin needs to be wide because it conducts high current.

).

S

LOGIC

LOGIC

(step-down

(step-down

6

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TYPICAL CHARACTERISTICS

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

−40 −20 0 20 40 60 80 100 120 140

r

DS(on)

− N-Channel Switch −

TA − Temperature − C

Ω

VI = 8 V ,
VI = 12 V ,
VI = 14 V

0

10

20

30

40

50

60

70

80

90

100

0 0.5 1 1.5 2

VI = 12 V ,
VO = 15 V ,
L = 10 H

IO − Output Current − A

Efficiency − %

TABLE OF GRAPHS

MAIN BOOST CONVERTER (Vs)

η Efficiency main boost converter Vs vs Load current VS=15 V,V
r

DS(ON)

STEP-DOWN CONVERTER (Vlogic)

η Efficiency main boost converter V
r

DS(ON)

SYSTEM PERFORMANCE

f

osc

N-channel main switch Q1 vs Input voltage and temperature 2
Soft-start boost converter C

= 22 nF 3

SS

PWM operation at full-load current 4
PWM operation at light-load current 5
Load transient response 6

S

vs Load current V

LOGIC

N-channel main switch Q1 8
PWM operation - continuous mode 9
PWM operation - discontinuous mode 10
Soft start 11
Load transient response 12

Oscillation frequency vs Input voltage and temperature 13
Power-up sequencing EN2 connected to V
Power-up sequencing EN2 enabled seperately 15

TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

FIGURE

= 12 V 1

IN

= 3.3 V,V

IN

= 12 V 7

IN

14

BOOST CONVERTER EFFICIENCY BOOST CONVERTER

vs r

OUTPUT CURRENT vs

Figure 1. Figure 2.

- N-CHANNEL SWITCH

DS(ON)

TEMPERATURE

7

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V

S

5 V/div

I

I

1 A/div

VI = 12 V ,
VO = 15 V/ 1.2 A,
C

(SS)

= 22 nF

2 ms/div

V

SW

10 V/div

V

O

50 mV/div

I

(Inductor)

1 A/div

1 s/div

VI = 12 V ,
VO = 15 V/1.5 A

VI = 12 V , VS = 15 V ,
CO = 3*22 F,
C

(comp)

= 22 nF,

L = 6.8 H,
FREQ= High

V

S

200 mV/div

100 s/div

I

(Inductor)

1 A/div

V

SW

10 V/div

V

O

50 mV/div

I

L

500 mA/div

1 s/div

VI = 3.3 V ,
VO = 10 V/10 mA

TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

SOFT-START PWM OPERATION BOOST CONVERTER

BOOST CONVERTER CONTINUOUS MODE

Figure 3. Figure 4.

PWM OPERATION BOOST CONVERTER LOAD TRANSIENT RESPONSE BOOST CONVERTER

CONTINUOUS MODE: LIGHT LOAD

Figure 5. Figure 6.

8

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0

10

20

30

40

50

60

70

80

90

0 0.5 1 1.5 2

V

I

= 12 V ,

VO = 3.3 V ,
L = 15 H

IO − Output Current − A

Efficiency − %

0

0.05

0.1

0.15

0.2

0.25

−40 −20 0 20 40 60 80 100 120 140

r

DS(on)

− N-Channel Switch −

VI = 8 V ,
VI = 12 V ,
VI = 14 V

TA − Temperature − C

Ω

V

SW

5 V/div

V

O

20 mV/div

I

(Inductor)

100 mA/div

500 ns/div

VI = 12 V,
VO = 3.3 V/45 mA

V

SW

5 V/div

V

O

20 mV/div

I

(Inductor)

1 A/div

500 ns/div

VI = 12 V ,
VO = 3.3 V/1.5 A

TPS65160, TPS65160A

SLVS566B – MARCH 2005 – REVISED JULY 2005

EFFICIENCY STEP-DOWN CONVERTER STEP-DOWN CONVERTER

vs r

LOAD CURRENT vs

Figure 7. Figure 8.

STEP-DOWN CONVERTER STEP-DOWN CONVERTER

PWM OPERATION PWM OPERATION

CONTINUOUS MODE DISCONTINUOUS MODE

- N-CHANNEL SWITCH

DS(ON)

TEMPERATURE

Figure 9. Figure 10.

9