TEXAS INSTRUMENTS TPIC5403 Technical data

TPIC5403

4-CHANNEL INDEPENDENT GATE-PROTECTED

POWER DMOS ARRAY

SLIS038A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995

• Low r

DS(on)

• High Voltage Output...60 V

•Extended ESD Capability...4000 V

• Pulsed Current...11.25 A Per Channel

• Fast Commutation Speed

description

The TPIC5403 is a monolithic gate-protected
power DMOS array that consists of four
independent electrically isolated N-channel
enhancement-mode DMOS transistors. Each
transistor features integrated high-current zener
diodes (Z
in the event that an overstress condition occurs.

. . . 0.23 Ω Typ

and Z

CXa

) to prevent gate damage

CXb

DRAIN1
DRAIN1

GATE1

GND
SOURCE1
SOURCE1
SOURCE2
SOURCE2

GND

GATE2
DRAIN2
DRAIN2

DW PACKAGE

(TOP VIEW)

1

24

2

23

3

22

4

21

5

20

6

19

7

18

8

17

9

16

10

15

11

14

12

13

DRAIN3
DRAIN3
GATE3
GND
SOURCE3
SOURCE3
SOURCE4
SOURCE4
GND
GATE4
DRAIN4
DRAIN4

These zener diodes also provide up to 4000 V of
ESD protection when tested using the
human-body model of a 100-pF capacitor in series
with a 1.5-kΩ resistor.

The TPIC5403 is offered in a 24-pin wide-body surface-mount (DW) package and is characterized for operation
over the case temperature range of –40°C to 125°C.

schematic

GATE1

GATE2

1, 2

3

5, 6
11, 12

10

7, 8

Z

Z

C1b

C1a

Q2

Z

Z

C2b

C2a

Q1

D1

D3

Z1

D2 D4

Z2 Z4

4, 9, 16, 21

GND

Z3

DRAIN1

SOURCE1

DRAIN2

SOURCE2

NOTE A: For correct operation, no terminal may be taken below GND.

Q3

Z

Z

Z

C3b

Z

C3a

C4b

C4a

Q4

23, 24

22

19, 20
13, 14

15

17, 18

DRAIN3

GATE3

SOURCE3

DRAIN4

GATE4

SOURCE4

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1995, Texas Instruments Incorporated

1

TPIC5403
4-CHANNEL INDEPENDENT GATE-PROTECTED
POWER DMOS ARRAY

SLIS038A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995

absolute maximum ratings over operating case temperature range (unless otherwise noted)

Drain-to-source voltage, V

60 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS

†

Source-to-GND voltage 100 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Drain-to-GND voltage 100 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Gate-to-source voltage range, V
Continuous drain current, each output, T
Continuous source-to-drain diode current, T
Pulsed drain current, each output, I
Continuous gate-to-source zener diode current, T
Pulsed gate-to-source zener diode current, T
Single-pulse avalanche energy, E
Continuous total power dissipation, T
Operating virtual junction temperature range, T
Operating case temperature range, T
Storage temperature range, T

–9 V to 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

GS

max

AS

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

= 25°C 2.25 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C

= 25°C 2.25 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C

, TC = 25°C (see Note 1 and Figure 15) 11.25 A. . . . . . . . . . . . . . . . .

= 25°C ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C

= 25°C ±500 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C

, TC = 25°C (see Figures 4, 15, and 16) 17.2 mJ. . . . . . . . . . . . . . . . . . .

= 25°C (see Figure 15) 1.39 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C

–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C

–40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

J

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: Pulse duration = 10 ms, duty cycle = 2%

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4-CHANNEL INDEPENDENT GATE-PROTECTED

I

Zero-gate-voltage drain current

DS

,

A

I

Leakage current, drain-to-GND

V

V

A

r

Static drain-to-source on-state resistance

D

,

Ω

F

trrReverse-recovery time

ns

V
See

di/dt

100 A/

QRRTotal diode charge

See Figures 1 and 14

C

SLIS038A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995

electrical characteristics, TC = 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

(BR)DSX

V

GS(th)

V

(BR)GS

V

(BR)SG

V

(BR)

V

DS(on)

V

F(SD)

V

F

DSS

I

GSSF

I

GSSR

lkg

DS(on)

g

fs

C

iss

C

oss

C

rss

NOTES: 2. Technique should limit TJ – TC to 10°C maximum.

Drain-to-source breakdown voltage ID = 250 µA, VGS = 0 60 V
Gate-to-source threshold voltage
Gate-to-source breakdown voltage IGS = 250 µA 18 V

Source-to-gate breakdown voltage ISG = 250 µA 9 V
Reverse drain-to-GND breakdown voltage (across

D1, D2, D3, and D4)
Drain-to-source on-state voltage

Forward on-state voltage, source-to-drain

Forward on-state voltage, GND-to-drain

Forward gate current, drain short circuited to source VGS = 15 V, VDS = 0 20 200 nA
Reverse gate current, drain short circuited to

source

Forward transconductance
Short-circuit input capacitance, common source 200 250

Short-circuit output capacitance, common source
Short-circuit reverse-transfer capacitance,

common source

3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.

ID = 1 mA,
See Figure 5

Drain-to-GND current = 250 µA 100 V
ID = 2.25 A,

See Notes 2 and 3
IS = 2.25 A,

VGS = 0 (Z1, Z2, Z3, Z4),
See Notes 2 and 3 and Figure 12

ID = 2.25 A (D1, D2, D3, D4),
See Notes 2 and 3

V

= 48 V,

VGS = 0

VSG = 5 V, VDS = 0 10 100 nA

= 48

DGND

VGS = 10 V,
I

= 2.25 A,
See Notes 2 and 3
and Figures 6 and 7

VDS = 15 V, ID = 1.125 A,
See Notes 2 and 3 and Figure 9

VDS = 25 V, VGS = 0,
f = 1 MHz, See Figure 11

TPIC5403

POWER DMOS ARRAY

VDS = VGS,

VGS = 10 V,

TC = 25°C 0.05 1
TC = 125°C 0.5 10

TC = 25°C 0.05 1
TC = 125°C 0.5 10

TC = 25°C 0.23 0.27

TC = 125°C 0.35 0.4

1.5 1.75 2.2 V

0.5 0.62 V

0.9 1.1 V

2.5 V

1.6 2.1 S

100 175

60 75

µ

µ

p

source-to-drain and GND-to-drain diode characteristics, TC = 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

IS = 1.125 A,

= 0,

GS

Figures 1 and 14

Z1, Z2, Z3, and Z4 80

VDS = 48 V,

=

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

µs,

D1, D2, D3, and D4 160
Z1, Z2, Z3, and Z4
D1, D2, D3, and D4 0.5

0.12

µ

3

TPIC5403

DD

,

L

,

r1

,

ns

See Figure 3

nH

4-CHANNEL INDEPENDENT GATE-PROTECTED
POWER DMOS ARRAY

SLIS038A – SEPTEMBER 1994 – REVISED SEPTEMBER 1995

resistive-load switching characteristics, TC = 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

t

d(on)

t

d(off)

t

r2

t

f2

Q
Q
Q
L

D

L

S

R

g

thermal resistance

R

θJA

R

θJB

R

θJP

NOTES: 4. Package mounted on an FR4 printed-circuit board with no heatsink

Turn-on delay time 32 55
Turn-off delay time
Rise time
Fall time 7 15
Total gate charge

g

Threshold gate-to-source charge

gs(th)

Gate-to-drain charge

gd

Internal drain inductance 5
Internal source inductance 5
Internal gate resistance 0.25 Ω

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Junction-to-ambient thermal resistance See Notes 4 and 7 90 °C/W
Junction-to-board thermal resistance See Notes 5 and 7 49 °C/W
Junction-to-pin thermal resistance See Notes 6 and 7 28 °C/W

5. Package mounted on a 24 inch2, 4-layer FR4 printed-circuit board

6. Package mounted in intimate contact with infinite heatsink

7. All outputs with equal power

V

= 25 V, R

tf1 = 10 ns,

VDS = 48 V,

= 20 Ω,t

See Figure 2

ID = 1.125 A, VGS = 10 V,

= 10 ns,

27 50
14 30

6.6 8

0.6 0.7

2.8 3.2

nC

4

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