TEXAS INSTRUMENTS TPA6100A2D Technical data

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1
2
3
4

8
7
6
5

BYPASS

GND

SHUTDOWN

IN2–

IN1–
V

O

1

V

DD

VO2

DGK PACKAGE

(TOP VIEW)

1
2
3
4

8
7
6
5

BYPASS

GND

SHUTDOWN

IN2–

IN1–
VO1
V

DD

VO2

D PACKAGE

(TOP VIEW)

Audio

Input

Bias

Control

6

7

5

2

VO1

VO2

V

DD

3

8

1

4

IN1−

BYPASS

SHUTDOWN

VDD/4

C

I

R

I

R

F

C

B

C

S

Audio

Input

C

I

R

I

IN2−

R

F

V

DD

From Shutdown

Control Circuit

−

+

−

+

C

C

C

C

R

R

50-mW ULTRALOW VOLTAGE STEREO HEADPHONE AUDIO POWER AMPLIFIER

FEATURES

• 50-mW Stereo Output

• Low Supply Current . . . 0.75 mA

• Low Shutdown Current . . . 50 nA

• Pin Compatible With LM4881 and TPA102

• Pop Reduction Circuitry

• Internal Midrail Generation

• Thermal and Short-Circuit Protection

• Surface-Mount Packaging

– MSOP and SOIC

• 1.6-V to 3.6-V Supply Voltage Range

(1) The polarity of the SHUTDOWN pin is reversed.

(1)

TPA6100A2D

SLOS269B – JUNE 2000 – REVISED SEPTEMBER 2004

DESCRIPTION

The TPA6100A2D is a stereo audio power amplifier packaged in either an 8-pin SOIC package or an 8-pin
MSOP package capable of delivering 50 mW of continuous RMS power per channel into 16- Ω loads. Amplifier
gain is externally configured by a means of three resistors per input channel and does not require external
compensation for settings of 1 to 10.

The TPA6100A2D is optimized for battery applications because of its low supply current, shutdown current, and
THD+N. To obtain the low-supply voltage range, the TPA6100A2D biases BYPASS to V
resistance equal to R

must be added from the inputs to ground to allow the output to be biased at V

F

When driving a 16- Ω load with 45-mW output power from 3.3 V, THD+N is 0.04% at 1 kHz, and less than 0.2%
across the audio band of 20 Hz to 20 kHz. For 28 mW into 32- Ω loads, the THD+N is reduced to less than 0.03%
at 1 kHz, and is less than 0.2% across the audio band of 20 Hz to 20 kHz.

TYPICAL APPLICATION CIRCUIT

Copyright © 2000–2004, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

/4. A resistor with a

DD

/2.

DD

www.ti.com

TPA6100A2D

SLOS269B – JUNE 2000 – REVISED SEPTEMBER 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS

T

A

SMALL OUTLINE (D) MSOP(DGK)

PACKAGED DEVICE

–40 ° C to 85 ° C TPA6100A2D TPA6100A2DGK AJL

Terminal Functions

TERMINAL

NAME NO.

BYPASS 1 I Tap to voltage divider for internal mid-supply bias supply. BYPASS is set at VDD/4. Connect to a 0.1-µF

GND 2 I GND is the ground connection.
IN1- 8 I IN1- is the inverting input for channel 1.
IN2- 4 I IN2- is the inverting input for channel 2.
SHUTDOWN 3 I Active-low input. When held low, the device is placed in a low supply current mode.
V

DD

VO1 7 O VO1 is the audio output for channel 1.
VO2 5 O VO2 is the audio output for channel 2.

I/O DESCRIPTION

to 1-µF low-ESR capacitor for best performance.

6 I V

is the supply voltage terminal.

DD

MSOP

SYMBOLIZATION

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

V

Supply voltage 4 V

DD

V

Input voltage –0.3 V to V

I

Continuous total power dissipation Internally limited

T

Operating junction temperature range –40 ° C to 150 ° C

J

T

Storage temperature range –65 ° C to 150 ° C

stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C

(1) Stresses beyond thoselisted under "absolute maximum ratings” may cause permanent damage to thedevice. These are stress ratings

only, and functional operation of the deviceat these or any other conditions beyond those indicated under "recommendedoperating
conditions” is not implied. Exposure to absolute-maximum-ratedconditions for extended periods may affect devicereliability.

(1)

UNIT

+ 0.3 V

DD

DISSIPATION RATING TABLE

PACKAGE

D 710 mW 5.68 mW/ ° C 454 mW 369 mW

DGK 469 mW 3.75 mW/ ° C 300 mW 244 mW

TA≤ 25 ° C DERATING FACTOR TA= 70 ° C TA= 85 ° C

POWER RATING ABOVE TA= 25 ° C POWER RATING POWER RATING

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

V

Supply voltage 1.6 3.6 V

DD

T

Operating free-air temperature –40 85 ° C

A

V

High-level input voltage SHUTDOWN 0.6 x V

IH

V

Low-level input voltage SHUTDOWN 0.25 x V

IL

DD

V

DD

2

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TPA6100A2D

SLOS269B – JUNE 2000 – REVISED SEPTEMBER 2004

DC ELECTRICAL CHARACTERISTICS

at TA= 25 ° C, V

V

OO

PSRR Power supply rejection ratio V
I

DD

I

DD(SD)

|IIH| High-level input current ( SHUTDOWN) V
|IIL| Low-level input current ( SHUTDOWN) V
Z

I

AC OPERATING CHARACTERISTICS

V

= 3.3 V, TA= 25 ° C, RL= 16 Ω

DD

P
THD+N Total harmonic distortion + noise PO= 45 mW, 20 Hz–20 kHz 0.2%
B
k

SVR

SNR Signal-to-noise ratio PO= 50 mW 90 dB
V

Output power (each channel) THD ≤ 0.1%, f = 1 kHz 50 mW

O

Maximum output power BW G = 1, THD < 0.5% > 20 kHz

OM

Supply ripple rejection f = 1 kHz 52 dB

Noise output voltage (no noise-weighting filter) 28 µV(rms)

n

= 3.6 V (Unless otherwise noted)

DD

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Output offset voltage AV= 2 V/V 5 40 mV

= 3.0 V to 3.6 V 72 dB

DD

Supply current SHUTDOWN = 3.6 V 0.75 2.0 mA
Supply current in SHUTDOWN mode SHUTDOWN = 0 V 50 250 nA

= 3.6 V, VI= V

DD

= 3.6 V, VI= 0 V 1 µA

DD

DD

Input impedance (IN1-, IN2-) > 1 M Ω

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

1 µA

AC OPERATING CHARACTERISTICS

V

= 3.3 V, TA= 25 ° C, RL= 32 Ω

DD

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

P

O

THD+N Total harmonic distortion + noise PO= 30 mW, 20 Hz–20 kHz 0.2%
B

OM

k

SVR

SNR Signal-to-noise ratio PO= 35 mW 91 dB
V

n

Output power (each channel) THD ≤ 0.1%, f = 1 kHz 35 mW

Maximum output power BW G = 1, THD < 0.2% > 20 kHz
Supply ripple rejection f = 1 kHz 52 dB

Noise output voltage (no noise-weighting filter) 28 µV(rms)

3

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TPA6100A2D

SLOS269B – JUNE 2000 – REVISED SEPTEMBER 2004

DC ELECTRICAL CHARACTERISTICS

at TA= 25 ° C, V

V
PSRR Power supply rejection ratio V
I

DD

I

DD(SD)

|IIH| High-level input current ( SHUTDOWN) V
|IIL| Low-level input current ( SHUTDOWN) V
Z

Output offset voltage AV= 2 V/V 5 40 mV

OO

Supply current SHUTDOWN = 1.6 V 1.2 1.5 mA
Supply current in SHUTDOWN mode SHUTDOWN = 0 V 50 250 nA

Input impedance (IN1-, IN2-) > 1 M Ω

I

AC OPERATING CHARACTERISTICS

V

= 1.6 V, TA= 25 ° C, RL= 16 Ω

DD

P

O

THD+N Total harmonic distortion + noise PO= 9.5 mW, 20 Hz–20 kHz 0.4%
B

OM

k

SVR

SNR Signal-to-noise ratio PO= 9.5 mW 86 dB
V

n

= 1.6 V (Unless otherwise noted)

DD

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

= 1.5 V to 1.7 V 80 dB

DD

= 1.6 V, VI= V

DD

= 1.6 V, VI= 0 V 1 µA

DD

DD

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Output power (each channel) THD ≤ 0.1%, f = 1 kHz 9.5 mW

Maximum output power BW G = 0 dB, THD < 0.4% > 20 kHz
Supply ripple rejection f = 1 kHz 53 dB

Noise output voltage (no noise-weighting filter) 18 µV(rms)

1 µA

AC OPERATING CHARACTERISTICS

V

= 1.6 V, TA= 25 ° C, RL= 32 Ω

DD

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

P

O

THD+N Total harmonic distortion + noise PO= 6.5 mW, 20 Hz–20 kHz 0.3%
B

OM

k

SVR

SNR Signal-to-noise ratio PO= 7.1 mW 88 dB
V

n

Output power (each channel) THD ≤ 0.1%, f = 1 kHz 7.1 mW

Maximum output power BW G = 0 dB, THD < 0.3% > 20 kHz
Supply ripple rejection f = 1 kHz 53 dB

Noise output voltage (no noise-weighting filter) 18 µV(rms)

4

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Gain  



R

F

R

I



or Gain (dB)  20 log



R

F

R

I



Effective Impedance 

RFR

I

RF R

I

f

c



1

2 R

FCF

f

c



1

2 R

I

C

I

C

I



1

2 R

I

f

c

TPA6100A2D

SLOS269B – JUNE 2000 – REVISED SEPTEMBER 2004

APPLICATION INFORMATION

GAIN SETTING RESISTORS, R

The voltage gain for the TPA6100A2D is set by resistors R

, RI,and R

F

and RIaccording to Equation 1 .

F

Given that the TPA6100A2D is an MOS amplifier, the input impedance is high. Consequently, input leakage
currents are not generally a concern, although noise in the circuit increases as the value of R
addition, a certain range of R

values is required for proper start-up operation of the amplifier. Taken together, it

F

increases. In

F

is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 k Ω
and 20 k Ω . The effective impedance is calculated in Equation 2 .

As an example, consider an input resistance of 20 k Ω and a feedback resistor of 20 k Ω . The gain of the amplifier
would be –1 and the effective impedance at the inverting terminal would be 10 k Ω , which is within the
recommended range.

For high-performance applications, metal film resistors are recommended because they tend to have lower noise
levels than carbon resistors. For values of R
formed from R

and the inherent input capacitance of the MOS input structure. For this reason, a small

F

above 50 k Ω , the amplifier tends to become unstable due to a pole

F

compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a
low-pass filter network with the cutoff frequency defined in Equation 3 .

For example, if R

is 100 k Ω and C

F

is 5 pF, then fcis 318 kHz, which is well outside the audio range.

F

For maximum signal swing and output power at low supply voltages like 1.6 V to 3.3 V, BYPASS is biased to
V

/4. However, to allow the output to be biased at V

DD

/2, a resistor, R, equal to R

DD

must be placed from the

F

negative input to ground.

(1)

(2)

(3)

INPUT CAPACITOR, C

I

In the typical application, an input capacitor, CI, is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, C

and R

I

form a high-pass filter with the corner frequency

I

determined in Equation 4 .

The value of CIis important to consider, as it directly affects the bass (low-frequency) performance of the circuit.
Consider the example where R

is 20 k Ω and the specification calls for a flat bass response down to 20 Hz.

I

Equation 4 is reconfigured as Equation 5 .

In this example, C
consideration for this capacitor is the leakage path from the input source through the input network (R
the feedback resistor (R

is 0.4 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further

I

) to the load. This leakage current creates a dc offset voltage at the input to the amplifier

F

, CI) and

I

that reduces useful headroom, especially in high-gain applications (>10). For this reason a low-leakage tantalum
or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications, as the dc level there is held at V

/4, which is likely higher

DD

than the source dc level. It is important to confirm the capacitor polarity in the application.

(4)

(5)

5

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1



CB 55 kΩ





1



CIR

I



f

c



1

2 R

LCC

TPA6100A2D

SLOS269B – JUNE 2000 – REVISED SEPTEMBER 2004

APPLICATION INFORMATION (continued)
POWER SUPPLY DECOUPLING, C

The TPA6100A2D is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 µF, placed as close as possible to the device V
lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power
amplifier is recommended.

S

lead, works best. For filtering

DD

MIDRAIL BYPASS CAPACITOR, C

The midrail bypass capacitor (C

B

B

) serves several important functions. During start-up, C

determines the rate at

B

which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it can
not be heard). The second function is to reduce noise produced by the power supply caused by coupling into the
output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed
from a 55-k Ω source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in
Equation 6 should be maintained.

As an example, consider a circuit where C
Equation 6 results in: 18.18 ≤ 50 which satisfies the rule. Bypass capacitor (C

is 1 µF, C

B

is 1 µF, and R

I

is 20 k Ω . Inserting these values into

I

) values of 0.47-µF to 1-µF

B

ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance.

OUTPUT COUPLING CAPACITOR, C

In the typical single-supply, single-ended (SE) configuration, an output coupling capacitor (C

C

) is required to

C

block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling
capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by
Equation 7 .

The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the
low-frequency corner higher. Large values of C
example where a C

of 68 µF is chosen and loads vary from 32 Ω to 47 k Ω . Table 1 summarizes the frequency

C

are required to pass low frequencies into the load. Consider the

C

response characteristics of each configuration.

(6)

(7)

Table 1. Common Load Impedances vs Low Frequency

Output Characteristics in SE Mode

R

L

32 Ω 68 µF 73 Hz
10,000 Ω 68 µF 0.23 Hz
47,000 Ω 68 µF 0.05 Hz

C

C

LOWEST FREQUENCY

As Table 1 indicates, headphone response is adequate and drive into line level inputs (a home stereo for
example) is good.

The output coupling capacitor required in single-supply, SE mode also places additional constraints on the
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following
relationship:

6

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1



CB 55 kΩ





1



CIR

I





1

R

LCC

TPA6100A2D

SLOS269B – JUNE 2000 – REVISED SEPTEMBER 2004

USING LOW-ESR CAPACITORS

Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of
the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves
like an ideal capacitor.

3.3-V VERSUS 1.6-V OPERATION

The TPA6100A2D was designed for operation over a supply range of 1.6 V to 3.6 V. There are no special
considerations for 1.6-V versus 3.3-V operation as far as supply bypassing, gain setting, or stability. The most
important consideration is that of output power. Each amplifier can produce a maxium output voltage swing within
a few hundred millivolts of the rails with a 10-k Ω load. However, this voltage swing decreases as the load
resistance decreases and the r
32- Ω load, the maximum peak output voltage with V
This reduced voltage swing effectively reduces the maximum undistorted output power.

as the output stage transistors becomes more significant. For example, for a

DS(on)

= 1.6 V is approximately 0.7 V with no clipping distortion.

DD

(8)

7

PACKAGE OPTION ADDENDUM

www.ti.com

6-Dec-2006

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

TPA6100A2D ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

TPA6100A2DGK ACTIVE MSOP DGK 8 80 Green (RoHS &

no Sb/Br)

TPA6100A2DGKG4 ACTIVE MSOP DGK 8 80 Green (RoHS &

no Sb/Br)

TPA6100A2DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

no Sb/Br)

TPA6100A2DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

no Sb/Br)

TPA6100A2DR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

TPA6100A2DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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Addendum-Page 1

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