TEXAS INSTRUMENTS TPA6040A4 Technical data

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CODEC

VDD

SPKR

SPKR_LIN–

BYPASS

SGND

HP_EN

SPKR_EN

SPKR_RIN–

SPKR_LIN+

HP_INR

HP_INL

HPVDD

CPVDD

VDD

REG_EN

REG_OUT

SPKR_RIN+

ROUT+

LOUT+

ROUT–

LOUT–

SPVDD

CPVSS

C1P

HPVSS

SPGND

CPGND

C1N

GAIN0

GAIN1

OUTL

OUTR

HPR

HPL

SPKL

TPA6040A4

Shutdown

Control

3V – 5.5V

4.5V – 5.5V RegulatorEnable

4.75V(ToCODEC)

4.5V – 5.5V

Gain Control

2-W STEREO AUDIO POWER AMPLIFIER

WITH DirectPath™ STEREO HEADPHONE DRIVE AND REGULATOR

FEATURES DESCRIPTION

• Microsoft™Windows Vista™ Compliant

• Fully Differential Architecture and High PSRR

Provide Excellent RF Rectification Immunity

• 2-W, 10% THD+N Into 4- Ω Speakers and 85-mW, 1% THD+N Into 16- Ω Headphones From 5-V Supply

• DirectPath™ Headphone Amplifier Eliminates Output Capacitors

• Internal 4-Step Speaker Gain Control: 6, 10,

15.6, 21.6 dB and Fixed –1.5-V/V Headphone

• 4.75-V Low Dropout Regulator for CODEC

• Independent Shutdown Controls for Speaker,

Headphone Amplifier, and Low Dropout Regulator (LDO)

• Output Short-Circuit and Thermal Protection

(1)

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

The TPA6040A4 is a stereo audio power amplifier and DirectPath™ headphone amplifier in a thermally enhanced, space-saving, 32-pin QFN package. The speaker amplifier is capable of driving 2 W per channel continuously into 4- Ω loads at 5 V. The headphone amplifier achieves a minimum of 85 mW at 1% THD+N from a 5-V supply. A built-in internal 4-step gain control for the speaker amplifier and a fixed –1.5 V/V gain for the headphone amplifier minimizes external components needed.

Independent shutdown control and dedicated inputs for the speaker and headphone allow the TPA6040A4 to simultaneously drive both headphones and internal speakers. Differential inputs to the speaker amplifiers offer superior power-supply and common-mode noise rejection.

APPLICATIONS

• Notebook Computers

• Portable DVD

(1) US Patent Number 5289137

SIMPLIFIED APPLICATION CIRCUIT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DirectPath, PowerPAD are trademarks of Texas Instruments. Microsoft, Windows Vista are trademarks of Microsoft Corporation.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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Bias Control

LDO

HP_EN

BYPASS

REG_EN

SPKR_RIN+

SPKR_RIN–

Gain Control

SPKR_LIN+

SPKR_LIN–

Charge Pump

CPVDD

CPVSS

CPGND

C1P C1N

VDD

–

ROUT+

ROUT–

SPVDD

SPGND

LOUT+

LOUT–

SPVDD

SPGND

HP_INL

HP_INR

HP_OUTL

HP_OUTR

HPVDD

–

1 mF

1 Fm

GND

GAIN0

GAIN1

HPVDD

HPVSS

SPKR_EN

0.47 Fm

1 Fm

1 mF

HPVDD

SPGND

3 V 5.5 V–

SPVDD4.5 V – 5.5 V

HPVSS

(4.75V Output) REG_OUT

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Functional Block Diagram

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BYPASSSPKR_RIN–

Thermal

Pad

CPVDD

GAIN1

32931103011291228132714261525

196

187

178

SPKR_EN

GAIN0

HP_EN

VDD

SPGND

REG_OUT

ROUT+

SGND

ROUT–

HP_INL

SPVDD

HP_INR

HPVDD

REG_EN

TPA6040A4RHB

(TOP VIEW)

SPKR_RIN+

C1P

SPKR_LIN+

CPGND

SPKR_LIN–

C1N

SPGND

CPVSS

LOUT+

HPVSS

LOUT–

HP_OUTR

SPVDD

HP_OUTL

SLOS519A – APRIL 2007 – REVISED APRIL 2007

AVAILABLE PACKAGE OPTIONS

PACKAGED DEVICE

32-Pin QFN (RHB)

–40 ° C to 85 ° C TPA6040A4RHB RHB

(1) The RHB package is available taped and reeled. To order a taped and reeled part, add the suffix R to

the part number (e.g., TPA6040A4RHBR).

(2) For the most current package and ordering information, see the Package Option Addendum at the end

of this document, or see the TI website at www.ti.com .

(1) (2)

SYMBOL

TPA6040A4

TERMINAL FUNCTIONS

TERMINAL

NAME NO.

SPKR_RIN– 1 I Right-channel negative differential audio input for speaker amplifier SPKR_RIN+ 2 I Right-channel positive differential audio input for speaker amplifier SPKR_LIN+ 3 I Left-channel positive differential audio input for speaker amplifier SPKR_LIN– 4 I Left-channel negative differential audio input for speaker amplifier SPGND 5, 21 P Speaker power ground LOUT+ 6 O Left-channel positive audio output LOUT– 7 O Left-channel negative audio output SPVDD 8, 18 P Supply voltage terminal for speaker amplifier CPVDD 9 P Charge pump positive supply, connect to HPVDD via star connection C1P 10 I/O Charge pump flying capacitor positive terminal CPGND 11 P Charge pump ground C1N 12 I/O Charge pump flying capacitor negative terminal CPVSS 13 P Charge pump output (negative supply for headphone amplifier), connect to HPVSS HPVSS 14 P Headphone amplifier negative supply, connect to CPVSS HP_OUTR 15 O Right-channel capacitor-free headphone output HP_OUTL 16 O Left-channel capacitor-free headphone output HPVDD 17 P Headphone amplifier supply voltage, connect to CPVDD ROUT– 19 O Right-channel negative audio output

I/O/P DESCRIPTION

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TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

TERMINAL FUNCTIONS (continued)

TERMINAL

NAME NO.

ROUT+ 20 O Right-channel positive audio output HP_EN 22 I Headphone channel enable logic input; active high enable. HIGH=ENABLE. SPKR_EN 23 I Speaker channel enable logic input; active low enable. LOW=ENABLE. BYPASS 24 P Common-mode bias voltage for speaker preamplifiers REG_EN 25 I Enable pin (Active HIGH) for turning on/off LDO. HIGH=ENABLE HP_INR 26 I Headphone right-channel audio input HP_INL 27 I Headphone left-channel audio input SGND 28 P Signal ground, connect to CPGND and SPGND REG_OUT 29 O Regulated 4.75-V output VDD 30 P Positive power supply GAIN0 31 I Bit 0, MSB, of gain select bits GAIN1 32 I Bit 1, LSB, of gain select bits

Thermal Pad Die Pad P

I/O/P DESCRIPTION

Solder the thermal pad on the bottom of the QFN package to the GND plane of the PCB. It is required for mechanical stability and will enhance thermal performance.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

Supply voltage HPVDD, VDD, SPVDD, CPVDD -0.3 to 6 V

SPKR_LIN+, SPKR_LIN-, SPKR_RIN+, SPKR_RIN-, -0.3 to 6.3

Input voltage V

Continuous total power dissipation See Dissipation Rating Table

Operating free-air temperature range -40 to 85 ° C

Operating junction temperature range -40 to 150 ° C

Storage temperature range -65 to 150 ° C

stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C Electrostatic discharge HBM for HP_OUTL and HP_OUTR 8 kV

Electrostatic discharge, all other pins

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

HP_EN,GAIN0, GAIN1, SPK_EN, REG_EN HP_INL, HP_INR HP Enabled -3.5 to 3.5 HP_INL, HP_INR HP not Enabled -0.3 to 3.5

CDM 500 V HBM 2 kV

(1)

VALUE UNIT

DISSIPATION RATINGS

PACKAGE

(1) The PowerPAD™ must be soldered to a thermal land on the printed-circuit board. Refer to the Texas Instruments document,

PowerPAD™ Thermally Enhanced Package application report (literature number SLMA002) for more information regarding the PowerPAD™ package.

(1)

RHB 5.06 W 40 mW/ ° C 4.04 W 3.23 W

TA≤ 25 ° C DERATING FACTOR TA= 70 ° C TA= 85 ° C

RECOMMENDED OPERATING CONDITIONS

Supply voltage VDD, SPVDD 4.5 5.5 V Supply voltage HPVDD, CPVDD 3 5.5 V

MIN MAX UNIT

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RECOMMENDED OPERATING CONDITIONS (continued)

High-level input voltage SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN 2 V

Low-level input voltage SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN 0.8 V

Operating free-air temperature -40 85 ° C

GENERAL DC ELECTRICAL CHARACTERISTICS

TA= 25 ° C, VDD = SPVDD = HPVDD = CPVDD = 5 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

DD(Speaker)

DD(HP)

DD(REG)

DD(SD)

High-level input current 0.02 1 µ A

Low-level input current 0.02 1 µ A Supply current, speaker amplifier

ONLY enabled Supply current, headphone

amplifier ONLY enabled Supply current, regulator ONLY

enabled Supply current, shutdown mode SPKR_EN = 2 V, HP_EN = REG_EN = 0 V 2.5 5 µ A

SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN = VDD

SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN = 0 V

SPKR_EN = 0 V, HP_EN = REG_EN = 0 V 5 12 mA

SPKR_EN = HP_EN = 2 V, REG_EN = 0 V 7.5 14 mA

SPKR_EN = REG_EN = 2 V, HP_EN = 0 V 0.65 1 mA

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

MIN MAX UNIT

SPEAKER AMPLIFIER DC CHARACTERISTICS

TA= 25 ° C, VDD = SPVDD = 5 V, RL= 4 k Ω , Gain = 6 dB (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

| V

| Output offset voltage (measured differentially) Inputs AC-coupled to GND, Gain = 6 dB 0.5 10 mV

PSRR Power supply rejection ratio VDD = SPVDD = 4.5 V to 5.5 V -60 -74 dB

SPEAKER AMPLIFIER AC CHARACTERISTICS

TA= 25 ° C, VDD = SPVDD = 5 V, RL= 4 Ω , Gain = 6 dB (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

THD+N = 1%, f = 1 kHz, RL= 8 Ω 1.25

Output power

THD+N Total harmonic distortion plus noise

kSVR Supply ripple rejection ratio -60 dB

SNR Signal-to-noise rejection ratio 90 dB

Crosstalk (Left-Right; Right-Left)

Vn Noise output voltage 30 µ Vrms Z

Input Impedance Gain = 21.6 dB 15 20 k Ω

G Gain dB

Gain Matching Channel-to Channel 0.01 dB Start-up time from shutdown CBYPASS = 0.47 µ F 30 ms

THD+N = 10%, f = 1 kHz, RL= 8 Ω 1.5 THD+N = 1%, f = 1 kHz, RL= 4 Ω 2 W THD+N = 10%, f = 1 kHz, RL= 4 Ω 2.3 PO= 1 W, RL= 8 Ω , f = 20 Hz to 20 kHz 0.1% PO= 0.5 W, RL= 8 Ω , f = 20 Hz to 20 kHz 0.08% f = 1 kHz, CBYPASS = 0.47 µ F,

= 200 mVp-p

RIPPLE

Maximum output at THD+N <1%, f = 1 kHz, Gain = 6 dB

f = 1 kHz, Po= 1 W, Gain = 6 dB -80 dB f = 10 kHz, Po= 1 W, Gain = 6 dB -75 dB CBYPASS = 0.47 µ F, f = 20 Hz to 20 kHz,

Gain = 6 dB, No weighting

GAIN0, GAIN1 = 0.8 V 5.4 6 6.6 GAIN0 = 0.8 V; GAIN1 = 2 V 9.4 10 10.6 GAIN0 = 2 V, GAIN1 = 0.8 V 15 15.6 16.2 GAIN0, GAIN1 = 2 V 21 21.6 22.2

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TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

HEADPHONE AMPLIFIER DC ELECTRICAL CHARACTERISTICS

TA= 25 ° C, HPVDD = CPVDD = VDD = 5 V, RL= 16 Ω (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

| V

| Output offset voltage Inputs grounded 1 3 mV

PSRR Power supply rejection ratio HPVDD = 4.5 V to 5.5 V -75 -100 dB

HEADPHONE AMPLIFIER AC CHARACTERISTICS

TA= 25 ° C, HPVDD = 5 V, RL= 16 Ω (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Output power (outputs in phase) mW

THD+N Total harmonic distortion plus noise

Dynamic Range with Signal Present A-Weighted, f = 20 Hz to 20 kHz -100 dB FS

kSVR Supply ripple rejection ratio f = 1 kHz, 200-mVpp ripple -60 dB

Crosstalk Po= 35 mW, f = 20 Hz to 20 kHz -80 dB SNR Signal-to-noise ratio Maximum output at THD+N 1%, f = 1 kHz 95 dB V

Noise output voltage f = 20 Hz to 20 kHz, No weighting 20 µ Vrms

Input Impedance 15 20 k Ω Gain Closed-loop voltage gain RL= 16 Ω -1.45 -1.5 -1.55 V/V

Start-up time from shutdown 5 ms

THD+N = 10%, Rl = 16 Ω , f = 1 kHz 200 THD+N = 10%, Rl = 32 Ω , f = 1 kHz 100 PO= 85 mW, f = 20 Hz to 20 kHz,

RL= 16 Ω PO= 50 mW, f = 20 Hz to20 kHz,

RL= 32 Ω

0.03%

0.04%

LDO CHARACTERISTICS

TA= 25 ° C, VDD = 5 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input voltage V

Continuous output current 120 mA

Output voltage 0 < IO< 120 mA; 4.9 V < Vin < 5.5 V 4.65 4.75 4.85 V

Dropout voltage IO= 120 mA 60 100 mV Line regulation IL= 5 mA; 4.9 V < Vin < 5.5 V 3 12 mV Load regulation IL= 0 – 120 mA, Vin = 5 V 0.13 0.23 mV/ mA Power supply ripple rejection V

= 4.9V, IL= 10 mA f = 100 Hz 46 dB

4.5 5.5 V

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TYPICAL CHARACTERISTICS

f − Frequency − Hz

20 100 1k 10k

THD+N − Total Harmonic Distortion + Noise − %

0.005

0.1

20k

Gain = 6 dB RL = 4 Ω VCC = 5 V

G001

0.01 PO = 1.5 W

PO = 1 W

PO = 0.25 W

f − Frequency − Hz

20 100 1k 10k

THD+N − Total Harmonic Distortion + Noise − %

0.005

0.1

20k

Gain = 6 dB RL = 8 Ω VCC = 5 V

G002

0.01

PO = 1 W

PO = 0.25 W

PO = 0.1 W

f − Frequency − Hz

10 100 1k 10k

THD+N − Total Harmonic Distortion + Noise − %

0.001

0.01

100k

G003

0.1

PO = 100 mW

Gain = 3.5 dB RL = 16 Ω VCC = 5 V

PO = 50 mW

PO = 2.8 mW

f − Frequency − Hz

10 100 1k 10k

THD+N − Total Harmonic Distortion + Noise − %

0.001

0.01

100k

G004

0.1

Gain = 3.5 dB RL = 32 Ω VCC = 5 V

PO = 1.4 mW

PO = 50 mW

PO = 25 mW

Default graph conditions: Vcc = 5 V, Freq = 1 kHz, AES17 Filter.

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

TOTAL HARMONIC DISTORTION + NOISE (SP) TOTAL HARMONIC DISTORTION + NOISE (SP)

vs vs

FREQUENCY FREQUENCY

Figure 1. Figure 2.

TOTAL HARMONIC DISTORTION + NOISE (HP) TOTAL HARMONIC DISTORTION + NOISE (HP)

vs vs

FREQUENCY FREQUENCY

Figure 3. Figure 4.

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PO − Output Power − W

10m 100m 1

THD+N − Total Harmonic Distortion + Noise − %

0.01

0.1

Gain = 6 dB RL = 4 Ω

G005

VCC = 4.5 V

VCC = 5 V

VCC = 5.5 V

PO − Output Power − W

10m 100m 1

THD+N − Total Harmonic Distortion + Noise − %

0.01

0.1

Gain = 6 dB RL = 8 Ω

G006

VCC = 4.5 V

VCC = 5 V

VCC = 5.5 V

PO − Output Power − W

100µ 1m 100m

THD+N − Total Harmonic Distortion + Noise − %

0.001

0.01

Gain = 3.5 dB RL = 16 Ω VCC = 5 V

G007

0.1

10m

In Phase

VCC = 5 V

PO − Output Power − W

100µ 1m 100m

THD+N − Total Harmonic Distortion + Noise − %

0.001

0.01

Gain = 3.5 dB RL = 32 Ω VCC = 5 V

G008

0.1

10m

VCC = 5 V

In Phase

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

TYPICAL CHARACTERISTICS (continued)

TOTAL HARMONIC DISTORTION + NOISE (SP) TOTAL HARMONIC DISTORTION + NOISE (SP)

vs vs

OUTPUT POWER OUTPUT POWER

Figure 5. Figure 6.

TOTAL HARMONIC DISTORTION + NOISE (HP) TOTAL HARMONIC DISTORTION + NOISE (HP)

vs vs

OUTPUT POWER OUTPUT POWER

Figure 7. Figure 8.

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−140

−130

−120

−110

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

Gain = 6 dB PO = 1 W RL = 4 Ω VCC = 5 V

Crosstalk − dB

10 100 1k 100k10k

G009

L to R

R to L

−140

−130

−120

−110

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

Gain = 6 dB PO = 1 W RL = 8 Ω VCC = 5 V

Crosstalk − dB

10 100 1k 100k10k

G010

L to R

R to L

−140

−130

−120

−110

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

Gain = 6 dB PO = 2 W RL = 4 Ω VCC = 5 V

Crosstalk − dB

10 100 1k 100k10k

G011

Left SPKR to LDO

Right SPKR to LDO

−120

−110

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

Gain = 3.5 dB PO = 35 mW RL = 16 Ω VCC = 5 V

Crosstalk − dB

10 100 1k 100k10k

G012

L to R

R to L

SLOS519A – APRIL 2007 – REVISED APRIL 2007

TYPICAL CHARACTERISTICS (continued)

CROSSTALK (SP) CROSSTALK (SP)

vs vs

FREQUENCY FREQUENCY

TPA6040A4

Figure 9. Figure 10.

CROSSTALK (LDO) CROSSTALK (HP)

vs vs

FREQUENCY FREQUENCY

Figure 11. Figure 12.

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−120

−110

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

f − Frequency − Hz

Gain = 3.5 dB PO = 35 mW RL = 32 Ω VCC = 5 V

Crosstalk − dB

10 100 1k 100k10k

G013

L to R

R to L

VCC − Supply Voltage − V

1.6

1.7

1.8

1.9

2.0

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

3.0

3.1

3.2

4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5

− Output Power − W

G014

Gain = 6 dB RL = 4 Ω

THD+N = 10%

THD+N = 1%

VCC − Supply Voltage − V

1.0

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2.0

4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5

− Output Power − W

G015

Gain = 6 dB RL = 8 Ω

THD+N = 1%

THD+N = 10%

VCC − Supply Voltage − V

0.00

0.05

0.10

0.15

0.20

0.25

0.30

4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5

− Output Power − W

G016

Gain = 3.5 dB RL = 16 Ω

THD+N = 1%

THD+N = 10%

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

CROSSTALK (HP) OUTPUT POWER (SP)

FREQUENCY SUPPLY VOLTAGE

TYPICAL CHARACTERISTICS (continued)

vs vs

OUTPUT POWER (SP) OUTPUT POWER (HP)

SUPPLY VOLTAGE SUPPLY VOLTAGE

Figure 13. Figure 14.

vs vs

Figure 15. Figure 16.

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PO − Output Power − W

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

0.0 0.5 1.0 1.5 2.0 2.5 3.0

− Supply Current − A

G017

Gain = 6 dB RL = 4 Ω

VCC = 5.5 V

VCC = 4.5 V

VCC = 5 V

PO − Output Power − W

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

− Supply Current − A

G018

Gain = 6 dB RL = 8 Ω

VCC = 5.5 V

VCC = 4.5 V

VCC = 5 V

PO − Output Power − W

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

0.0 0.5 1.0 1.5 2.0 2.5 3.0

− Power Dissipation − W

G019

Gain = 6 dB RL = 4 Ω

VCC = 4.5 V

VCC = 5 V

VCC = 5.5 V

PO − Output Power − W

0.0

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00

− Power Dissipation − W

G020

Gain = 6 dB RL = 8 Ω

VCC = 4.5 V

VCC = 5 V

VCC = 5.5 V

TYPICAL CHARACTERISTICS (continued)

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

SUPPLY CURRENT (SP) SUPPLY CURRENT (SP)

vs vs

OUTPUT POWER OUTPUT POWER

Figure 17. Figure 18.

POWER DISSIPATION (SP) POWER DISSIPATION (SP)

vs vs

OUTPUT POWER OUTPUT POWER

Figure 19. Figure 20.

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VDD − V

4.0

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

5.0

4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5

− Regulator Output Voltage − V

G021

IL = −120 mA

IL = −10 mA

IL = −50 mA

IL = −1 mA

IL − Load Current − mA

3.0

3.2

3.4

3.6

3.8

4.0

4.2

4.4

4.6

4.8

5.0

0 25 50 75 100 125 150 175 200

− Supply Voltage − V

G022

VDD = 5.5 V

VDD = 4.5 V

VDD = 5 V

IL − Load Current − mA

0.00

0.01

0.02

0.03

0.04

0.05

0.06

0.07

0.08

0.09

0.10

0 20 40 60 80 100 120

Dropout Voltage − V

G023

LDO Voltage = 4.65 V

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

Input Level = 0.2 Vpp RL = 4 Ω VCC = 5 V

CMRR − Common−Mode Rejection Ratio − dB

G024

f − Frequency − Hz

20 100 1k 10k 20k

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

TYPICAL CHARACTERISTICS (continued)

REGULATOR OUTPUT VOLTAGE (LDO) SUPPLY VOLTAGE (LDO)

vs vs

SUPPLY VOLTAGE LOAD CURRENT

Figure 21. Figure 22.

DROPOUT VOLTAGE (LDO) COMMON-MODE REJECTION RATIO (SP)

vs vs

LOAD CURRENT FREQUENCY

Figure 23. Figure 24.

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−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

Input Level = 0.2 Vpp RL = 8 Ω VCC = 5 V

CMRR − Common−Mode Rejection Ratio − dB

G025

f − Frequency − Hz

20 100 1k 10k 20k

−80

−70

−60

−50

−40

−30

−20

−10

IO = 10 mA V

Ripple

= 0.2 Vpp

PSRR − Power Supply Rejection Ratio − dB

G026

f − Frequency − Hz

20 100 1k 10k 20k

−80

−70

−60

−50

−40

−30

−20

−10

PSRR − Power Supply Rejection Ratio − dB

G027

f − Frequency − Hz

20 100 1k 10k 20k

Gain = 6 dB RL = 8 Ω VCC = 5 V

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

PSRR − Power Supply Rejection Ratio − dB

G028

f − Frequency − Hz

Gain = 3.5 dB RL = 16 Ω VCC = 5 V

10 100 1k 10k 100k

TYPICAL CHARACTERISTICS (continued)

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

COMMON-MODE REJECTION RATIO (SP) POWER SUPPLY REJECTION RATIO (LDO)

vs vs

FREQUENCY FREQUENCY

Figure 25. Figure 26.

POWER SUPPLY REJECTION RATIO (SP) POWER SUPPLY REJECTION RATIO (SP)

vs vs

FREQUENCY FREQUENCY

Figure 27. Figure 28.

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RL − Load Resistance − Ω

100

150

200

250

300

350

400

450

500

− Output Power − mW

G029

fIN = 1 kHz Gain = 3.5 dB VDD = 5 V

THD+N = 10%

THD+N = 1%

10 100 1k

RL − Load Resistance − Ω

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

2.6

2.8

4 6 8 10 12 14 16 18 20 22 24 26 28 30

− Output Power − W

G030

fIN = 1 kHz Gain = 6 dB VDD = 5 V

THD+N = 10%

THD+N = 1%

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

TYPICAL CHARACTERISTICS (continued)

OUTPUT POWER (HP) OUTPUT POWER (SP)

vs vs

LOAD RESISTANCE LOAD RESISTANCE

Figure 29. Figure 30.

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TPA6040A4

LOUT+

SPKR_RIN–

SPKR_RIN+

SPGND

SPVDD

CPVDD

CPVSS

HPVSS

HP_OUTR

HP_OUTL

CPGND

C1P

C1N

LOUT-

BYPASS

GAIN1

GAIN0

VDD

SGND

HP_INL

HP_INR

REG_OUT

REG_EN

SPKRRightInput

SPKR_LIN+

SPKRLeftInput

SPKR_LIN–

4.5V-5.5V

10 Fm

Left

Speaker

Headphone

Output

HPVDD

SPVDD

ROUT+

ROUT-

Right

Speaker

3V-5.5V

1 Fm

SPGND

SPKR_EN

HP_EN

HeadphoneEnable

SpeakerEnable

0.47

RegulatorEnable

{

4-Step

GainControl

2.2

0.1

4.5V - 5.5 V

4.75V

(Output)

1 Fm

HP RightInput

HP LeftInput

0.47 Fm

1 Fm

0.47 Fm

3V-5.5V

4.5V-5.5V

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

APPLICATION INFORMATION

Figure 31. Single-Ended Input Application Circuit

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TPA6040A4

LOUT+

SPKR_RIN–

SPKR_RIN+

SPGND

SPVDD

CPVDD

CPVSS

HPVSS

HP_OUTR

HP_OUTL

CPGND

C1P

C1N

LOUT-

BYPASS

GAIN1

GAIN0

VDD

SGND

HP_INL

HP_INR

REG_OUT

REG_EN

SPKRRight(+)Input

SPKRRight(–)Input

SPKR_LIN+

SPKRLeft(+)Input

SPKRLeft(–)Input

SPKR_LIN–

4.5V-5.5V

10 Fm

Left

Speaker

Headphone

Output

HPVDD

SPVDD

ROUT+

ROUT-

Right

Speaker

3V-5.5V

1 Fm

SPGND

SPKR_EN

HP_EN

HeadphoneEnable

SpeakerEnable

0.47

RegulatorEnable

{

4-Step

GainControl

2.2

0.1

4.5V - 5.5 V

4.75V

(Output)

1 Fm

HP RightInput

HP LeftInput

0.47 Fm

1 Fm

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

APPLICATION INFORMATION (continued)

Power Enable Modes

The TPA6040A4 allows disable of any or all of the main circuit blocks when not in use in order to reduce operating power to an absolute minimum. The SPKR_EN control can be used to disable the speaker amplifier while the HP_EN can be used separately to turn off the headphone amplifier. The LDO also has an independent power control, REG_EN. With all circuit blocks disabled, the supply current in shutdown mode is only 5 µ A. See the General DC Electrical Characteristics for operating currents with each circuit block operating independently.

Speaker Amplifier Description

The speaker amplifier is capable of driving 2 W/ch of continuous RMS power into a 4- Ω load at 5 V. An internal 4-step control allows variation of the gain from 6 dB to 21.6 dB.

Fully Differential Amplifier

The TPA6040A4 speaker amplifier is a fully differential amplifier with differential inputs and outputs. The fully differential architecture consist of a differential amplifier and a common mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage that is equal to the differential input times the gain. The common-mode voltage at the output is biased around V input.

Figure 32. Differential Input Application Circuit

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/2 regardless of the common-mode voltage at the

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2pRIf

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

APPLICATION INFORMATION (continued)

One of the primary advantages of the fully differential amplifier is improved RF immunity. GSM handsets save power by turning on and off the RF transmitter at a rate of 217 Hz. The transmitted signal is picked up on input and output traces. The fully differential amplifier cancels the signal and others of this type much better than typical audio amplifiers.

Gain Setting via GAIN0 and GAIN1 Inputs

The gain of the TPA6040A4 is set by two terminals, GAIN0 and GAIN1. The gains listed in Table 1 are realized by changing the taps on the input resistors and feedback resistors inside the amplifier. This causes the input impedance (Z

GAIN1 GAIN0

) to vary as a function of the gain setting.

Gain Setting

AMPLIFIER GAIN

(dB)

TYPICAL TYPICAL

0 0 6 108 0 1 10 78 1 0 15.6 46 1 1 21.6 25

INPUT IMPEDANCE (k Ω )

Input Capacitor, C

The input capacitor allows the amplifier to bias the input signal to the proper dc level for proper operation. In this case, the input capacitor, CI, and the input impedance of the amplifier, RI, form a high-pass filter with the corner frequency determined in Equation 1. Figure 33 shows how the input capacitor and the input resistor within the amplifier interact.

Figure 33. Input Resistor and Input Capacitor

The value of C

is important to consider as it directly affects the low-frequency, or bass, performance of the

circuit. Furthermore, the input impedance changes with a change in volume. The higher the volume, the lower the input impedance is. To determine the appropriate capacitor value, reconfigure Equation 1 into Equation 2 . The value of the input resistor, RI, can be determined from Equation 2 .

(1)

(2)

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(RMS)

O(PP)

2 2

Power +

(RMS)

2x V

O(PP)

−V

O(PP)

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

Low-leakage tantalum or ceramic capacitors are recommended. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at VCC/2, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in each specific application. Recommended capacitor values are between 0.1 µ F and 1 µ F.

Windows Vista™ Premium Mode Specifications

Device Type Requirement TPA6040A4 Typical Performance

THD+N ≤ -65 dB FS [20 Hz, 20 kHz] -74 dB FS[20 Hz, 20 kHz]

Analog Speaker Output Jack Dynamic Range with Signal

= 8 Ω , FS = 0.707 Vrms) Present

Line Output Crosstalk ≤ -60 dB [20 Hz, 20 kHz] -100 dB [20 Hz, 20 kHz]

THD+N ≤ -45 dB FS [20 Hz, 20 kHz] -81 dB FS [20 Hz, 20 kHz]

Analog Headphone Out Jack ≤ -80 dB FS A-Weight -100 dB FS A-Weight (R

= 32 Ω , FS = 0.300Vrms)

Dynamic Range with Signal

Present

Headphone Output

Crosstalk

Bridge-Tied Load Versus Single-Ended Mode

Figure 34 shows a Class-AB audio power amplifier (APA) in a bridge-tied-load (BTL) configuration. The

TPA6040A4 speaker amplifier consists of two Class-AB differential amplifiers per channel driving the positive and negative terminals of the load. Specifically, differential drive means that as one side of the amplifier (the positive terminal, for example) is slewing up, the other side is slewing down, and vice versa. This doubles the voltage swing across the load as opposed to a ground-referenced load, or a single-ended load. Power is proportional to the square of the voltage. Plugging 2x VO(PP) into the power equation yields 4X the output power from the same supply rail and load impedance as would have been obtained with a ground-referenced load (see Equation 3 ).

Windows Premium Mobile Vista

Specifications

≤ -80 dB FS A-Weight -89 dB FS A-Weight

≤ -60 dB [20 Hz, 20 kHz] -82 dB [20 Hz, 20 kHz]

(3)

Figure 34. Differential Output Configuration

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O(PP)

–3dB

2pRLC

2pRLf

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

Figure 35. Single-Ended Configuration and Frequency Response

Bridge-tying the outputs in a typical computer audio, LCD TV, or multimedia LCD monitor application drastically increases output power. For example, if an amplifier in a single-ended configuration was capable of outputting a maximum of 250 mW for a given load with a supply voltage of 12 V, then that same amplifier would be able to output 1 W of power in a BTL configuration with the same supply voltage and load. In addition to the increase in output power, the BTL configuration does not suffer from the same low-frequency issues that plague the single-ended configuration. In a BTL configuration, there is no need for an output capacitor to block dc, so no unwanted filtering occurs. In addition, the BTL configuration saves money and space, as the dc-blocking capacitors needed for single-ended operation are large and expensive. For example, with an 8- Ω load in SE operation, the user needs a 1000- µ F capacitor to obtain a cutoff frequency below 20 Hz. This capacitor is expensive and large.

Headphone Amplifier Description

The headphone amplifier has a fixed gain of -1.5 V/V. It uses single-ended (SE) inputs. The DirectPath™ amplifier architecture operates from a single supply but makes use of an internal charge pump to provide a negative voltage rail. Combining the user-provided positive rail and the negative rail generated by the IC, the device operates in what is effectively a split supply mode. The output voltages are now centered at zero volts with the capability to swing to the positive rail or negative rail. The DirectPath™ amplifier requires no output dc blocking capacitors and does not place any voltage on the sleeve. The block diagram and waveform of

Figure 36 illustrate the ground-referenced headphone architecture. This is the architecture of the TPA6040A4.

Single-supply headphone amplifiers typically require dc-blocking capacitors. The capacitors are required because most headphone amplifiers have a dc bias on the outputs pin. If the dc bias is not removed, the output signal is severely clipped, and large amounts of dc current rush through the headphones, potentially damaging them. The left-side drawing in Figure 36 illustrates the conventional headphone amplifier connection to the headphone jack and output signal.

DC blocking capacitors are often large in value. The headphone speakers (typical resistive values of 16 Ω or 32 Ω ) combine with the dc blocking capacitors to form a high-pass filter. Equation 4 shows the relationship between the load impedance (R

can be determined using Equation 5 , where the load impedance and the cutoff frequency are known.

If fcis low, the capacitor must then have a large value because the load resistance is small. Large capacitance values require large package sizes. Large package sizes consume PCB area, stand high above the PCB, increase cost of assembly, and can reduce the fidelity of the audio output signal.

Two different headphone amplifier applications are available that allow for the removal of the output dc blocking capacitors. The capacitor-less amplifier architecture is implemented in the same manner as the conventional amplifier with the exception of the headphone jack shield pin. This amplifier provides a reference voltage, which

), the capacitor (C

), and the cutoff frequency (fC).

(4)

(5)

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OUT

GND

V /2

BIAS

Conventional

Capacitor-Less

GND

BIAS

DirectPath

(DCINPUT-BLOCKING)

1 2

2p RINC

2p fcINR

TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

is connected to the headphone jack shield pin. This is the voltage on which the audio output signals are centered. This voltage reference is half of the amplifier power supply to allow symmetrical swing of the output voltages. Do not connect the shield to any GND reference, or large currents will result. The scenario can happen if, for example, an accessory other than a floating GND headphone is plugged into the headphone connector. See the second block diagram and waveform in Figure 36 .

Figure 36. Amplifier Applications

Input-Blocking Capacitors

DC input-blocking capacitors block the dc portion of the audio source and allow the inputs to properly bias. Maximum performance is achieved when the inputs of the TPA6040A4 are properly biased. Performance issues such as pop are optimized with proper input capacitors.

The dc input-blocking capacitors can be removed, provided the inputs are connected differentially and within the input common-mode range of the amplifier, the audio signal does not exceed ± 3 V, and pop performance is sufficient.

is a theoretical capacitor used for mathematical calculations only. Its value is the series combination of the

dc input-blocking capacitors, C For example, if C

The two C

(DCINPUT-BLOCKING)

is equal to 0.22 µ F, then C

Equation 6 to calculate C

the TPA6040A4, R

Figure 32 for input impedance values. The frequency and/or capacitance can be determined when one of the

two values are given.

, using Equation 7 . Note that the differential input impedance changes with gain. See

(DCINPUT-BLOCKING)

capacitors form a high-pass filter with the input impedance of the TPA6040A4. Use

, then calculate the cutoff frequency using C

. Use Equation 6 to determine the value of C

(DCINPUT-BLOCKING)

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is equal to about 0.47 µ F.

and the differential input impedance of

(DCINPUT-BLOCKING)

(6)

(7)

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TPA6040A4

SLOS519A – APRIL 2007 – REVISED APRIL 2007

If a high-pass filter with a -3-dB point of no more than 20 Hz is desired over all gain settings, the minimum impedance would be used in the Equation 7 . The minimum input impedance for TPA6040A4 is 20 k Ω . The capacitor value by Equation 7 would be 0.399 µ F. However, this is C C

(DCINPUT-BLOCKING)

. Multiplying C

by 2 yields 0.80 µ F, which is close to the standard capacitor value of 1 µ F.

Place 1- µ F capacitors at each input terminal of the TPA6040A4 to complete the filter.

Charge Pump Flying Capacitor and CPVSS Capacitor

The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage. The CPVSS capacitor must be at least equal to the flying capacitor in order to allow maximum charge transfer. Low ESR capacitors are an ideal selection, and a value of 1 µF is typical.

Decoupling Capacitors

The TPA6040A4 is a DirectPath™ headphone amplifier that requires adequate power supply decoupling to ensure that the noise and total harmonic distortion (THD) are as low as possible. To filter high-frequency transients, spikes, and digital hash on the power line, use good low equivalent-series-resistance (ESR) ceramic capacitors, typically 1 µF. Find the smallest package possible, and place as close as possible to the device V lead. Placing the decoupling capacitors close to the TPA6040A4 is important for the performance of the amplifier. Use a 10 µ F or greater capacitor near the TPA6040A4 to filter lower frequency noise signals; however, the high PSRR of the TPA6040A4 makes the 10- µ F capacitor unnecessary in most applications.

, and the desired value is for

Midrail Bypass Capacitor, C

The midrail bypass capacitor, C shutdown mode, C

BYPASS

time of approximately 30 ms. C

determines the rate at which the amplifier starts up. A 1- µ F capacitor yields a start-up

BYPASS

(BYPASS)

BYPASS

, has several important functions. During start-up or recovery from

also reduces the noise coupled into the output signal by the power supply. This improves the power supply ripple rejection (PSRR) of the amplifier. Ceramic or polyester capacitors with low ESR and values in the range of 0.47 µ F to 1 µ F are recommended.

LOW DROPOUT REGULATOR (LDO) DESCRIPTION

The TPA6040A4 contains a 4.75-V output low dropout regulator (LDO) capable of providing a maximum of 120 mA with a drop of less than 150 mV from the 5-V supply. This can be used to power an external CODEC. A 10- µ F decoupling capacitor is recommended at the output of the LDO as well as 0.1- µ F capacitor to filter high-frequency noise from the supply line.

LAYOUT RECOMMENDATIONS

Solder the exposed thermal pad (metal pad on the bottom of the part) on the TPA6040A4 QFN package to a pad on the PCB.

It is important to keep the TPA6040A4 external components close to the body of the amplifier to limit noise pickup. One should lay out the differential input leads symmetrical and close together to take advantage of the inherent common mode rejection of the TPA6040A4. The layout of the TPA6040A4 evaluation module (EVM) is a good example of component placement and the layout files are available at ti.com .

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PACKAGE OPTION ADDENDUM

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4-Feb-2008

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package

Drawing

Pins Package

Qty

Eco Plan

TPA6040A4RHBR ACTIVE QFN RHB 32 3000 Green (RoHS &

no Sb/Br)

TPA6040A4RHBRG4 ACTIVE QFN RHB 32 3000 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(2)

Lead/Ball Finish MSL Peak Temp

Call TI Level-3-260C-168 HR

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

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TAPE AND REEL INFORMATION

11-Mar-2008

*All dimensions are nominal

Device Package

TPA6040A4RHBR QFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2

Type

Package

Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

11-Mar-2008

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TPA6040A4RHBR QFN RHB 32 3000 346.0 346.0 29.0

Pack Materials-Page 2

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TEXAS INSTRUMENTS TPA6040A4 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES DESCRIPTION

APPLICATIONS

SIMPLIFIED APPLICATION CIRCUIT

ABSOLUTE MAXIMUM RATINGS

DISSIPATION RATINGS

RECOMMENDED OPERATING CONDITIONS

GENERAL DC ELECTRICAL CHARACTERISTICS

SPEAKER AMPLIFIER DC CHARACTERISTICS

SPEAKER AMPLIFIER AC CHARACTERISTICS

HEADPHONE AMPLIFIER DC ELECTRICAL CHARACTERISTICS

HEADPHONE AMPLIFIER AC CHARACTERISTICS

LDO CHARACTERISTICS

TYPICAL CHARACTERISTICS

APPLICATION INFORMATION

Power Enable Modes

Speaker Amplifier Description

Fully Differential Amplifier

Gain Setting via GAIN0 and GAIN1 Inputs

Bridge-Tied Load Versus Single-Ended Mode

Headphone Amplifier Description

Input-Blocking Capacitors

Charge Pump Flying Capacitor and CPVSS Capacitor

Decoupling Capacitors

LOW DROPOUT REGULATOR (LDO) DESCRIPTION

LAYOUT RECOMMENDATIONS