CODEC
VDD
SPKR
SPKR_LIN–
BYPASS
SGND
HP_EN
SPKR_EN
SPKR_RIN–
SPKR_LIN+
HP_INR
HP_INL
HPVDD
CPVDD
VDD
REG_EN
REG_OUT
SPKR_RIN+
ROUT+
LOUT+
ROUT–
LOUT–
SPVDD
CPVSS
C1P
HPVSS
SPGND
CPGND
C1N
GAIN0
GAIN1
OUTL
OUTR
HPR
HPL
SPKL
TPA6040A4
Shutdown
Control
3V – 5.5V
4.5V – 5.5V
RegulatorEnable
4.75V(ToCODEC)
4.5V – 5.5V
Gain
Control
2-W STEREO AUDIO POWER AMPLIFIER
WITH DirectPath™ STEREO HEADPHONE DRIVE AND REGULATOR
FEATURES DESCRIPTION
• Microsoft™Windows Vista™ Compliant
• Fully Differential Architecture and High PSRR
Provide Excellent RF Rectification Immunity
• 2-W, 10% THD+N Into 4- Ω Speakers and
85-mW, 1% THD+N Into 16- Ω Headphones
From 5-V Supply
• DirectPath™ Headphone Amplifier Eliminates
Output Capacitors
• Internal 4-Step Speaker Gain Control: 6, 10,
15.6, 21.6 dB and Fixed –1.5-V/V Headphone
• 4.75-V Low Dropout Regulator for CODEC
• Independent Shutdown Controls for Speaker,
Headphone Amplifier, and Low Dropout
Regulator (LDO)
• Output Short-Circuit and Thermal Protection
(1)
TPA6040A4
SLOS519A – APRIL 2007 – REVISED APRIL 2007
The TPA6040A4 is a stereo audio power amplifier
and DirectPath™ headphone amplifier in a thermally
enhanced, space-saving, 32-pin QFN package. The
speaker amplifier is capable of driving 2 W per
channel continuously into 4- Ω loads at 5 V. The
headphone amplifier achieves a minimum of 85 mW
at 1% THD+N from a 5-V supply. A built-in internal
4-step gain control for the speaker amplifier and a
fixed –1.5 V/V gain for the headphone amplifier
minimizes external components needed.
Independent shutdown control and dedicated inputs
for the speaker and headphone allow the
TPA6040A4 to simultaneously drive both
headphones and internal speakers. Differential inputs
to the speaker amplifiers offer superior power-supply
and common-mode noise rejection.
APPLICATIONS
• Notebook Computers
• Portable DVD
(1) US Patent Number 5289137
SIMPLIFIED APPLICATION CIRCUIT
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DirectPath, PowerPAD are trademarks of Texas Instruments.
Microsoft, Windows Vista are trademarks of Microsoft Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
Bias Control
LDO
HP_EN
BYPASS
REG_EN
SPKR_RIN+
SPKR_RIN–
Gain Control
SPKR_LIN+
SPKR_LIN–
Charge Pump
CPVDD
CPVSS
CPGND
C1P C1N
VDD
+
–
–
+
+
–
–
+
ROUT+
ROUT–
SPVDD
SPGND
LOUT+
LOUT–
SPVDD
SPGND
HP_INL
HP_INR
HP_OUTL
HP_OUTR
HPVDD
–
–
+
+
1 m F
1 m F
1 Fm
GND
GAIN0
GAIN1
HPVDD
HPVSS
SPKR_EN
0.47 Fm
1 Fm
1 m F
1 m F
1 m F
1 m F
1 m F
1 m F
1 m F
1 m F
HPVDD
SPGND
3 V 5.5 V –
SPVDD 4.5 V – 5.5 V
HPVSS
(4.75V Output)
REG_OUT
TPA6040A4
SLOS519A – APRIL 2007 – REVISED APRIL 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Functional Block Diagram
2
Submit Documentation Feedback
BYPASS SPKR_RIN–
Thermal
Pad
CPVDD
GAIN1
32931103011291228132714261525
16
24
1
23
2
22
3
21
4
20
5
19 6
18 7
17 8
SPKR_EN
GAIN0
HP_EN
VDD
SPGND
REG_OUT
ROUT+
SGND
ROUT–
HP_INL
SPVDD
HP_INR
HPVDD
REG_EN
TPA6040A4RHB
(TOP VIEW)
SPKR_RIN+
C1P
SPKR_LIN+
CPGND
SPKR_LIN–
C1N
SPGND
CPVSS
LOUT+
HPVSS
LOUT–
HP_OUTR
SPVDD
HP_OUTL
SLOS519A – APRIL 2007 – REVISED APRIL 2007
AVAILABLE PACKAGE OPTIONS
T
A
PACKAGED DEVICE
32-Pin QFN (RHB)
–40 ° C to 85 ° C TPA6040A4RHB RHB
(1) The RHB package is available taped and reeled. To order a taped and reeled part, add the suffix R to
the part number (e.g., TPA6040A4RHBR).
(2) For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI website at www.ti.com .
(1) (2)
SYMBOL
TPA6040A4
TERMINAL FUNCTIONS
TERMINAL
NAME NO.
SPKR_RIN– 1 I Right-channel negative differential audio input for speaker amplifier
SPKR_RIN+ 2 I Right-channel positive differential audio input for speaker amplifier
SPKR_LIN+ 3 I Left-channel positive differential audio input for speaker amplifier
SPKR_LIN– 4 I Left-channel negative differential audio input for speaker amplifier
SPGND 5, 21 P Speaker power ground
LOUT+ 6 O Left-channel positive audio output
LOUT– 7 O Left-channel negative audio output
SPVDD 8, 18 P Supply voltage terminal for speaker amplifier
CPVDD 9 P Charge pump positive supply, connect to HPVDD via star connection
C1P 10 I/O Charge pump flying capacitor positive terminal
CPGND 11 P Charge pump ground
C1N 12 I/O Charge pump flying capacitor negative terminal
CPVSS 13 P Charge pump output (negative supply for headphone amplifier), connect to HPVSS
HPVSS 14 P Headphone amplifier negative supply, connect to CPVSS
HP_OUTR 15 O Right-channel capacitor-free headphone output
HP_OUTL 16 O Left-channel capacitor-free headphone output
HPVDD 17 P Headphone amplifier supply voltage, connect to CPVDD
ROUT– 19 O Right-channel negative audio output
I/O/P DESCRIPTION
Submit Documentation Feedback
3
TPA6040A4
SLOS519A – APRIL 2007 – REVISED APRIL 2007
TERMINAL FUNCTIONS (continued)
TERMINAL
NAME NO.
ROUT+ 20 O Right-channel positive audio output
HP_EN 22 I Headphone channel enable logic input; active high enable. HIGH=ENABLE.
SPKR_EN 23 I Speaker channel enable logic input; active low enable. LOW=ENABLE.
BYPASS 24 P Common-mode bias voltage for speaker preamplifiers
REG_EN 25 I Enable pin (Active HIGH) for turning on/off LDO. HIGH=ENABLE
HP_INR 26 I Headphone right-channel audio input
HP_INL 27 I Headphone left-channel audio input
SGND 28 P Signal ground, connect to CPGND and SPGND
REG_OUT 29 O Regulated 4.75-V output
VDD 30 P Positive power supply
GAIN0 31 I Bit 0, MSB, of gain select bits
GAIN1 32 I Bit 1, LSB, of gain select bits
Thermal Pad Die Pad P
I/O/P DESCRIPTION
Solder the thermal pad on the bottom of the QFN package to the GND plane of the PCB. It is required for
mechanical stability and will enhance thermal performance.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Supply voltage HPVDD, VDD, SPVDD, CPVDD -0.3 to 6 V
SPKR_LIN+, SPKR_LIN-, SPKR_RIN+, SPKR_RIN-, -0.3 to 6.3
V
Input voltage V
I
Continuous total power dissipation See Dissipation Rating Table
T
Operating free-air temperature range -40 to 85 ° C
A
T
Operating junction temperature range -40 to 150 ° C
J
T
Storage temperature range -65 to 150 ° C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C
Electrostatic discharge HBM for HP_OUTL and HP_OUTR 8 kV
Electrostatic discharge,
all other pins
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
HP_EN,GAIN0, GAIN1, SPK_EN, REG_EN
HP_INL, HP_INR HP Enabled -3.5 to 3.5
HP_INL, HP_INR HP not Enabled -0.3 to 3.5
CDM 500 V
HBM 2 kV
(1)
VALUE UNIT
DISSIPATION RATINGS
PACKAGE
(1) The PowerPAD™ must be soldered to a thermal land on the printed-circuit board. Refer to the Texas Instruments document,
PowerPAD™ Thermally Enhanced Package application report (literature number SLMA002) for more information regarding the
PowerPAD™ package.
(1)
RHB 5.06 W 40 mW/ ° C 4.04 W 3.23 W
TA≤ 25 ° C DERATING FACTOR TA= 70 ° C TA= 85 ° C
RECOMMENDED OPERATING CONDITIONS
Supply voltage VDD, SPVDD 4.5 5.5 V
Supply voltage HPVDD, CPVDD 3 5.5 V
4
MIN MAX UNIT
Submit Documentation Feedback
RECOMMENDED OPERATING CONDITIONS (continued)
V
High-level input voltage SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN 2 V
IH
V
Low-level input voltage SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN 0.8 V
IL
T
Operating free-air temperature -40 85 ° C
A
GENERAL DC ELECTRICAL CHARACTERISTICS
TA= 25 ° C, VDD = SPVDD = HPVDD = CPVDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
IH
I
IL
I
DD(Speaker)
I
DD(HP)
I
DD(REG)
I
DD(SD)
High-level input current 0.02 1 µ A
Low-level input current 0.02 1 µ A
Supply current, speaker amplifier
ONLY enabled
Supply current, headphone
amplifier ONLY enabled
Supply current, regulator ONLY
enabled
Supply current, shutdown mode SPKR_EN = 2 V, HP_EN = REG_EN = 0 V 2.5 5 µ A
SPKR_EN, HP_EN, GAIN0, GAIN1,
REG_EN = VDD
SPKR_EN, HP_EN, GAIN0, GAIN1,
REG_EN = 0 V
SPKR_EN = 0 V, HP_EN = REG_EN = 0 V 5 12 mA
SPKR_EN = HP_EN = 2 V, REG_EN = 0 V 7.5 14 mA
SPKR_EN = REG_EN = 2 V, HP_EN = 0 V 0.65 1 mA
TPA6040A4
SLOS519A – APRIL 2007 – REVISED APRIL 2007
MIN MAX UNIT
SPEAKER AMPLIFIER DC CHARACTERISTICS
TA= 25 ° C, VDD = SPVDD = 5 V, RL= 4 k Ω , Gain = 6 dB (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
| V
| Output offset voltage (measured differentially) Inputs AC-coupled to GND, Gain = 6 dB 0.5 10 mV
OO
PSRR Power supply rejection ratio VDD = SPVDD = 4.5 V to 5.5 V -60 -74 dB
SPEAKER AMPLIFIER AC CHARACTERISTICS
TA= 25 ° C, VDD = SPVDD = 5 V, RL= 4 Ω , Gain = 6 dB (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
THD+N = 1%, f = 1 kHz, RL= 8 Ω 1.25
P
O
Output power
THD+N Total harmonic distortion plus noise
kSVR Supply ripple rejection ratio -60 dB
SNR Signal-to-noise rejection ratio 90 dB
Crosstalk (Left-Right; Right-Left)
Vn Noise output voltage 30 µ Vrms
Z
I
Input Impedance Gain = 21.6 dB 15 20 k Ω
G Gain dB
Gain Matching Channel-to Channel 0.01 dB
Start-up time from shutdown CBYPASS = 0.47 µ F 30 ms
THD+N = 10%, f = 1 kHz, RL= 8 Ω 1.5
THD+N = 1%, f = 1 kHz, RL= 4 Ω 2 W
THD+N = 10%, f = 1 kHz, RL= 4 Ω 2.3
PO= 1 W, RL= 8 Ω , f = 20 Hz to 20 kHz 0.1%
PO= 0.5 W, RL= 8 Ω , f = 20 Hz to 20 kHz 0.08%
f = 1 kHz, CBYPASS = 0.47 µ F,
V
= 200 mVp-p
RIPPLE
Maximum output at THD+N <1%, f = 1 kHz,
Gain = 6 dB
f = 1 kHz, Po= 1 W, Gain = 6 dB -80 dB
f = 10 kHz, Po= 1 W, Gain = 6 dB -75 dB
CBYPASS = 0.47 µ F, f = 20 Hz to 20 kHz,
Gain = 6 dB, No weighting
GAIN0, GAIN1 = 0.8 V 5.4 6 6.6
GAIN0 = 0.8 V; GAIN1 = 2 V 9.4 10 10.6
GAIN0 = 2 V, GAIN1 = 0.8 V 15 15.6 16.2
GAIN0, GAIN1 = 2 V 21 21.6 22.2
Submit Documentation Feedback
5
TPA6040A4
SLOS519A – APRIL 2007 – REVISED APRIL 2007
HEADPHONE AMPLIFIER DC ELECTRICAL CHARACTERISTICS
TA= 25 ° C, HPVDD = CPVDD = VDD = 5 V, RL= 16 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
| V
| Output offset voltage Inputs grounded 1 3 mV
OS
PSRR Power supply rejection ratio HPVDD = 4.5 V to 5.5 V -75 -100 dB
HEADPHONE AMPLIFIER AC CHARACTERISTICS
TA= 25 ° C, HPVDD = 5 V, RL= 16 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power (outputs in phase) mW
THD+N Total harmonic distortion plus noise
Dynamic Range with Signal Present A-Weighted, f = 20 Hz to 20 kHz -100 dB FS
kSVR Supply ripple rejection ratio f = 1 kHz, 200-mVpp ripple -60 dB
Crosstalk Po= 35 mW, f = 20 Hz to 20 kHz -80 dB
SNR Signal-to-noise ratio Maximum output at THD+N 1%, f = 1 kHz 95 dB
V
n
Z
I
Noise output voltage f = 20 Hz to 20 kHz, No weighting 20 µ Vrms
Input Impedance 15 20 k Ω
Gain Closed-loop voltage gain RL= 16 Ω -1.45 -1.5 -1.55 V/V
Start-up time from shutdown 5 ms
THD+N = 10%, Rl = 16 Ω , f = 1 kHz 200
THD+N = 10%, Rl = 32 Ω , f = 1 kHz 100
PO= 85 mW, f = 20 Hz to 20 kHz,
RL= 16 Ω
PO= 50 mW, f = 20 Hz to20 kHz,
RL= 32 Ω
0.03%
0.04%
LDO CHARACTERISTICS
TA= 25 ° C, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
Input voltage V
I
I
Continuous output current 120 mA
O
V
Output voltage 0 < IO< 120 mA; 4.9 V < Vin < 5.5 V 4.65 4.75 4.85 V
O
Dropout voltage IO= 120 mA 60 100 mV
Line regulation IL= 5 mA; 4.9 V < Vin < 5.5 V 3 12 mV
Load regulation IL= 0 – 120 mA, Vin = 5 V 0.13 0.23 mV/ mA
Power supply ripple rejection V
DD
= 4.9V, IL= 10 mA f = 100 Hz 46 dB
DD
4.5 5.5 V
6
Submit Documentation Feedback
TYPICAL CHARACTERISTICS
f − Frequency − Hz
20 100 1k 10k
THD+N − Total Harmonic Distortion + Noise − %
0.005
0.1
1
20k
Gain = 6 dB
RL = 4 Ω
VCC = 5 V
G001
0.01
PO = 1.5 W
PO = 1 W
PO = 0.25 W
f − Frequency − Hz
20 100 1k 10k
THD+N − Total Harmonic Distortion + Noise − %
0.005
0.1
1
20k
Gain = 6 dB
RL = 8 Ω
VCC = 5 V
G002
0.01
PO = 1 W
PO = 0.25 W
PO = 0.1 W
f − Frequency − Hz
10 100 1k 10k
THD+N − Total Harmonic Distortion + Noise − %
0.001
0.01
1
100k
G003
0.1
PO = 100 mW
Gain = 3.5 dB
RL = 16 Ω
VCC = 5 V
PO = 50 mW
PO = 2.8 mW
f − Frequency − Hz
10 100 1k 10k
THD+N − Total Harmonic Distortion + Noise − %
0.001
0.01
1
100k
G004
0.1
Gain = 3.5 dB
RL = 32 Ω
VCC = 5 V
PO = 1.4 mW
PO = 50 mW
PO = 25 mW
Default graph conditions: Vcc = 5 V, Freq = 1 kHz, AES17 Filter.
TPA6040A4
SLOS519A – APRIL 2007 – REVISED APRIL 2007
TOTAL HARMONIC DISTORTION + NOISE (SP) TOTAL HARMONIC DISTORTION + NOISE (SP)
vs vs
FREQUENCY FREQUENCY
Figure 1. Figure 2.
TOTAL HARMONIC DISTORTION + NOISE (HP) TOTAL HARMONIC DISTORTION + NOISE (HP)
vs vs
FREQUENCY FREQUENCY
Figure 3. Figure 4.
Submit Documentation Feedback
7
PO − Output Power − W
10m 100m 1
THD+N − Total Harmonic Distortion + Noise − %
0.01
0.1
20
4
Gain = 6 dB
RL = 4 Ω
G005
1
10
VCC = 4.5 V
VCC = 5 V
VCC = 5.5 V
PO − Output Power − W
10m 100m 1
THD+N − Total Harmonic Distortion + Noise − %
0.01
0.1
20
4
Gain = 6 dB
RL = 8 Ω
G006
1
10
VCC = 4.5 V
VCC = 5 V
VCC = 5.5 V
PO − Output Power − W
100µ 1m 100m
THD+N − Total Harmonic Distortion + Noise − %
0.001
0.01
10
1
Gain = 3.5 dB
RL = 16 Ω
VCC = 5 V
G007
0.1
1
10m
In Phase
VCC = 5 V
PO − Output Power − W
100µ 1m 100m
THD+N − Total Harmonic Distortion + Noise − %
0.001
0.01
10
1
Gain = 3.5 dB
RL = 32 Ω
VCC = 5 V
G008
0.1
1
10m
VCC = 5 V
In Phase
TPA6040A4
SLOS519A – APRIL 2007 – REVISED APRIL 2007
TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION + NOISE (SP) TOTAL HARMONIC DISTORTION + NOISE (SP)
vs vs
OUTPUT POWER OUTPUT POWER
Figure 5. Figure 6.
TOTAL HARMONIC DISTORTION + NOISE (HP) TOTAL HARMONIC DISTORTION + NOISE (HP)
vs vs
OUTPUT POWER OUTPUT POWER
8
Figure 7. Figure 8.
Submit Documentation Feedback
−140
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
f − Frequency − Hz
Gain = 6 dB
PO = 1 W
RL = 4 Ω
VCC = 5 V
Crosstalk − dB
10 100 1k 100k 10k
G009
L to R
R to L
−140
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
f − Frequency − Hz
Gain = 6 dB
PO = 1 W
RL = 8 Ω
VCC = 5 V
Crosstalk − dB
10 100 1k 100k 10k
G010
L to R
R to L
−140
−130
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
f − Frequency − Hz
Gain = 6 dB
PO = 2 W
RL = 4 Ω
VCC = 5 V
Crosstalk − dB
10 100 1k 100k 10k
G011
Left SPKR to LDO
Right SPKR to LDO
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
f − Frequency − Hz
Gain = 3.5 dB
PO = 35 mW
RL = 16 Ω
VCC = 5 V
Crosstalk − dB
10 100 1k 100k 10k
G012
L to R
R to L
SLOS519A – APRIL 2007 – REVISED APRIL 2007
TYPICAL CHARACTERISTICS (continued)
CROSSTALK (SP) CROSSTALK (SP)
vs vs
FREQUENCY FREQUENCY
TPA6040A4
Figure 9. Figure 10.
CROSSTALK (LDO) CROSSTALK (HP)
vs vs
FREQUENCY FREQUENCY
Figure 11. Figure 12.
Submit Documentation Feedback
9