TEXAS INSTRUMENTS TPA4861 Technical data

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1 2 3 4
8 7 6 5
SHUTDOWN
BYPASS
IN+ IN–
VO2 GND V
DD
VO1
D PACKAGE
(TOP VIEW)
Audio
Input
Bias
Control
V
DD
1 W
6
5
8
7
VO1
VO2
V
DD
1
2
34IN+
IN–
BYPASS
SHUTDOWN
VDD/2
C
I
R
I
R
F
C
S
C
B
– +
– +
GND
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
1-W MONO AUDIO POWER AMPLIFIER

FEATURES

1-W BTL Output (5 V, 0.11 % THD+N)
3.3-V and 5-V Operation
No Output Coupling Capacitors Required
Shutdown Control (I
Uncompensated Gains of 2 to 20 (BTL Mode)
Surface-Mount Packaging
Thermal and Short-Circuit Protection
High Supply Ripple Rejection Ratio (56 dB at
1 kHz)
LM4861 Drop-In Compatible

DESCRIPTION

The TPA4861 is a bridge-tied load (BTL) audio power amplifier capable of delivering 1 W of continuous average power into an 8- load at 0.2% THD+N from a 5-V power supply in voiceband frequencies (f < 5 kHz). A BTL configuration eliminates the need for external coupling capacitors on the output in most applications. Gain is externally configured by means of two resistors and does not require compensation for settings of 2 to 20. Features of the amplifier are a shutdown function for power-sensitive applications as well as internal thermal and short-circuit protection. The TPA4861 works seamlessly with TI's TPA4860 in stereo applications. The amplifier is available in an 8-pin SOIC surface-mount package that reduces board space and facilitates automated assembly.
DD
= 0.6 µA)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1996–2004, Texas Instruments Incorporated
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TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
T
A
–40°C to 85°C TPA4861D
(1) The D package is available tape and reeled. To order a tape and reeled part, add the suffix R to the part number (e.g., TPA4861DR).
Terminal Functions
TERMINAL
NAME NO.
BYPASS 2 I GND 7 GND is the ground connection.
IN- 4 I IN- is the inverting input. IN- is typically used as the audio input terminal. IN+ 3 I IN+ is the noninverting input. IN+ is typically tied to the BYPASS terminal. SHUTDOWN 1 I SHUTDOWN places the entire device in shutdown mode when held high (I VO1 5 O VO1 is the positive BTL output. VO2 8 O VO2 is the negative BTL output. V
DD
I/O DESCRIPTION
BYPASS is the tap to the voltage divider for internal mid-supply bias. This terminal should be connected to a
0.1-µF 1.0-µF capacitor when used as an audio power amplifier.
6 V
is the supply voltage terminal.
DD
PACKAGED DEVICE
SMALL OUTLINE
(1)
DD
(D)
~ 0.6 µA).

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)
V V
T T T
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
Supply voltage 6 V
DD
Input voltage –0.3 V to V
I
Continuous total power dissipation Internally Limited (see Dissipation Rating Table) Operating free-air temperature range –40°C to 85°C
A
Operating junction temperature range –40°C to 150°C
J
Storage temperature range –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1)
UNIT
+0.3 V
DD

DISSIPATION RATING TABLE

PACKAGE TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C
D 725 mW 5.8 mW/°C 464 mW 377 mW

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT
V
Supply voltage 2.7 5.5 V
DD
V
= 3 V 1.25 2.7 V
V
Common-mode input voltage
IC
T
Operating free-air temperature –40 85 °C
A
DD
V
= 5 V 1.25 4.5 V
DD
2
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SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004

ELECTRICAL CHARACTERISTICS

at specified free-air temperature, V
PARAMETER TEST CONDITIONS UNIT
V PSRR Power supply rejection ratio (VDD/V I
DD
I
DD(SD)
(1) At 3 V < V
Output offset voltage See
OO
Supply current 2.5 mA Supply current, shutdown 0.6 µA
< 5 V the dc output voltage is approximately VDD/2.
DD
= 3.3 V (unless otherwise noted)
DD
) V
OO
MIN TYP MAX
(1)
= 3.2 V to 3.4 V 75 dB
DD

OPERATING CHARACTERISTICS

V
= 3.3 V, TA= 25°C, RL= 8
DD
PARAMETER TEST CONDITIONS UNIT
P
Output power
O
B
Maximum output power bandwidth Gain = –10 V/V, THD = 2% 20 kHz
OM
B
Unity-gain bandwidth Open Loop 1.5 MHz
1
Supply ripple rejection ratio
V
Noise output voltage
n
(1)
BTL f = 1 kHz, CB= 0.1 µF 56 dB SE f = 1 kHz, CB= 0.1 µF 30 dB
(2)
THD = 0.2%, f = 1 kHz, AV= –2 V/V 400 mW THD = 2%, f = 1 kHz, AV= –2 V/V 500 mW
Gain = –2 V/V 20 µV
(1) Output power is measured at the output terminals of the device. (2) Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz.
MIN TYP MAX
TPA4861
TPA4861
20 mV
TPA4861

ELECTRICAL CHARACTERISTICS

at specified free-air temperature range, V
PARAMETER TEST CONDITION UNIT
V PSRR Power supply rejection ratio (VDD/V I
DD
I
DD(SD)
(1) At 3 V < V
Output offset voltage See
OO
Supply current 3.5 mA Supply current, shutdown 0.6 µA
< 5 V the dc output voltage is approximately VDD/2.
DD
= 5 V (unless otherwise noted)
DD
) V
OO

OPERATING CHARACTERISTICS

V
= 5 V, TA= 25°C, RL= 8
DD
PARAMETER TEST CONDITIONS UNIT
P
B B
Output power
O
Maximum output power bandwidth Gain = -10 V/V, THD = 2% 20 kHz
OM
Unity-gain bandwidth Open Loop 1.5 MHz
1
Supply ripple rejection ratio
V
Noise output voltage
n
(1) Output power is measured at the output terminals of the device. (2) Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz.
(1)
BTL f = 1 kHz, CB= 0.1 µF 56 dB SE f = 1 kHz, CB= 0.1 µF 30 dB
(2)
TPA4861
MIN TYP MAX
(1)
= 4.9 V to 5.1 V 70 dB
DD
20 mV
TPA4861
MIN TYP MAX
THD = 0.2%, f = 1 kHz, AV= -2 V/V 1000 mW THD = 2%, f = 1 kHz, AV= -2 V/V 1100 mW
Gain = -2 V/V 20 µV
3
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Number of Amplifiers
20
10
0
VOO − Output Offset Voltage − mV
25
15
5
−4 −3 −2 −1 0 1 2 3 4 5 6
VDD = 3.3 V
30
Number of Amplifiers
20
10
0
VOO − Output Offset Voltage − mV
25
15
5
VDD = 5 V
−4 −3 −2 −1 0 1 2 3 4 5 6
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
V
OO
I
DD
THD+N Total harmonic distortion plus noise
I
DD
V
n
k
SVR
Output offset voltage Distribution 1, 2 Supply current distribution vs Free-air temperature 3, 4
Supply current vs Supply voltage 22 Output noise voltage vs Frequency 23, 24 Maximum package power dissipation vs Free-air temperature 25 Power dissipation vs Output power 26, 27 Maximum output power vs Free-air temperature 28
Output power
Open-loop gain vs Frequency 31 Supply ripple rejection ratio vs Frequency 32, 33
DISTRIBUTION OF TPS4861 DISTRIBUTION OF TPS4861
OUTPUT OFFSET VOLTAGE OUTPUT OFFSET VOLTAGE

TYPICAL CHARACTERISTICS

Table of Graphs
FIGURE
vs Frequency 5, 6, 7, 8, 9, 10,11,15, 16,17,18 vs Output power 12, 13, 14, 19,20,21
vs Load resistance 29 vs Supply voltage 30
4
Figure 1. Figure 2.
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− Supply Current − mA
4
2.5
1.5
0.5
TA − Free-Air Temperature − °C
−40 25
3
2
1
VDD = 5 V
I
DD
3.5
85
5
4.5
Typical
− Supply Current − mA
3.5
2
1
0
TA − Free-Air Temperature − °C
−40 25
2.5
1.5
0.5
VDD = 3.3 V
I
DD
3
85
Typical
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 5 V PO = 1 W AV = −2 V/V RL = 8
CB = 0.1 µF
CB = 1 µF
THD+N − Total Harmonic Distortion Plus Noise − %
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 5 V PO = 1 W AV = −10 V/V RL = 8
CB = 0.1 µF
CB = 1 µF
THD+N − Total Harmonic Distortion Plus Noise − %
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
SUPPLY CURRENT DISTRIBUTION SUPPLY CURRENT DISTRIBUTION
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 3. Figure 4.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 5. Figure 6.
5
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20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 5 V PO = 1 W AV = −20 V/V RL = 8
CB = 0.1 µF
CB = 1 µF
THD+N − Total Harmonic Distortion Plus Noise − %
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 5 V PO = 0.5 W AV = −2 V/V RL = 8
CB = 0.1 µF
CB = 1 µF
THD+N − Total Harmonic Distortion Plus Noise − %
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 5 V PO = 0.5 W AV = −10 V/V RL = 8
CB = 0.1 µF
CB = 1 µF
THD+N − Total Harmonic Distortion Plus Noise − %
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 5 V PO = 0.5 W AV = −20 V/V RL = 8
CB = 0.1 µF
CB = 1 µF
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 7. Figure 8.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
6
Figure 9. Figure 10.
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20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 5 V AV = −10 V/V Single Ended
RL = 8 PO = 250 mW
RL = 32 PO = 60 mW
0.02
10
1
0.1
0.01
0.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 5 V AV = −2 V/V RL = 8 f = 20 Hz
CB = 0.1 µF
2
CB = 1 µF
0.02
10
1
0.1
0.01
0.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 5 V AV = −2 V/V RL = 8 f = 1 kHz
2
CB = 0.1 µF
CB = 1 µF
0.02
10
1
0.1
0.01
0.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 5 V AV = −2 V/V RL = 8 f = 20 kHz
CB = 0.1 µF
2
CB = 1 µF
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 11. Figure 12.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 13. Figure 14.
7
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20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V PO = 350 mW RL = 8 AV = −2 V/V
CB = 0.1 µF
CB = 1 µF
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V PO = 350 mW RL = 8 AV = −10 V/V
CB = 1 µF
CB = 0.1 µF
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V PO = 350 mW RL = 8 AV = −20 V/V
CB = 1 µF
CB = 0.1 µF
20
10
1
0.1
0.01 100 1 k 10 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V AV = −10 V/V Single Ended
RL = 32 PO = 60 mW
RL = 8 PO = 250 mW
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 15. Figure 16.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
8
Figure 17. Figure 18.
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0.02
10
1
0.1
0.01
0.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V AV = −2 V/V RL = 8 f = 20 Hz
CB = 0.1 µF
2
CB = 1.0 µF
0.02
10
1
0.1
0.01
0.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V AV = −2 V/V RL = 8 f = 1 kHz
CB = 0.1 µF
2
CB = 1 µF
20 m
10
1
0.1
0.01
0.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3.3 V AV = −2 V/V RL = 8 f = 20 kHz
CB = 1 µF
2
CB = 0.1 µF
− Supply Current − mAI DD
2.5
5
2
1
0
3 3.5
VDD − Supply Voltage − V
4 4.5 5 5.5
4
3
TA = 0°C
TA = 85°C
TA = 25°C
TA = −40°C
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 19. Figure 20.
TOTAL HARMONIC DISTORTION + NOISE SUPPLY CURRENT
vs vs
OUTPUT POWER SUPPLY VOLTAGE
Figure 21. Figure 22.
9
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20
10
3
10
2
10
1
1
100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 5 V
V01 +V02
V01
V02
− Output Noise Voltage − V n
Vµ
20
10
3
10
2
10
1
1
100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 3.3 V
V02
V01
V01 +V02
− Output Noise Voltage − V n
Vµ
0.4
0.2
0
−25 0 25 50 75
0.6
0.8
100
TA − Free-Air Temperature − °C
Maximum Package Power Dissipation − W
−50
1
0.75
0.5
0
0 0.75
PO − Output Power − W
0.25 0.5 1 1.25
VDD = 5 V
0.25
RL = 8
RL = 16
P
D
− Power Dissipation − W
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGE
vs vs
FREQUENCY FREQUENCY
Figure 23. Figure 24.
MAXIMUM PACKAGE POWER DISSIPATION POWER DISSIPATION
vs vs
FREE-AIR TEMPERATURE OUTPUT POWER
10
Figure 25. Figure 26.
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0.5
0.3
0.2
0
0 0.5
PO − Output Power − W
0.1 0.4
VDD = 3.3 V
0.4
RL = 8
RL = 16
0.1
0.2 0.3
P
D
− Power Dissipation − W
160
40
20
0
0 0.25 1.50.5 0.75 1
− Free-Air Temperature −
PO − Maximum Output Power − W
1.25
C
°
T
A
80
60
120
100
140
RL = 16
RL = 8
− Power Output − W
4
1.4
0.8
0.4
0
8 20 36
Load Resistance −
12 16 24 28 32
1
0.6
0.2
VDD = 5 V
VDD = 3.3 V
P
O
AV = −2 V/V f = 1 kHz CB = 0.1 µF THD+N 1%
1.2
4840 44
− Power Output − W
3
1.75
1
0.5
0
3.5 5 Supply Voltage − V
4 4.5 5.5
1.25
0.75
0.25
P
O
1.5
AV = −2 V/V f = 1 kHz CB = 0.1 µF THD+N 1%
2.5
2
RL = 8
RL = 4
RL = 16
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
POWER DISSIPATION MAXIMUM OUTPUT POWER
vs vs
OUTPUT POWER FREE-AIR TEMPERATURE
Figure 27. Figure 28.
OUTPUT POWER OUTPUT POWER
vs vs
LOAD RESISTANCE SUPPLY VOLTAGE
Figure 29. Figure 30.
11
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Open-Loop Gain − dB
10
100
60
20
−20
100 100 k
f − Frequency − Hz
VDD = 5 V RL = 8 CB = 0.1 µF
1 k 10 k 1 M 10 M
80
40
0
45°
−45°
−135°
−225°
0°
−90°
−180°
Phase
Gain
Phase
100
0
−90
−100 1 k 10 k 20 k
f − Frequency − Hz
CB = 0.1 µF
CB = 1 µF
−80
−70
−60
−50
−40
−30
−20
−10
VDD = 5 V RL = 8 Bridge-Tied Load
k
SVR
− Supply Ripple Rejection Ratio − dB
100
0
−90
−100 1 k 10 k 20 k
f − Frequency − Hz
CB = 0.1 µF
CB = 1 µF
−80
−70
−60
−50
−40
−30
−20
−10
VDD = 5 V RL = 8 Single Ended
k
SVR
− Supply Ripple Rejection Ratio − dB
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
OPEN-LOOP GAIN SUPPLY RIPPLE REJECTION RATIO
vs vs
FREQUENCY FREQUENCY
Figure 31. Figure 32.
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
12
Figure 33.
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Power
V
(rms)
2
R
L
V
(rms)
V
O(PP)
2 2
R
L
2x V
O(PP)
V
O(PP)
–V
O(PP)
V
DD
V
DD
f
(corner)
1
2R
LCC
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004

APPLICATION INFORMATION

BRIDGED-TIED LOAD VERSUS SINGLE-ENDED MODE

Figure 34 shows a linear audio power amplifier (APA) in a bridge-tied load (BTL) configuration. A BTL amplifier actually consists of two linear amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration, but initially, let us consider power to the load. The differential drive to the speaker means that as one side is slewing up the other side is slewing down and vice versa. This, in effect, doubles the voltage swing on the load as compared to a ground-referenced load. Plugging twice the voltage into the power equation, where voltage is squared, yields 4 times the output power from the same supply rail and load impedance (see Equation 1 ).
(1)
Figure 34. Bridge-Tied Load Configuration
In a typical computer sound channel operating at 5 V, bridging raises the power into an 8- speaker from a singled-ended (SE) limit of 250 mW to 1 W. In sound power that is a 6-dB improvement, which is loudness that can be heard. In addition to increased power, frequency response is a concern; consider the single-supply SE configuration shown in Figure 35 . A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 40 µF to 1000 µF) so they tend to be expensive, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency-limiting effect is due to the high-pass filter network created with the speaker impedance and the coupling capacitance and is calculated with Equation 2 .
For example, a 68-µF capacitor with an 8- speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor.
(2)
13
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R
L
C
C
V
O(PP)
V
O(PP)
V
DD
V
L(RMS)
V
O
I
DD
I
DD(RMS)
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Figure 35. Single-Ended Configuration
Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4 times the output power of the SE configuration. Internal dissipation versus output power is discussed further in the thermal considerations section.

BTL AMPLIFIER EFFICIENCY

Linear amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. The internal voltage drop has two components. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sine-wave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from V voltage drop multiplied by the RMS value of the supply current, I
DD(RMS)
, determines the internal power
dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power
supply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 36 ).
. The internal
DD
Figure 36. Voltage and Current Waveforms for BTL Amplifiers
Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are different between SE and BTL configurations. In an SE application, the current waveform is a half-wave rectified shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform, both the push and pull transistor are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency.
14
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I
DDRMS
2V
P
R
L
P
SUP
VDDI
DDRMS
VDD2V
P
R
L
Efficiency
P
L
P
SUP
Where:
P
L
V
LRMS
2
R
L
V
p
2
2R
L
V
LRMS
V
P
2
Efficiency of a BTL configuration
V
P
2V
DD
PLR
L
2
12
2V
DD
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Table 1 employs Equation 4 to calculate efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased, resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supply design. For a stereo 1-W audio system with 8- loads and a 5-V supply, the maximum draw on the power supply is almost 3.25 W.
(3)
(4)
OUTPUT POWER EFFICIENCY
(W) (%)
0.25 31.4 2.00 0.55
0.50 44.4 2.83 0.62
1.00 62.8 4.00 0.59
1.25 70.2 4.47
(1) High peak voltages cause the THD to increase.
A final point to remember about linear amplifiers, whether they are SE or BTL configured, is how to manipulate the terms in the efficiency equation to utmost advantage when possible. Note that in Equation 4 , V denominator. This indicates that as V
For example, if the 5-V supply is replaced with a 10-V supply (TPA4861 has a maximum recommended V
5.5 V) in the calculations of Table 1 , then efficiency at 1 W would fall to 31% and internal power dissipation would rise to 2.18 W from 0.59 W at 5 V. Then for a stereo 1-W system from a 10-V supply, the maximum draw would be almost 6.5 W. Choose the correct supply voltage and speaker impedance for the application.
Table 1. Efficiency Vs Output Power in 5-V 8- BTL Systems
PEAK-TO-PEAK INTERNAL
VOLTAGE DISSIPATION
goes down, efficiency goes up.
DD
(V) (W)
(1)
0.53
is in the
DD
of
DD
15
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Audio
Input
Bias
Control
VDD = 5 V
1-W Internal Speaker
6
5
8
7
VO1
VO2
V
DD
1
2
34IN+
IN−
BYPASS
SHUTDOWN (see Note A)
VDD/2
C
I
R
I
R
F
C
F
50 k 50 k
46 k
46 k
C
B
C
S
NOTE A: SHUTDOWN must be held low for normal operation and asserted high for shutdown mode.
− +
− +
Gain   2
R
F
R
I
Effective Impedance
RFR
I
RF R
I
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004

SELECTION OF COMPONENTS

Figure 37 is a schematic diagram of a typical notebook computer application circuit.
Figure 37. TPA4861 Typical Notebook Computer Application Circuit
Gain Setting Resistors, R
The gain for the TPA4861 is set by resistors R
BTL mode operation brings about the factor of 2 in the gain equation due to the inverting amplifier mirroring the voltage swing across the load. Given that the TPA4861 is a MOS amplifier, the input impedance is high;
and R
F
I
and RIaccording to Equation 5 .
F
consequently, input leakage currents are not generally a concern, although noise in the circuit increases as the value of R amplifier. Taken together, it is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 k and 20 k. The effective impedance is calculated in Equation 6 .
As an example, consider an input resistance of 10 k and a feedback resistor of 50 k. The gain of the amplifier would be –10 V/V, and the effective impedance at the inverting terminal would be 8.3 k, which is well within the recommended range.
For high-performance applications, metal film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of R formed from R
increases. In addition, a certain range of R
F
and the inherent input capacitance of the MOS input structure. For this reason, a small
F
values are required for proper start-up operation of the
F
above 50 k, the amplifier tends to become unstable due to a pole
F
compensation capacitor of approximately 5 pF should be placed in parallel with RF. This, in effect, creates a low-pass filter network with the cutoff frequency defined in Equation 7 .
16
(5)
(6)
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f
co(lowpass)
1
2R
FCF
f
co(highpass)
1
2R
I
C
I
C
I
1
2R
I
f
co
1
CB 25 k
1
CIR
I
For example if R
is 100 k and C
F
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
is 5 pF, then fcois 318 kHz, which is well outside of the audio range.
F
TPA4861
(7)
Input Capacitor, C
I
In the typical application, an input capacitor, CI, is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, C
and R
I
form a high-pass filter with the corner frequency
I
determined in Equation 8 .
The value of CIis important to consider, as it directly affects the bass (low-frequency) performance of the circuit. Consider the example where R
is 10 k and the specification calls for a flat bass response down to 40 Hz.
I
Equation 8 is reconfigured as Equation 9 .
In this example, C consideration for this capacitor is the leakage path from the input source through the input network (R the feedback resistor (R
is 0.40 µF; so, one would likely choose a value in the range of 0.47 µF to 1 µF. A further
I
) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
F
, CI) and
I
that reduces useful headroom, especially in high-gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at V
/2, which is likely higher
DD
than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
Power Supply Decoupling, C
S
The TPA4861 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device V
lead, works best. For filtering
DD
lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power amplifier is recommended.
(8)
(9)
Midrail Bypass Capacitor, C
B
The midrail bypass capacitor, CB, serves several important functions. During start-up or recovery from shutdown mode, C
determines the rate at which the amplifier starts up. This helps to push the start-up pop noise into the
B
subaudible range (so slow it cannot be heard). The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed from a 25-k source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in Equation 10 should be maintained.
As an example, consider a circuit where C
is 0.1 µF, CIis 0.22 µF and R
B
is 10 k. Inserting these values into
I
the Equation 10 , we get 400 454 which satisfies the rule. Bypass capacitor, CB, values of 0.1-µF to 1-µF ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance.
(10)
17
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Audio
Input
V
DD
6
5
8
VO1
VO2
V
DD
2
34IN+
IN−
BYPASS
VDD/2
C
I
R
I
R
F
C
S
C
B
250-mW External Speaker
CSE = 0.1 µF
RSE = 50
C
C
− +
− +
Gain  
R
F
R
I
1
CB 25 k
1
CIR
I
1
R
LCC
f
out high
1
2R
LCC
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004

SINGLE-ENDED OPERATION

Figure 38 is a schematic diagram of the recommended SE configuration. In SE mode configurations, the load should be driven from the primary amplifier output (V
1, terminal 5).
O
Figure 38. Singled-Ended Mode
Gain is set by the R
and RIresistors and is shown in Equation 11 . Because the inverting amplifier is not used to
F
mirror the voltage swing on the load, the factor of 2 is not included.
The phase margin of the inverting amplifier into an open circuit is not adequate to ensure stability, so a termination load should be connected to VO2. This consists of a 50- resistor in series with a 0.1-µF capacitor to ground. It is important to avoid oscillation of the inverting output to minimize noise and power dissipation.
The output coupling capacitor required in single-supply SE mode also places additional constraints on the selection of other components in the amplifier circuit. The rules described earlier still hold with the addition of the following relationship:
OUTPUT COUPLING CAPACITOR, C
In the typical single-supply SE configuration, an output coupling capacitor (C
C
) is required to block the dc bias at
C
the output of the amplifier thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 13 .
The main disadvantage, from a performance standpoint, is that the load impedances are typically small, which drives the low-frequency corner higher. Large values of C Consider the example where a C summarizes the frequency response characteristics of each configuration.
are required to pass low frequencies into the load.
of 68 µF is chosen and loads vary from 8 , 32 , and 47 k. Table 2
C
C
(11)
(12)
(13)
18
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160
40
20
0
0 0.25 1.50.5 0.75 1
– Free-Air Temperature –
PO – Maximum Output Power – W
1.25
C
°
T
A
80
60
120
100
140
RL = 16
RL = 8
VDD = 5 V
TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004
Table 2. Common Load Impedances vs Low-Frequency
Output Characteristics in SE Mode
R
L
8 68 µF 293 Hz
32 68 µF 73 Hz
47,000 68 µF 0.05 Hz
As Table 2 indicates, most of the bass response is attenuated into 8- loads, while headphone response is adequate and drive into line level inputs (a home stereo for example) is good.

SHUTDOWN MODE

The TPA4861 employs a shutdown mode of operation designed to reduce supply current, I minimum level during periods of nonuse for battery-power conservation. For example, during device sleep modes or when other audio-drive currents are used (i.e., headphone mode), the speaker drive is not required. The SHUTDOWN input terminal should be held low during normal operation when the amplifier is in use. Pulling SHUTDOWN high causes the outputs to mute and the amplifier to enter a low-current state, I SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable.

USING LOW-ESR CAPACITORS

Low-ESR capacitors are recommended throughout this applications section. A real capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor.
C
C
LOWEST FREQUENCY
, to the absolute
DD(q)
~ 0.6 µA.
DD(SD)

THERMAL CONSIDERATIONS

A prime consideration when designing an audio amplifier circuit is internal power dissipation in the device. The curve in Figure 39 provides an easy way to determine what output power can be expected out of the TPA4861 for a given system ambient temperature in designs using 5-V supplies. This curve assumes no forced airflow or additional heat sinking.
Figure 39. Free-Air Temperature vs Maximum Continuous Output Power
19
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TPA4861
SLOS163C – SEPTEMBER 1996 – REVISED JUNE 2004

5-V VERSUS 3.3-V OPERATION

The TPA4861 was designed for operation over a supply range of 2.7 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation, as these are considered to be the two most common standard voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain setting, or stability. Supply current is slightly reduced from 3.5 mA (typical) to 2.5 mA (typical). The most important consideration is that of output power. Each amplifier in TPA4861 can produce a maximum voltage swing of V when V power into an 8- load to less than 0.33 W before distortion begins to become significant.
Operation at 3.3-V supplies, as can be shown from the efficiency formula in Equation 4 , consumes approximately two-thirds of the supply power for a given output-power level than operation from 5-V supplies. When the application demands less than 500 mW, 3.3-V operation should be strongly considered, especially in battery-powered applications.
1 V. This means, for 3.3-V operation, clipping starts to occur when V
DD
= 4 V while operating at 5 V. The reduced voltage swing subsequently reduces maximum output
O(PP)
O(PP)
= 2.3 V as opposed to
20
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2007
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package Drawing
Pins Package
Qty
Eco Plan
TPA4861D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA4861DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA4861DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
TPA4861DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
(3)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
11-Mar-2008
*All dimensions are nominal
Device Package
TPA4861DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA4861DR SOIC D 8 2500 346.0 346.0 29.0
Pack Materials-Page 2
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