TEXAS INSTRUMENTS TPA4860 Technical data

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1 2 3 4 5 6 7 8

16 15 14 13 12 11 10

GND

SHUTDOWN

HP-SENSE

GND

BYPASS

HP-IN1 HP-IN2

GND

GND VO2 IN+ IN– V

GAIN VO1 GND

D PACKAGE

(TOP VIEW)

Audio

Input

Bias

Control

1 W

1, 4, 8, 9, 16

VO1

VO2

11 GAIN

IN+

IN–

BYPASS

HP-IN1 HP-IN2

HP-SENSE SHUTDOWN

VDD/2

Headphone

Plug

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

1-W MONO AUDIO POWER AMPLIFIER

FEATURES

• 1-W BTL Output (5 V, 0.2 % THD+N)

• 3.3-V and 5-V Operation

• No Output Coupling Capacitors Required

• Shutdown Control (I

• Headphone Interface Logic

• Uncompensated Gains of 2 to 20 (BTL Mode)

• Surface-Mount Packaging

• Thermal and Short-Circuit Protection

• High Power Supply Rejection(56-dB at 1 kHz)

• LM4860 Drop-In Compatible

DESCRIPTION

The TPA4860 is a bridge-tied load (BTL) audio power amplifier capable of delivering 1 W of continuous average power into an 8-Ω load at 0.4 % THD+N from a 5-V power supply in voiceband frequencies (f < 5 kHz). A BTL configuration eliminates the need for external coupling capacitors on the output in most applications. Gain is externally configured by means of two resistors and does not require compensation for settings of 2 to 20. Features of this amplifier are a shutdown function for power-sensitive applications as well as headphone interface logic that mutes the output when the speaker drive is not required. Internal thermal and short-circuit protection increases device reliability. It also includes headphone interface logic circuitry to facilitate headphone applications. The amplifier is available in a 16-pin SOIC surface-mount package that reduces board space and facilitates automated assembly.

= 0.6 µA)

TYPICAL APPLICATION CIRCUIT

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS

–40°C to 85°C TPA4860D

PACKAGED DEVICE SMALL OUTLINE (D)

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

V V

T T

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

Supply voltage 6 V

Input voltage –0.3 V to V

Continuous total power dissipation Internally Limited (See Dissipation Rating Table) Operating free-air temperature range –40°C to 85°C

Storage temperature range –65°C to 150°C

stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(1)

UNIT

+0.3 V

DISSIPATION RATING TABLE

PACKAGE TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C

D 1250 mW 10 mW/°C 800 mW 650 mW

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

Supply voltage 2.7 5.5 V

= 3.3 V 1.25 2.7 V

Common-mode input voltage

Operating free-air temperature –40 85 °C

= 5 V 1.25 4.5 V

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ELECTRICAL CHARACTERISTICS

at specified free-air temperature range, V

PARAMETER TEST CONDITIONS UNIT

DD(M)

DD(SD)

V V V V

(1) At 3 V < V

Output offset voltage (measured differentially) See

Supply ripple rejection ratio V Quiescent current 2.5 mA Quiescent current, mute mode 750 µA Quiescent current, shutdown mode 0.6 µA High-level input voltage (HP-IN) 1.7 V

Low-level input voltage (HP-IN) 1.7 V

High-level output voltage (HP-SENSE) IO= 100 µA 2.5 2.8 V

Low-level output voltage (HP-SENSE) IO= -100 µA 0.2 0.8 V

< 5 V the dc output voltage is approximately VDD/2.

= 3.3 V (unless otherwise noted)

OPERATING CHARACTERISTICS

= 3.3 V, TA= 25°C, RL= 8 Ω

PARAMETER TEST CONDITIONS UNIT

B B

Output power

Maximum output power bandwidth Gain = 10, THD = 2% 20 kHz

Unity-gain bandwidth Open loop 1.5 MHz

Supply ripple rejection ratio

Noise output voltage

(1) Output power is measured at the output terminals of the device. (2) Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz.

(1)

BTL f = 1 kHz 56 dB SE f = 1 kHz 30 dB

(2)

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

TPA4860

MIN TYP MAX

(1)

= 3.2 V to 3.4 V 75 dB

TPA4860

MIN TYP MAX

THD = 0.2%, f = 1 kHz, AV= 2 350 mW THD = 2%, f = 1 kHz, AV= 2 500 mW

Gain = 2 20 µV

5 20 mV

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TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

ELECTRICAL CHARACTERISTICS

at specified free-air temperature range, V

PARAMETER TEST CONDITIONS UNIT

Output offset voltage See

Supply ripple rejection ratio V I I I V V V V

(1) At 3 V < V

Supply current 3.5 mA

Supply current, mute 750 µA

DD(M)

Supply current, shutdown 0.6 µA

DD(SD)

High-level input voltage (HP-IN) 2.5 V

Low-level input voltage (HP-IN) 2.5 V

High-level output voltage (HP-SENSE) IO= 500 µA 2.5 2.8 V

Low-level output voltage (HP-SENSE) IO= -500 µA 0.2 0.8 V

< 5 V the dc output voltage is approximately VDD/2.

OPERATING CHARACTERISTICS

= 5 V, TA= 25°C, RL= 8 Ω

PARAMETER TEST CONDITIONS UNIT

Output power

Maximum output power bandwidth Gain = 10, THD = 2% 20 kHz

Unity-gain bandwidth Open loop 1.5 MHz

Supply ripple rejection ratio

Noise output voltage

(1) Output power is measured at the output terminals of the device. (2) Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz.

(1)

(2)

= 5 V (unless otherwise noted)

MIN TYP MAX

(1)

= 4.9 V to 5.1 V 70 dB

MIN TYP MAX

THD = 0.2%, f = 1 kHz, AV= 2 1000 mW THD = 2%, f = 1 kHz, AV= 2 1100 mW

BTL f = 1 kHz 56 dB SE f = 1 kHz 30 dB

Gain = 2 20 µV

TPA4860

5 20 mV

TPA4860

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Number of Amplifiers

VOO − Output Offset Voltage − mV

VCC = 5 V

−3 −2 −1 0 1 2 3 4 5 6 7

Number of Amplifiers

VOO − Output Offset Voltage − mV

−3 −2 −1 0 1 2 3 4 5 6 7

VCC = 3.3 V

Output offset voltage Distribution 1,2 Supply current distribution vs Free-air temperature 3,4

THD+N Total harmonic distortion plus noise

Supply current vs Supply voltage 22 Output noise voltage vs Frequency 23, 24 Maximum package power dissipation vs Free-air temperature 25 Power dissipation vs Output power 26, 27 Maximum output power vs Free-air temperature 28

Output power

Open-loop frequency response vs Frequency 31 Supply ripple rejection ratio vs Frequency 32, 33

DISTRIBUTION OF TPA4860 DISTRIBUTION OF TPA4860

OUTPUT OFFSET VOLTAGE OUTPUT OFFSET VOLTAGE

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

vs Frequency 5, 6, 7, 8, 9, 10,11,15, 16,17,18 vs Output power 12, 13, 14, 19,20,21

vs Load resistance 29 vs Supply voltage 30

Figure 1. Figure 2.

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− Supply Current − mA

3.5

TA − Free-Air Temperature − °C

−20 25

2.5

1.5

0.5

VCC = 5 V

4.5

Typical

− Supply Current − mA

3.5

TA − Free-Air Temperature − °C

−20 25

2.5

1.5

0.5

VCC = 3.3 V

Typical

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

VDD = 5 V PO = 1 W AV = −2 V/V RL = 8 Ω

CB = 0.1 µF

CB = 1 µF

THD+N − Total Harmonic Distortion Plus Noise − %

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

VDD = 5 V PO = 1 W AV = −10 V/V RL = 8 Ω

CB = 0.1 µF

CB = 1 µF

THD+N − Total Harmonic Distortion Plus Noise − %

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

SUPPLY CURRENT DISTRIBUTION SUPPLY CURRENT DISTRIBUTION

vs vs

FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE

Figure 3. Figure 4.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 5. Figure 6.

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0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

VDD = 5 V PO = 1 W AV = −20 V/V RL = 8 Ω

CB = 0.1 µF

CB = 1 µF

THD+N − Total Harmonic Distortion Plus Noise − %

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

VDD = 5 V PO = 0.5 W AV = −2 V/V RL = 8 Ω

CB = 0.1 µF

CB = 1 µF

THD+N − Total Harmonic Distortion Plus Noise − %

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

VDD = 5 V PO = 0.5 W AV = −10 V/V RL = 8 Ω

CB = 0.1 µF

CB = 1 µF

THD+N − Total Harmonic Distortion Plus Noise − %

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 5 V PO = 0.5 W AV = −20 V/V RL = 8 Ω

CB = 0.1 µF

CB = 1 µF

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 7. Figure 8.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 9. Figure 10.

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0.02

0.1

0.01

0.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 5 V AV = −2 V/V RL = 8 Ω f = 20 Hz

CB = 0.1 µF

CB = 1 µF

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 5 V AV = −10 V/V Single Ended

RL = 8 Ω PO = 250 mW

RL = 32 Ω PO = 60 mW

0.02

0.1

0.01

0.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 5 V AV = −2 V/V RL = 8 Ω f = 1 kHz

CB = 0.1 µF

0.02

0.1

0.01

0.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 5 V AV = −2 V/V RL = 8 Ω f = 20 kHz

CB = 0.1 µF

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY OUTPUT POWER

Figure 11. Figure 12.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

OUTPUT POWER OUTPUT POWER

Figure 13. Figure 14.

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0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion Plus Noise − %

CB = 1 µF

VDD = 3.3 V PO = 350 mW RL = 8 Ω AV = −2 V/V

CB = 0.1 µF

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion Plus Noise − %

CB = 1 µF

VDD = 3.3 V PO = 350 mW RL = 8 Ω AV = −10 V/V

CB = 0.1 µF

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 3.3 V PO = 350 mW RL = 8 Ω AV = −20 V/V

CB = 1 µF

CB = 0.1 µF

0.1

0.01 100 1 k 10 k 20 k

f − Frequency − Hz

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 3.3 V AV = −10 V/V Single Ended

RL = 32 Ω PO = 60 mW

RL = 8 Ω PO = 250 mW

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 15. Figure 16.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

FREQUENCY FREQUENCY

Figure 17. Figure 18.

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0.02

0.1

0.01

0.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 3.3 V AV = −2 V/V RL = 8 Ω f = 20 Hz

CB = 0.1 µF

CB = 1.0 µF

0.02

0.1

0.01

0.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 3.3 V AV = −2 V/V RL = 8 Ω f = 1 kHz

CB = 0.1 µF

20 m

0.1

0.01

0.1 1

PO − Output Power − W

THD+N − Total Harmonic Distortion Plus Noise − %

VDD = 3.3 V AV = −2 V/V RL = 8 Ω f = 20 kHz

CB = 0.1 µF

− Supplu Current − mAI DD

2.5

3 3.5

VDD − Supply Voltage − V

4 4.5 5 5.5

TA = 0°C

TA = 85°C

TA = 25°C

TA = −20°C

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

OUTPUT POWER OUTPUT POWER

Figure 19. Figure 20.

TOTAL HARMONIC DISTORTION + NOISE SUPPLY CURRENT

vs vs

OUTPUT POWER SUPPLY VOLTAGE

Figure 21. Figure 22.

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100 1 k 10 k 20 k

f − Frequency − Hz

VCC = 5 V

V01 +V02

V01

V02

− Output Noise Voltage − V

Vµ

100 1 k 10 k 20 k

f − Frequency − Hz

VCC = 3.3 V

V02

V01

V01 +V02

− Output Noise Voltage − V

Vµ

Power Dissipation − W

1.5

0.5

0 0.75 1.75

PO − Output Power − W

0.25 0.5 1 1.25 1.5

VDD = 5 V

RL = 4 Ω

RL = 8 Ω

RL = 16 Ω

Maximum Package Power Dissipation − W

−25

1.5

0.5

0 75 175

TA − Free-Air Temperature − °C

25 50 100 125 150

1.25

0.75

0.25

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGE

vs vs

FREQUENCY FREQUENCY

Figure 23. Figure 24.

MAXIMUM PACKAGE POWER DISSIPATION POWER DISSIPATION

vs vs

FREE-AIR TEMPERATURE OUTPUT POWER

Figure 25. Figure 26.

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160

0 0.25 1.500.5 0.75 1

RL = 16 Ω

− Free-Air Temperature −

PO − Maximum Output Power − W

1.25

RL = 8 Ω

RL = 4 Ω

120

100

140

0.5

0.25

0 0.75

PO − Output Power − W

0.25 0.5

VDD = 3.3 V

RL = 4 Ω

RL = 8 Ω

RL = 16 Ω

0.75

Power Dissipation − W

− Power Output − W

1.4

0.8

0.4

8 20 36

Load Resistance − Ω

12 16 24 28 32

0.6

0.2

VCC = 5 V

VCC = 3.3 V

AV = −2 V/V f = 1 kHz CB = 0.1 µF THD+n ≤ 1%

1.2

4840 44

− Power Output − W

1.75

0.5

3.5 5 Supply Voltage − V

4 4.5 5.5

1.25

0.75

0.25

1.5

AV = −2 V/V f = 1 kHz CB = 0.1 µF THD+n ≤ 1%

2.5

RL = 8 Ω

RL = 4 Ω

RL = 16 Ω

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

POWER DISSIPATION MAXIMUM OUTPUT POWER

vs vs

OUTPUT POWER FREE-AIR TEMPERATURE

Figure 27. Figure 28.

OUTPUT POWER OUTPUT POWER

vs vs

LOAD RESISTANCE SUPPLY VOLTAGE

Figure 29. Figure 30.

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G − Gain − dB

100

−20 100 100 k

f − Frequency − Hz

VDD = 5 V RL = 8 Ω CB = 0.1 µF

1 k 10 k 1 M 10 M

45°

−45°

−135°

−225°

0°

−90°

−180°

Phase

Gain

Phase

100

−90

−100 1 k 10 k 20 k

f − Frequency − Hz

VDD = 5 V RL = 8 Ω Bridge-Tied Load

CB = 0.1 µF

CB = 1 µF

−80

−70

−60

−50

−40

−30

−20

−10

Supply Ripple Rejection Ratio − dB

100

−90

−100 1 k 10 k 20 k

f − Frequency − Hz

CB = 0.1 µF

CB = 1 µF

−80

−70

−60

−50

−40

−30

−20

−10

VDD = 5 V RL = 8 Ω Single Ended

Supply Ripple Rejection Ratio − dB

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

OPEN-LOOP FREQUENCY RESPONSE FREQUENCY

Figure 31. Figure 32.

SUPPLY RIPPLE REJECTION RATIO

FREQUENCY

SUPPLY RIPPLE REJECTION RATIO

Figure 33.

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Power 

(RMS)



O(PP) 2 2



2x V

O(PP)

–V

O(PP)



2 R

LCC

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

APPLICATION INFORMATION

BRIDGED-TIED LOAD VERSUS SINGLE-ENDED MODE

Figure 34 shows a linear audio power amplifier (APA) in a bridge-tied load (BTL) configuration. A BTL amplifier actually consists of two linear amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration but initially let us consider power to the load. The differential drive to the speaker means that as one side is slewing up the other side is slewing down and vice versa. This, in effect, doubles the voltage swing on the load as compared to a ground-referenced load. Plugging twice the voltage into the power equation, where voltage is squared, yields 4 times the output power from the same supply rail and load impedance (see Equation 1 ).

(1)

Figure 34. Bridge-Tied Load Configuration

In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a singled-ended (SE) limit of 250 mW to 1 W. In sound power, that is a 6-dB improvement which is loudness that can be heard. In addition to increased power there are frequency response concerns; consider the single-supply SE configuration shown in Figure 35 . A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 40 µF to 1000 µF); so, they tend to be expensive, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency-limiting effect is due to the high-pass filter network created with the speaker impedance and the coupling capacitance and is calculated with Equation 2 .

For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor.

(2)

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O(PP)

L(RMS)

DD(RMS)

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

APPLICATION INFORMATION (continued)

Figure 35. Single-Ended Configuration

Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4 times the output power of the SE configuration. Internal dissipation versus output power is discussed further in the thermal considerations section.

BTL AMPLIFIER EFFICIENCY

Linear amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. The internal voltage drop has two components. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sine-wave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from V voltage drop multiplied by the RMS value of the supply current, I

DD(RMS)

, determines the internal power

dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power

supply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 36 ).

. The internal

Figure 36. Voltage and Current Waveforms for BTL Amplifiers

Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform both the push and pull transistor are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency.

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L(RMS)





DD(RMS)



 R

SUP

 VDDI

DD(RMS)



VDD2V

 R

Efficiency 

SUP



L(RMS)



Where:

Efficiency of a BTL configuration 

 V





PLR



12

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

APPLICATION INFORMATION (continued)

Table 1 employs Equation 4 to calculate efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased, resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, the maximum draw on the power supply is almost 3.25 W.

(3)

(4)

OUTPUT POWER EFFICIENCY

(1) High peak voltages cause the THD to increase.

A final point to remember about linear amplifiers whether they are SE or BTL configured is how to manipulate the terms in the efficiency equation to utmost advantage when possible. Note that in Equation 4 , V denominator. This indicates that as V

For example, if the 5-V supply is replaced with a 10-V supply (TPA4860 has a maximum recommended V

5.5 V) in the calculations of Table 1 , then efficiency at 1 W would fall to 31% and internal power dissipation would rise to 2.18 W from 0.59 W at 5 V. Then, for a stereo 1-W system from a 10-V supply, the maximum draw would be almost 6.5 W. Choose the correct supply voltage and speaker impedance for the application.

Table 1. Efficiency vs Output Power in 5-V 8-Ω BTL Systems

PEAK-TO-PEAK INTERNAL

(W) (%)

0.25 31.4 2.00 0.55

0.50 44.4 2.83 0.62

1.00 62.8 4.00 0.59

1.25 70.2 4.47

goes down, efficiency goes up.

VOLTAGE DISSIPATION

(V) (W)

(1)

0.53

is in the

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SELECTION OF COMPONENTS

Audio

Input

Bias

Control

VDD = 5 V

1-W Internal Speaker

1, 4, 8, 9, 16

VO1

VO2

11 GAIN

IN+

IN−

BYPASS

HP-IN1 HP-IN2

HP-SENSE SHUTDOWN

VDD/2

Headphone

Plug

50 kΩ 50 kΩ

46 kΩ

Gain   2





Effective Impedance 

RFR

RF R

Figure 37 is a schematic diagram of a typical notebook computer application circuit.

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

Figure 37. TPA4860 Typical Notebook Computer Application Circuit

Gain Setting Resistors, R

The gain for the TPA4860 is set by resistors R

and R

and RIaccording to Equation 5 .

BTL mode operation brings about the factor of 2 in the gain equation due to the inverting amplifier mirroring the voltage swing across the load. Given that the TPA4860 is a MOS amplifier, the input impedance is high; consequently, input leakage currents are not generally a concern although noise in the circuit increases as the value of R

increases. In addition, a certain range of R

amplifier. Taken together, it is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ and 20 kΩ. The effective impedance is calculated in Equation 6 .

As an example, consider an input resistance of 10 kΩ and a feedback resistor of 50 kΩ. The gain of the amplifier would be –10 and the effective impedance at the inverting terminal would be 8.3 kΩ, which is well within the recommended range.

For high-performance applications metal film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of R formed from R

and the inherent input capacitance of the MOS input structure. For this reason, a small

values is required for proper start-up operation of the

above 50 kΩ, the amplifier tends to become unstable due to a pole

compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a low-pass filter network with the cutoff frequency defined in Equation 7 .

(5)

(6)

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c(lowpass)



2 R

FCF

c(highpass)



2 R



2 R



CB 25 kΩ







CIR



TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

For example, if R

is 100 kΩ and C

is 5 pF, then fcis 318 kHz, which is well outside of the audio range.

(7)

Input Capacitor, C

In the typical application, an input capacitor, C proper dc level for optimum operation. In this case, C

is required to allow the amplifier to bias the input signal to the

and RIform a high-pass filter with the corner frequency

determined in Equation 8 .

The value of CIis important to consider as it directly affects the bass (low-frequency) performance of the circuit. Consider the example where R

is 10 kΩ and the specification calls for a flat bass response down to 40 Hz.

Equation 8 is reconfigured as Equation 9 .

In this example, C consideration for this capacitor is the leakage path from the input source through the input network (R the feedback resistor (R

is 0.40 µF; so, one would likely choose a value in the range of 0.47 µF to 1 µF. A further

) to the load. This leakage current creates a dc-offset voltage at the input to the

, CI) and

amplifier that reduces useful headroom, especially in high-gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at V

/2, which is likely

higher that the source dc level. Note that it is important to confirm the capacitor polarity in the application.

POWER SUPPLY DECOUPLING C

The TPA4860 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device V

lead, works best. For filtering

lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power amplifier is recommended.

(8)

(9)

MIDRAIL BYPASS CAPACITOR, C

The midrail bypass capacitor, CB, serves several important functions. During start-up or recovery from shutdown mode, C

determines the rate at which the amplifier starts up. This helps to push the start-up pop noise into the

subaudible range (so low it cannot be heard). The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed from a 25-kΩ source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in Equation 10 should be maintained.

As an example, consider a circuit where C

is 0.1 µF, CIis 0.22 µF and R

is 10 kΩ. Inserting these values into

the Equation 9 , we get: 400 ≤ 454 which satisfies the rule. Recommended value for bypass capacitor C

0.1-µF to 1-µF ceramic or tantalum low-ESR for the best THD and noise performance.

(10)

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Audio

Input

VDD = 5 V

250-mW External Speaker

VO1

VO2

11 GAIN

IN+

IN−

BYPASS

VDD/2

CSE = 0.1 µF

RSE = 50 Ω

Gain  





CB 25 kΩ







CIR





LCC

c high



2 R

LCC

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

SINGLE-ENDED OPERATION

Figure 38 is a schematic diagram of the recommended SE configuration. In SE mode configurations, the load should be driven from the primary amplifier output (V

Figure 38. Singled-Ended Mode

1, terminal 10).

Gain is set by the R

and RIresistors and is shown in Equation 11 . Because the inverting amplifier is not used to

mirror the voltage swing on the load, the factor of 2 is not included.

The phase margin of the inverting amplifier into an open circuit is not adequate to ensure stability, so a termination load should be connected to VO2. This consists of a 50-Ω resistor in series with a 0.1-µF capacitor to ground. It is important to avoid oscillation of the inverting output to minimize noise and power dissipation.

The output coupling capacitor required in single-supply SE mode also places additional constraints on the selection of other components in the amplifier circuit. The rules described earlier still hold with the addition of the following relationship:

OUTPUT COUPLING CAPACITOR, C

In the typical single-supply SE configuration, an output coupling capacitor (C

) is required to block the dc bias at

the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 13 .

The main disadvantage, from a performance standpoint, is that the load impedances are typically small, which drives the low-frequency corner higher. Large values of C Consider the example where a C summarizes the frequency response characteristics of each configuration.

of 68 µF is chosen and loads vary from 8 Ω, 32 Ω, to 47 kΩ. Table 2

are required to pass low frequencies into the load.

(11)

(12)

(13)

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Bias

Control

HP-IN1 HP-IN2

HP-SENSE

SHUTDOWN

Headphone

Plug

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

Table 2. Common Load Impedances vs Low Frequency

Output Characteristics in SE Mode

8 Ω 68 µF 293 Hz

32 Ω 68 µF 73 Hz

47,000 Ω 68 µF 0.05 Hz

As Table 2 indicates, most of the bass response is attenuated into 8-Ω loads while headphone response is adequate and drive into line level inputs (a home stereo for example) is good.

LOWEST FREQUENCY

HEADPHONE SENSE CIRCUITRY, R

The TPA4860 is commonly used in systems where there is an internal speaker and a jack for driving external loads (i.e., headphones). In these applications, it is usually desirable to mute the internal speaker(s) when the external load is in use. The headphone inputs (HP-1, HP-2) and headphone output (HP-SENSE) of the TPA4860 were specifically designed for this purpose. Many standard headphone jacks are available with an internal single-pole single-throw (SPST) switch that makes or breaks a circuit when the headphone plug is inserted. Asserting either or both HP-1 and/or HP-2 high mutes the output stage of the amplifier and causes HP-SENSE to go high. In battery-powered applications where power conservation is critical, HP-SENSE can be connected to the shutdown input as shown in Figure 39 . This places the amplifier in a low current state for maximum power savings. Pullup resistors in the range from 1 kΩ to 10 kΩ are recommended for 5-V and 3.3-V operation.

Figure 39. Schematic Diagram of Typical Headphone Sense Application

Table 3 details the logic for the mute function of the TPA4860.

Table 3. Truth Table for Headphone Sense and Shutdown Functions

INPUTS

HP-1 HP-2 SHUTDOWN HP-SENSE

Low Low Low Low Active

Low High Low High Mute High Low Low High Mute High High Low High Mute

(2)

(1)

(2)

High X

OUTPUT

(2)

AMPLIFIER STATE

Shutdown

(1) Inputs should never be left unconnected. (2) X = do not care

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160

0 0.25 1.500.5 0.75 1

RL = 16 Ω

– Free-Air Temperature –

Maximum Output Power – W

1.25

RL = 8 Ω

RL = 4 Ω

120

100

140

VDD = 5 V

TPA4860

SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004

SHUTDOWN MODE

The TPA4860 employs a shutdown mode of operation designed to reduce quiescent supply current, I absolute minimum level during periods of nonuse for battery-power conservation. For example, during device sleep modes or when other audio-drive currents are used (i.e., headphone mode), the speaker drive is not required. The SHUTDOWN input terminal should be held low during normal operation when the amplifier is in use. Pulling SHUTDOWN high causes the outputs to mute and the amplifier to enter a low-current state, IDD~

0.6 µA. SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable.

USING LOW-ESR CAPACITORS

Low-ESR capacitors are recommended throughout this applications section. A real capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor.

THERMAL CONSIDERATIONS

A prime consideration when designing an audio amplifier circuit is internal power dissipation in the device. The curve in Figure 40 provides an easy way to determine what output power can be expected out of the TPA4860 for a given system ambient temperature in designs using 5-V supplies. This curve assumes no forced airflow or additional heat sinking.

, to the

DD(q)

5-V VERSUS 3.3-V OPERATION

The TPA4860 was designed for operation over a supply range of 2.7 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation, as these are considered to be the two most common standard voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain setting, or stability. Supply current is slightly reduced from 3.5 mA (typical) to 2.5 mA (typical). The most important consideration is that of output power. Each amplifier in TPA4860 can produce a maximum voltage swing of V when V power into an 8-Ω load to less than 0.33 W before distortion begins to become significant.

O(PP)

Operation at 3.3-V supplies, as can be shown from the efficiency formula in Equation 4 , consumes approximately two-thirds the supply power for a given output-power level than operation from 5-V supplies. When the application demands less than 500 mW, 3.3-V operation should be strongly considered, especially in battery-powered applications.

Figure 40. Free-Air Temperature Versus Maximum Continuous Output Power

– 1 V. This means, for 3.3-V operation, clipping starts to occur when V

= 2.3 V as opposed to

O(PP)

= 4 V while operating at 5 V. The reduced voltage swing subsequently reduces maximum output

PACKAGE OPTION ADDENDUM

www.ti.com

5-Oct-2007

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

TPA4860D ACTIVE SOIC D 16 40 Green (RoHS &

no Sb/Br)

TPA4860DG4 ACTIVE SOIC D 16 40 Green (RoHS &

no Sb/Br)

TPA4860DR ACTIVE SOIC D 16 2500 Green (RoHS &

no Sb/Br)

TPA4860DRG4 ACTIVE SOIC D 16 2500 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

TAPE AND REEL INFORMATION

11-Mar-2008

*All dimensions are nominal

Device Package

Type

TPA4860DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

Package Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

11-Mar-2008

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TPA4860DR SOIC D 16 2500 346.0 346.0 33.0

Pack Materials-Page 2

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TEXAS INSTRUMENTS TPA4860 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

DESCRIPTION

TYPICAL APPLICATION CIRCUIT

ABSOLUTE MAXIMUM RATINGS

DISSIPATION RATING TABLE

RECOMMENDED OPERATING CONDITIONS

ELECTRICAL CHARACTERISTICS

OPERATING CHARACTERISTICS

ELECTRICAL CHARACTERISTICS

OPERATING CHARACTERISTICS

TYPICAL CHARACTERISTICS

APPLICATION INFORMATION

BRIDGED-TIED LOAD VERSUS SINGLE-ENDED MODE

BTL AMPLIFIER EFFICIENCY

SELECTION OF COMPONENTS

SINGLE-ENDED OPERATION

SHUTDOWN MODE

USING LOW-ESR CAPACITORS

THERMAL CONSIDERATIONS

5-V VERSUS 3.3-V OPERATION