TEXAS INSTRUMENTS TPA302 Technical data

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1 2 3 4
8 7 6 5
VO1
SHUTDOWN
IN2
IN1 GND V
DD
VO2
D PACKAGE
(TOP VIEW)
Audio
Input
Bias
Control
6
1
5
7
VO1
VO2
V
DD
2
8
3
4
IN1
BYPASS
SHUTDOWN
VDD/2
C
I
R
I
R
F
C
B
C
S
Audio
Input
C
I
R
I
IN2
V
DD
+
+
C
C
C
C
R
F
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
300-mW STEREO AUDIO POWER AMPLIFIER
300-mW Stereo Output
PC Power Supply Compatibility 5-V and
3.3-V Specified Operation
Shutdown Control
Internal Midrail Generation
Thermal and Short-Circuit Protection
Surface-Mount Packaging
Functional Equivalent of the LM4880

DESCRIPTION

The TPA302 is a stereo audio power amplifier capable of delivering 250 mW of continuous average power into an 8- load at less than 0.06% THD+N from a 5-V power supply or up to 300 mW at 1% THD+N. The TPA302 has high current outputs for driving small unpowered speakers at 8 or headphones at 32 . For headphone applications driving 32- loads, the TPA302 delivers 60 mW of continuous average power at less than 0.06% THD+N. The amplifier features a shutdown function for power-sensitive applications as well as internal thermal and short-circuit protection. The amplifier is available in an 8-pin SOIC (D) package that reduces board space and facilitates automated assembly.

TYPICAL APPLICATION CIRCUIT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 1997–2004, Texas Instruments Incorporated
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TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
(1) The D packages are available taped and reeled. To order a taped
AVAILABLE OPTIONS
T
A
–40°C to 85°C TPA302D
and reeled part, add the suffix R (e.g., TPA302DR)
PACKAGED DEVICES
SMALL OUTLINE
(D)
(1)

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)
V V
T T
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
Supply voltage 6 V
DD
Input voltage –0.3 V to V
I
Continuous total power dissipation Internally limited (see Dissipation Rating Table) Operating junction temperature range –40°C to 150° C
J
Storage temperature range –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1)
UNIT
+ 0.3 V
DD

DISSIPATION RATING TABLE

PACKAGE
D 731 mW 5.8 mW/°C 460 mW 380 mW
TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C
POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT
V T
Supply voltage 2.7 5.5 V
DD
Operating free-air temperature –40 85 °C
A

DC ELECTRICAL CHARACTERISTICS

at specified free-air temperature, V
PARAMETER TEST CONDITION MIN TYP MAX UNIT
I
DD
V
IO
PSRR Power supply rejection ratio V I
DD(SD)
2
Supply current 2.25 5 mA Input offset voltage 5 20 mV
Quiescent current in shutdown 0.6 20 µA
= 3.3 V (unless otherwise noted)
DD
= 3.2 V to 3.4 V 55 dB
DD
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SLOS174C – JANUARY 1997 – REVISED JUNE 2004

AC OPERATING CHARACTERISTICS

V
= 3.3 V, TA= 25°C, RL= 8 (unless otherwise noted)
DD
PARAMETER TEST CONDITION MIN TYP MAX UNIT
THD < 0.08% 100
P
Output power mW
O
Gain = –1, f = 1 kHz
THD < 1% 125 THD < 0.08%, RL= 32 25 THD < 1%, RL= 32 35
B
Maximum output power bandwidth Gain = 10, 1% THD 20 kHz
OM
B
Unity gain bandwidth Open loop 1.5 MHz
1
Channel separation f = 1 kHz 75 dB Supply ripple rejection ratio f = 1 kHz 45 dB
V
Noise output voltage Gain = –1 10 µVrms
n

DC ELECTRICAL CHARACTERISTICS

at specified free-air temperature, V
PARAMETER TEST CONDITION MIN TYP MAX UNIT
I
DD
V
OO
PSRR Power supply rejection ratio V I
DD(SD)
Supply current 4 10 mA Output offset voltage 5 20 mV
Quiescent current in shutdown 0.6 µA
= 5 V (unless otherwise noted)
DD
= 4.9 V to 5.1 V 65 dB
DD
TPA302

AC OPERATING CHARACTERISTICS

V
= 5 V, TA= 25°C, RL= 8 (unless otherwise noted)
DD
PARAMETER TEST CONDITION MIN TYP MAX UNIT
P
B B
V
Output power mW
O
Maximum output power bandwidth Gain = 10, 1% THD 20 kHz
OM
Unity gain bandwidth Open loop 1.5 MHz
1
Channel separation f = 1 kHz 75 dB Supply ripple rejection ratio f = 1 kHz 45 dB Noise output voltage Gain = -1 10 µVrms
n
Gain = –1, f = 1 kHz
THD < 0.06% 250 THD < 1% 300 THD < 0.06%, RL= 32 60 THD < 1%, RL= 32 80
3
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250 mW per Channel at RL = 8 60 mW per Channel at RL = 32
Stereo
RLR
L
C
C
C
C
VO1
VO2
BYPASS
IN2-
IN1-
C
B
R
F
R
F
R
I
R
I
C
I
C
I
R
L
Stereo Audio
Input
Bias
Control
From Shutdown
Control Circuit (TPA4860)
C
B
V
DD
4
3
2
1
8
6
5
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004

TYPICAL APPLICATION

4
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1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 5 V PO = 250 mW RL = 8 AV = −5 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
20 100 1 k 10 k 20 k
THD + N − Total Harmonic Distortion Plus Noise − %
f − Frequency − Hz
VCC = 5 V PO = 250 mW RL = 8 AV = −1 V/V
VO1
VO2
THD+N Total harmonic distortion plus noise
I
DD
V
Supply current
Output noise voltage vs Frequency 27, 28
n
Maximum package power dissipation vs Free-air temperature 29 Power dissipation vs Output power 30, 31
P
P
Maximum output power vs Free-air temperature 32, 33
Omax
Output power
O
Open-loop response 36 Closed-loop response 37 Crosstalk vs Frequency 38, 39 Supply ripple rejection ratio vs Frequency 40, 41
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004

TYPICAL CHARACTERISTICS

Table of Graphs
FIGURE
vs Frequency 1-3, 7-9, 13-15, 19-21 vs Output power 4-6, 10-12 16-18, 22-24 vs Supply voltage 25 vs Free-air temperature 26
vs Load resistance 34 vs Supply voltage 35
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 1. Figure 2.
5
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1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 5 V PO = 250 mW RL = 8 AV = −10 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 5 V f = 20 Hz RL = 8 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO2
VO1
1
0.1
0.010
10
0.01 0.1 1
VCC = 5 V f = 20 kHz RL = 8 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 5 V f = 1 kHz RL = 8 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 3. Figure 4.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
6
Figure 5. Figure 6.
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1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 5 V PO = 60 mW RL = 32 AV = −5 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 5 V PO = 60 mW RL = 32 AV = −1 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 5 V PO = 60 mW RL = 32 AV = −10 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 5 V f = 20 Hz RL = 32 A
V
= −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 7. Figure 8.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 9. Figure 10.
7
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1
0.1
0.010
10
0.01 0.1 1
VCC = 5 V f = 1 kHz RL = 32 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 5 V f = 20 kHz RL = 32 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 3.3 V PO = 100 mW RL = 8 AV = −1 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 3.3 V PO = 100 mW RL = 8 AV = −5 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 11. Figure 12.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 13. Figure 14.
8
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1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 3.3 V PO = 100 mW RL = 8 AV = −10 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 3.3 V f = 20 Hz RL = 8 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 3.3 V f = 1 kHz RL = 8 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 3.3 V f = 20 kHz RL = 8 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 15. Figure 16.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 17. Figure 18.
9
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1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 3.3 V PO = 25 mW RL = 32 AV = −1 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 3.3 V PO = 25 mW RL = 32 AV = −5 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 3.3 V PO = 25 mW RL = 32 AV = −10 V/V
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 3.3 V f = 20 Hz RL = 32 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 19. Figure 20.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 21. Figure 22.
10
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1
0.1
0.010
10
0.01 0.1 1
VCC = 3.3 V f = 1 kHz RL = 32 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
1
0.1
0.010
10
0.01 0.1 1
VCC = 3.3 V f = 20 kHz RL = 32 AV = −1 V/V
PO − Output Power − W
THD + N − Total Harmonic Distortion Plus Noise − %
VO1
VO2
3
2.5
1.5
1
2.5 3 3.5 4
− Supply Current − mA
3.5
4.5
5
4.5 5 5.5
4
2
TA = 25°C
I
DD
VDD − Supply Voltage − V
4
3
1
0
−50 −25 0 25
− Supply Current − mA
5
50 75 100
6
2
I
DD
TA − Free-Air Temperature − °C
Min
Min
Min
MinMin Min
Max
Max
Max
Typ
Typ
Typ
TypTyp
Typ
3.3 V 3.3 V
3.3 V
5 V
5 V
5 V
Max
Max
Max
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
OUTPUT POWER OUTPUT POWER
Figure 23. Figure 24.
SUPPLY CURRENT SUPPLY CURRENT DISTRIBUTION
vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE
Figure 25. Figure 26.
11
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VO1 VO2
100
10
1
1000
20 100 1 k 10 k 20 k
− Output Noise Voltage −
f − Frequency − Hz
Vµ
VCC = 5 V
V
n
100
10
1
1000
20 100 1 k 10 k 20 k
f − Frequency − Hz
VCC = 3.3 V
− Output Noise Voltage −
Vµ
V
n
0.25
0
0 0.25
Power Dissipation − W
0.5
0.75
0.5 0.75
VDD = 5 V
RL = 8
RL = 16
PO − Output Power − W
Two Channels Active
0.5
0.25
0
−25 0 25 50 75 100
Maximum Package Power Dissipation − W
0.75
1
125 150 175
TA − Free-Air Temperature − °C
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGE
MAXIMUM PACKAGE POWER DISSIPATION POWER DISSIPATION
FREE-AIR TEMPERATURE OUTPUT POWER
vs vs
FREQUENCY FREQUENCY
Figure 27. Figure 28.
vs vs
12
Figure 29. Figure 30.
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0.1
0
0 0.1
Power Dissipation − W
0.2
0.3
0.2 0.35
RL = 8
RL = 16
PO − Output Power − W
VDD = 3.3 V Two Channels Active
0.25
0.15
0.05
0.05 0.15 0.25 0.3
RL = 8
RL = 16
VDD = 5 V Two Channels Active
80
60
40
20
0 0.25
120
140
160
0.5 0.75
100
POmax − Maximum Output Power − W
− Free-Air Temperature − T
A
°C
200
150
50
0
5 10 15 20 25 30
− Output Power − mW
300
350
400
35 40 45 50
VDD = 5 V
VDD = 3.3 V
250
100
RL − Load Resistance −
P
O
RL = 8
RL = 16
VDD = 3.3 V Two Channels Active
120
110
100
130
140
150
0.075 0.2250 0.15
P
Omax
− Maximum Output Power − W
− Free-Air Temperature −
T
A
°C
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
POWER DISSIPATION MAXIMUM OUTPUT POWER
vs vs
OUTPUT POWER FREE-AIR TEMPERATURE
Figure 31. Figure 32.
MAXIMUM OUTPUT POWER OUTPUT POWER
vs vs
FREE-AIR TEMPERATURE LOAD RESISTANCE
Figure 33. Figure 34.
13
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30
10
0
−10 10 100 1 k 10 k 100 k
Gain − dB
40
50
f − Frequency − Hz
70
1 M 10 M 100 M
60
20
20°
0°
−20°
−40°
−60°
−80°
−100°
Phase
Gain
Phase
VDD − Supply Voltage − V
THD = 1%
250
150
100
50
2.5 3 3.5 4
300
350
450
4.5 5 5.5
400
200
− Output Power − mW P
O
0
RL = 8
RL = 32
−60 10
Gain − dB
f − Frequency − Hz
20
100 M
200°
−200°
Phase
0
−20
−40
100°
0°
−100°
100 1 k 10 k 100 k 1 M 10 M
Phase
Gain
−50
−60
−80
−90
−100
0
−70
10 100 1 k 10 k 100 k
Crosstalk − dB
−30
−40
−10
f − Frequency − Hz
−20
VDD = 5 V
V02 to V01
(b to a)
V01 to V02
(a to b)
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
OUTPUT POWER
SUPPLY VOLTAGE OPEN-LOOP RESPONSE
vs
CLOSED-LOOP RESPONSE FREQUENCY
14
Figure 35. Figure 36.
CROSSTALK
Figure 37. Figure 38.
vs
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− 50
− 60
− 80
− 90
− 100
0
− 70
100 1 k 10 k 20 k
Supply Ripple Rejection Ratio − dB
− 30
− 40
− 10
f − Frequency − Hz
− 20
VDD = 5 V
VO2
VO1
− 50
− 60
− 80
− 90
− 100
0
− 70
10 100 1 k 10 k 100 k
Crosstalk − dB
− 30
− 40
− 10
f − Frequency − Hz
− 20
VDD = 3.3 V
V02 to V01
(b to a)
V01 to VO2
(a to b)
− 50
− 60
− 80
− 90
− 100
0
− 70
100 1 k 10 k 20 k
− 30
− 40
− 10
f − Frequency − Hz
− 20
VDD = 3.3 V
VO2
VO1
Supply Ripple Rejection Ratio − dB
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
CROSSTALK SUPPLY RIPPLE REJECTION RATIO
vs vs
FREQUENCY FREQUENCY
TPA302
Figure 39. Figure 40.
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
Figure 41.
15
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Audio
Input
Bias
Control
VDD = 5 V
6
1
5
7
VO1
VO2
V
DD
2
8
3
4
IN1
BYPASS
SHUTDOWN (see Note A)
VDD/2
C
I
R
I
R
F
C
F
50 k 50 k
C
B
C
S
NOTE A: SHUTDOWN must be held low for normal operation and asserted high for shutdown mode.
Audio
Input
C
I
R
I
IN2
R
F
C
F
R
L
R
L
C
C
C
C
Gain  
R
F
R
I
Effective Impedance
RFR
I
RF R
I
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004

APPLICATION INFORMATION

SELECTION OF COMPONENTS

Figure 42 is a schematic diagram of a typical application circuit.
Figure 42. TPA302 Typical Notebook Computer Application Circuit
Gain Setting Resistors, R
The gain for the TPA302 is set by resistors R
Given that the TPA302 is an MOS amplifier, the input impedance is high; consequently, input leakage currents are not generally a concern, although noise in the circuit increases as the value of R certain range of R recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 k and 20 k. The effective impedance is calculated in Equation 2 .
and R
F
values is required for proper start-up operation of the amplifier. Taken together, it is
F
I
and RIaccording to Equation 1 .
F
As an example, consider an input resistance of 10 k and a feedback resistor of 50 k. The gain of the amplifier would be –5 and the effective impedance at the inverting terminal would be 8.3 k, which is within the recommended range.
16
increases. In addition, a
F
(1)
(2)
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f
c(lowpass)
1
2R
FCF
f
c(highpass)
1
2R
I
C
I
C
I
1
2R
I
f
c(highpass)
1
CB 25 k
1
CIR
I
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
For high-performance applications, metal film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of R formed from R
and the inherent input capacitance of the MOS input structure. For this reason, a small
F
compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a low-pass filter network with the cutoff frequency defined in Equation 3 .
For example, if R
is 100 k and C
F
is 5 pF, then f
F
above 50 k, the amplifier tends to become unstable due to a pole
F
c(lowpass)
is 318 kHz, which is well outside of the audio range.
(3)
Input Capacitor, C
I
In the typical application, input capacitor CIis required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, C
and R
I
form a high-pass filter with the corner frequency
I
determined in Equation 4 .
The value of CIis important to consider as it directly affects the bass (low-frequency) performance of the circuit. Consider the example where R
is 10 k and the specification calls for a flat bass response down to 40 Hz.
I
Equation 4 is reconfigured as Equation 5 .
In this example, C consideration for this capacitor is the leakage path from the input source through the input network (R the feedback resistor (R
is 0.4 µF; so, one would likely choose a value in the range of 0.47 µF to 1 µF. A further
I
) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
F
, CI) and
I
that reduces useful headroom, especially in high-gain applications (>10). For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at V
/2, which is likely higher
DD
than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
Power Supply Decoupling, C
S
The TPA302 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device V
lead, works best. For filtering
DD
lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power amplifier is recommended.
(4)
(5)
Midrail Bypass Capacitor, C
B
The midrail bypass capacitor, CB, serves several important functions. During startup or recovery from shutdown mode, C
determines the rate at which the amplifier starts up. This helps to push the start-up pop noise into the
B
subaudible range (so low it cannot be heard). The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed from a 25-k source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in Equation 6 should be maintained.
As an example, consider a circuit where C
is 0.1 µF, CIis 0.22 µF and R
B
is 10 k. Inserting these values into
I
Equation 6 results in: 400 454 which satisfies the rule. Recommended values for bypass capacitor C
0.1-µF to 1-µF, ceramic or tantalum low-ESR, for the best THD and noise performance.
(6)
are
B
17
www.ti.com
f
c
1
2R
LCC
1
CB 25 k
1
CIR
I
1
R
LCC
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004
APPLICATION INFORMATION (continued) OUTPUT COUPLING CAPACITOR, C
In the typical single-supply, single-ended (SE) configuration, an output coupling capacitor (C block the dc bias at the output of the amplifier thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 7 .
The main disadvantage, from a performance standpoint, is that the load impedances are typically small, which drives the low-frequency corner higher. Large values of C Consider the example where a C summarizes the frequency response characteristics of each configuration.
Table 1. Common Load Impedances vs Low Frequency
C
R
L
8 68 µF 293 Hz
32 68 µF 73 Hz
47,000 68 µF 0.05 Hz
C
) is required to
C
are required to pass low frequencies into the load.
C
of 68 µF is chosen and loads vary from 8 , 32 , and 47 k. Table 1
Output Characteristics in SE Mode
C
C
LOWEST FREQUENCY
(7)
As Table 1 indicates, most of the bass response is attenuated into 8- loads while headphone response is adequate and drive into line level inputs (a home stereo for example) is good.
The output coupling capacitor required in single-supply, SE mode also places additional constraints on the selection of other components in the amplifier circuit. The rules described previously still hold with the addition of the following relationship:

SHUTDOWN MODE

The TPA302 employs a shutdown mode of operation designed to reduce quiescent supply current, I absolute minimum level during periods of nonuse for battery-power conservation. For example, during device sleep modes or when other audio-drive currents are used (i.e., headphone mode), the speaker drive is not required. The SHUTDOWN input terminal should be held low during normal operation when the amplifier is in use. Pulling SHUTDOWN high causes the outputs to mute and the amplifier to enter a low-current state, I
~ 0.6 µA. SHUTDOWN should never be left unconnected because amplifier operation would be
DD
unpredictable.
, to the
DD(q)

USING LOW-ESR CAPACITORS

Low-ESR capacitors are recommended throughout this applications section. A real capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor.
(8)
18
www.ti.com
RL = 8
RL = 16
VDD = 5 V Two Channels Active
80
60
40
20
0 0.25
- Free-Air Temperature -
120
140
160
0.5 0.75
100
POmax - Maximum Output Power - W
C
°T
A
TPA302
SLOS174C – JANUARY 1997 – REVISED JUNE 2004

THERMAL CONSIDERATIONS

A prime consideration when designing an audio amplifier circuit is internal power dissipation in the device. The curve in Figure 43 provides an easy way to determine what output power can be expected out of the TPA302 for a given system ambient temperature in designs using 5-V supplies. This curve assumes no forced airflow or additional heat sinking.
Figure 43. Free-Air Temperature Versus Maximum Output Power

5-V VERSUS 3.3-V OPERATION

The TPA302 was designed for operation over a supply range of 2.7 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation because they are considered to be the two most common standard voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain setting, or stability. Supply current is slightly reduced from 4 mA (typical) to 2.25 mA (typical). The most important consideration is that of output power. Each amplifier in the TPA302 can produce a maximum voltage swing of V
1 V. This means, for 3.3-V operation, clipping starts to occur when V
DD
V
= 4 V while operating at 5 V. The reduced voltage swing subsequently reduces maximum output power
O(PP)
into the load before distortion begins to become significant.
= 2.3 V as opposed when
O(PP)
19
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2007
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package Drawing
Pins Package
Qty
Eco Plan
TPA302D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA302DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
TPA302DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
TPA302DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
(3)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
11-Mar-2008
*All dimensions are nominal
Device Package
TPA302DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA302DR SOIC D 8 2500 346.0 346.0 29.0
Pack Materials-Page 2
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