TEXAS INSTRUMENTS TPA2012D2 Technical data

RTJYZH
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VDD = 3.6 V, 10%
0
0.50
1
1.50
2
2.50
4 9 14 19 24 29 34
P
O
− Output Power − W
RL − Load Resistance − W
WCSP Thermally Limited Region
VDD = 5 V, 1%
VDD = 2.5 V, 1%
VDD = 2.5 V, 10%
VDD = 3.6 V, 1%
VDD = 3.6 V, 10%
SLOS438C – DECEMBER 2004 – REVISED MARCH 2007
2.1 W/CH STEREO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER

FEATURES APPLICATIONS

Output Power By Package:
QFN:
2.1 W/Ch Into 4 at 5 V – 1.4 W/Ch Into 8 at 5 V – 720 mW/Ch Into 8 at 3.6 V
WCSP:
1.2 W/Ch Into 4 at 5 V
(1)
1.3 W/Ch Into 8 at 5 V – 720 mW/Ch Into 8 at 3.6 V
Only Two External Components Required
Power Supply Range: 2.5 V to 5.5 V
Independent Shutdown Control for Each
Channel The TPA2012D2 features independent shutdown
Selectable Gain of 6, 12, 18, and 24 dB
Internal Pulldown Resistor On Shutdown Pins
High PSRR: 77 dB at 217 Hz
Fast Startup Time (3.5 ms)
Low Supply Current
Low Shutdown Current
Short-Circuit and Thermal Protection
Space Saving Packages
2,01 mm X 2,01 mm NanoFree™ WCSP
(YZH)
4 mm X 4 mm Thin QFN (RTJ) with
PowerPAD™
(1)
Thermally limited
Wireless or Cellular Handsets and PDAs
Portable DVD Player
Notebook PC
Portable Radio
Portable Gaming
Educational Toys
USB Speakers

DESCRIPTION

The TPA2012D2 is a stereo, filter-free, Class-D audio amplifier (class-D amp) available in a WCSP, QFN, or PWP package. The TPA2012D2 only requires two external components for operation.
controls for each channel. The gain can be selected to 6, 12, 18, or 24 dB utilizing the G0 and G1 gain select pins. High PSRR and differential architecture provide increased immunity to noise and RF rectification. In addition to these features, a fast startup time and small package size make the TPA2012D2 class-D amp an ideal choice for both cellular handsets and PDAs.
TPA2012D2

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree, PowerPAD are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2004–2007, Texas Instruments Incorporated
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TPA2012D2
SLOS438C – DECEMBER 2004 – REVISED MARCH 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

DESCRIPTION (CONTINUED)

The TPA2012D2 is capable of driving 1.4 W/Ch at 5 V or 720 mW/Ch at 3.6 V into 8 . The TPA2012D2 is also capable of driving 4 . The TPA2012D2 is thermally limited in WCSP and may not achieve 2.1 W/Ch for 4 . The maximum output power in the WCSP is determined by the ability of the circuit board to remove heat. The output power versus load resistance graph below shows thermally limited region of the WCSP in relation to the QFN package. The TPA2012D2 provides thermal and short circuit protection.
AVAILABLE OPTIONS
T
A
–40 ° C to 85 ° C
2 mm x 2 mm, 16-ball WCSP (YZH) TPA2012D2YZH AKR
4 mm x 4 mm, 20-pin QFN (RTJ) TPA2012D2RTJ AKS

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature (unless otherwise noted)
V
V
T T T
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
Supply voltage, AVDD, PVDD
SS
Input voltage –0.3 to V
I
Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range –40 to 85 ° C
A
Operating junction temperature range –40 to 150 ° C
J
Storage temperature range –65 to 85 ° C
stg
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
In active mode –0.3 to 6.0 V In shutdown mode –0.3 to 7.0 V
PACKAGE PART NUMBER SYMBOL
(1)
VALUE UNIT
+ 0.3 V
DD

DISSIPATION RATING TABLE

PACKAGE
RTJ 5.2 W 41.6 mW/ ° C 3.12 W 2.7 W
YZH 1.2 W 9.12 mW/ ° C 690 mW 600 mW
(1) This data was taken using 2 oz trace and copper pad that is soldered directly to a JEDEC standard 4-layer 3 in × 3 in PCB.
TA= 25 ° C DERATING TA= 75 ° C TA= 85 ° C
POWER RATING
(1)
FACTOR POWER RATING POWER RATING

RECOMMENDED OPERATING CONDITIONS

V V V T
2
Supply voltage AVDD, PVDD 2.5 5.5 V
SS
High-level input voltage SDL, SDR, G0, G1 1.3 V
IH
Low-level input voltage SDL, SDR, G0, G1 0.35 V
IL
Operating free-air temperature ÷ 40 85 ° C
A
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TPA2012D2
SLOS438C – DECEMBER 2004 – REVISED MARCH 2007

ELECTRICAL CHARACTERISTICS

TA= 25 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|V
| Output offset voltage (measured differentially) 5 25 mV
OO
PSRR Power supply rejection ratio VDD= 2.5 to 5.5 V –75 –55 dB V
icm
Common-mode input voltage 0.5 VDD–0.8 V CMRR Common-mode rejection ration –69 –50 dB |IIH| High-level input current VDD= 5.5 V, VI= V
|IIL| Low-level input current VDD= 5.5 V, VI= 0 V 5 µ A
I
DD
r
DS(on)
Supply current
Static drain-source on-state resistance VDD= 3.6 V 570 m
Output impedance in shutdown mode V f
(sw)
Switching frequency VDD= 2.5 V to 5.5 V 250 300 350 kHz
Closed-loop voltage gain dB
Inputs ac grounded, AV= 6 dB, VDD= 2.5 to 5.5 V
Inputs shorted together, VDD= 2.5 to 5.5 V
DD
50 µ A
VDD= 5.5 V, No load or output filter 6 9 VDD= 3.6 V, No load or output filter 5 7.5 mA VDD= 2.5 V, No load or output filter 4 6 Shutdown mode 1.5 µ A VDD= 5.5 V 500
VDD= 2.5 V 700
= 0.35 V 2 k
( SDR, SDL)
G0, G1 = 0.35 V 5.5 6 6.5 G0 = VDD, G1 = 0.35 V 11.5 12 12.5 G0 = 0.35 V, G1 = V G0, G1 = V
DD
DD
17.5 18 18.5
23.5 24 24.5

OPERATING CHARACTERISTICS

TA= 25 ° C, RL= 8 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power (per channel) VDD= 3.6 V, f = 1 kHz, THD = 10% 0.72 W
RL= 8
RL= 4 VDD= 5.0 V, f = 1 kHz, THD = 10% 2.1
THD+N Total harmonic distortion plus noise
PO= 1 W, VDD= 5 V, AV= 6 dB, f = 1 kHz 0.14% PO= 0.5 W, VDD= 5 V, AV= 6 dB, f = 1 kHz 0.11%
Channel crosstalk f = 1 kHz –85 dB
k
SVR
Supply ripple rejection ratio dB
VDD= 5 V, AV= 6 dB, f = 217 Hz –77 VDD= 3.6 V, AV= 6 dB, f = 217 Hz –73
CMRR Common mode rejection ratio VDD= 3.6 V, VIC= 1 Vpp, f = 217 Hz –69 dB
Av = 6 dB 28.1
Input impedance k
Av = 12 dB 17.3 Av = 18 dB 9.8 Av = 24 dB 5.2
Start-up time from shutdown VDD= 3.6 V 3.5 ms
V
n
Output voltage noise µ V
VDD= 3.6 V, f = 20 to 20 kHz, Inputs are ac grounded, AV= 6 dB
VDD= 5.0 V, f = 1 kHz, THD = 10% 1.4
No weighting 35 A weighting 27
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to Battery
V
DD
OUTR+
GND
SDR
INR+
300 k
C
S
Right Input
SDL
300 k
G0
OUTR−
OUTL+
OUTL−
G1
INR−
INL+
INL−
G1
Gain
G0
V/V dB
Left Input
Gain
Adjust
PWM
Gain
Adjust
PWM
H −
Bridge
H −
Bridge
Internal
Oscillator
Bias
Circuitry
6 12 18 24
2 4 8 16
0 1 0 1
0 0 1 1
Short−Circuit
Protection
TPA2012D2
SLOS438C – DECEMBER 2004 – REVISED MARCH 2007

BLOCK DIAGRAM

4
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AGND
OUTL+
PGND
INL− G1
G0
SDR
INL+
AVDD
SDL
OUTR−
INR−
PVDD
OUTR+
OUTL−
INR+
A1
B1
C1
D1
A2 A3 A4
AGND
INR+
INR−
INL+
INL−
G0
OUTR+
PVDD
PGND
OUTR−
NC
SDL
SDR
AVDD
NC
OUTL+
PVDD
PGND
G1
OUTL−
20 19 18 17 16
6 7 8 9 10
1
2
3
4
5
15
14
13
12
11
SLOS438C – DECEMBER 2004 – REVISED MARCH 2007
Terminal Functions
TERMINAL
NAME QFN WCSP
INR+ 16 D1 I Right channel positive input INR- 17 C1 I Right channel negative input INL+ 20 A1 I Left channel positive input INL- 19 B1 I Left channel negative input SDR 8 B3 I Right channel shutdown terminal (active low) SDL 7 B4 I Left channel shutdown terminal (active low) G0 15 C2 I Gain select (LSB) G1 1 B2 I Gain select (MSB) PVDD 3, 13 A2 I Power supply (Must be same voltage as AVDD) AVDD 9 D2 I Analog supply (Must be same voltage as PVDD) PGND 4, 12 C4 I Power ground AGND 18 C3 I Analog ground OUTR+ 14 D3 O Right channel positive differential output OUTR- 11 D4 O Right channel negative differential output OUTL+ 2 A3 O Left channel positive differential output OUTL- 5 A4 O Left channel negative differential output NC 6, 10 N/A No internal connection Thermal Pad Connect the thermal pad of QFN or PWP package to PCB GND
I/O DESCRIPTION
TPA2012D2
WCSP PIN OUT RTJ PIN OUT
TOP VIEW TOP VIEW
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TPA2012D2
IN+
IN-
OUT+
OUT-
V
DD
GND
C
I
C
I
R
I
R
I
Measurement
Output
+
-
1 Fm
+
-
Load
30kHz
Filter
LowPass
Measurement
Input
+
-
V
DD
TPA2012D2
SLOS438C – DECEMBER 2004 – REVISED MARCH 2007

TEST SET-UP FOR GRAPHS (per channel)

(1) CIwas Shorted for any Common-Mode input voltage measurement. (2) A 33- µ H inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements. (3) The 30–kHz low–pass filter is required even if the analyzer has an internal low–pass filter. An RC low pass filter (100
, 47 nF) is used on each output for the data sheet graphs.
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0.01
0.1
1
10
0.01 0.1 1 3
2.5 V
3.6 V
THD+N − Total Harmonic Distortion + Noise − %
PO − Output Power − W
RL = 8 , f = 1 kHz, AV 24 dB
5 V
20
0.01
0.1
1
10
20
0.01
0.1
1 4
2.5 V
3.6 V
5 V
PO − Output Power − W
RL = 4 , f = 1 kHz, AV 24 dB
THD+N − Total Harmonic Distortion + Noise − %
0.01
0.1
1
10
20
0.01 0.1 1 3
2.5 V
3.6 V
PO − Output Power − W
RL = 8 , f = 1 kHz, AV 6 dB
5 V
THD+N − Total Harmonic Distortion + Noise − %
0.1
1
20 100 1 k
10 k
20 k
f − Frequency − Hz
VDD = 2.5 V, RL = 4 W, CI = 1 mF, AV = 6 dB
0.01
120 mW
350 mW
240 mW
THD+N − Total Harmonic Distortion + Noise − %
0.1
1
20 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 2.5 V, RL = 8 W, CI = 1 mF, AV = 6 dB
0.01
90 mW
180 mW
THD+N − Total Harmonic Distortion + Noise − %
260 mW
0.01
0.1
1
10
20
0.01
0.1
1 4
2.5 V
3.6 V
5 V
PO − Output Power − W
RL = 4 , f = 1 kHz, AV 6 dB
THD+N − Total Harmonic Distortion + Noise − %
0.1
1
20 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 3.6 V, RL = 4 W, CI = 1 mF, AV = 6 dB
0.01
275 mW
550 mW
825 mW
THD+N − Total Harmonic Distortion + Noise − %
0.1
1
20 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 3.6 V, RL = 8 W, CI = 1 mF, AV = 6 dB
0.01
190 mW
375 mW
560 mW
THD+N − Total Harmonic Distortion + Noise − %
0.1
1
20 100 1 k 10 k 20 k
f − Frequency − Hz
VDD = 5 V, RL = 4 W, CI = 1 mF, AV = 6 dB
0.01
550 mW
1.1 W
1.65 W
THD+N − Total Harmonic Distortion + Noise − %
TPA2012D2
SLOS438C – DECEMBER 2004 – REVISED MARCH 2007

TYPICAL CHARACTERISTICS

TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION
vs vs vs
OUTPUT POWER OUTPUT POWER OUTPUT POWER
Figure 1. Figure 2. Figure 3.
TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION
vs vs vs
OUTPUT POWER FREQUENCY FREQUENCY
TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION
Figure 4. Figure 5. Figure 6.
vs vs vs
FREQUENCY FREQUENCY FREQUENCY
Figure 7. Figure 8. Figure 9.
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