TEXAS INSTRUMENTS TPA2006D1 Technical data

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PWM H-

IN-

Bridge

O+

O-

Internal

Oscillator

ToBattery

GND

Bias

Circuitry

Differential

Input

TPA2006D1

SHUTDOWN

IN+

IN−

O−

GND

O+

8-PINQFN(DRB)PACKAGE

(TOP VIEW)

NC − Nointernalconnection

IN+

1.45-W MONO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER WITH 1.8-V COMPATIBLE INPUT THRESHOLDS

FEATURES APPLICATIONS

• Maximum Battery Life and Minimum Heat – Efficiency With an 8- Ω Speaker:

• 88% at 400 mW

• 80% at 100 mW

– 2.8-mA Quiescent Current – 0.5- µ A Shutdown Current

• Shutdown Pin has 1.8-V Compatible Thresholds

• Only Three External Components

• Optimized PWM Output Stage Eliminates

LC Output Filter

• Internally Generated 250-kHz Switching

Frequency Eliminates Capacitor and Resistor

• Improved PSRR (–75 dB) and Wide

Supply Voltage (2.5 V to 5.5 V) Eliminates Need for a Voltage Regulator

• Fully Differential Design Reduces RF

Rectification and Eliminates Bypass Capacitor

• Improved CMRR Eliminates Two Input

Coupling Capacitors

• Space Saving 3 mm x 3 mm QFN Package (DRB)

TPA2006D1

SLOS498 – SEPTEMBER 2006

• Ideal for Wireless or Cellular Handsets and

PDAs

DESCRIPTION

The TPA2006D1 is a 1.45-W high efficiency filter-free class-D audio power amplifier in a 3 mm × 3 mm QFN package that requires only three external components. The SHUTDOWN pin is fully compatible with 1.8-V logic GPIO, such as are used on low power cellular chipsets.

Features like 88% efficiency, –75-dB PSRR, improved RF-rectification immunity, and very small total PCB footprint make the TPA2006D1 ideal for cellular handsets. A fast start-up time of 1 ms with minimal pop makes the TPA2006D1 ideal for PDA applications.

In cellular handsets, the earpiece, speaker phone, and melody ringer can each be driven by the TPA2006D1. The TPA2006D1 allows independent gain while summing signals from separate sources, and has a low 36 µ V noise floor, A-weighted.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

APPLICATION CIRCUIT

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TPA2006D1

SLOS498 – SEPTEMBER 2006

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

PACKAGE

–40 ° C to 85 ° C 8-pin QFN (DRB) TPA2006D1DRB BTQ

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com .

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

Supply voltage

Input voltage –0.3 V to V

Continuous total power dissipation See Dissipation Rating Table

Operating free-air temperature –40 ° C to 85 ° C

Operating junction temperature –40 ° C to 125 ° C

Storage temperature –65 ° C to 150 ° C

stg

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(1)

PART NUMBER SYMBOL

TPA2006D1

In active mode –0.3 V to 6 V In SHUTDOWN mode –0.3 V to 7 V

+ 0.3 V

RECOMMENDED OPERATING CONDITIONS

MIN NOM MAX UNIT

Supply voltage 2.5 5.5 V

High-level input voltage SHUTDOWN 1.3 V

Low-level input voltage SHUTDOWN 0 0.35 V

Input resistor Gain ≤ 20 V/V (26 dB) 15 k Ω

Common mode input voltage range V

Operating free-air temperature –40 85 ° C

= 2.5 V, 5.5 V, CMRR ≤ –49 dB 0.5 VDD–0.8 V

PACKAGE DISSIPATION RATINGS

PACKAGE DERATING FACTOR

(1)

DRB 21.8 mW/ ° C 2.7 W 1.7 W 1.4 W

(1) Derating factor measure with High K board.

TA≤ 25 ° C TA= 70 ° C TA= 85 ° C

POWER RATING POWER RATING POWER RATING

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V V

285 kW

300 kW

315 kW

TPA2006D1

SLOS498 – SEPTEMBER 2006

ELECTRICAL CHARACTERISTICS

TA= 25 ° C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

|V PSRR Power supply rejection ratio V CMRR Common mode rejection ratio –68 –49 dB |IIH| High-level input current V

|IIL| Low-level input current V

(Q)

(SD)

DS(on)

(sw)

Output offset voltage

| VI= 0 V, AV= 2 V/V, V

(measured differentially)

= 2.5 V to 5.5 V –75 –55 dB

= 2.5 V to 5.5 V, VIC= VDD/2 to 0.5 V,

VIC= VDD/2 to V

= 5.5 V, VI= 5.8 V 100 µ A

= 5.5 V, VI= –0.3 V 5 µ A

= 5.5 V, no load 3.4 4.9

Quiescent current V

Shutdown current V

Static drain-source on-state resistance

Output impedance in SHUTDOWN V Switching frequency V

= 3.6 V, no load 2.8 mA

= 2.5 V, no load 2.2 3.2

DD ( SHUTDOWN)

= 2.5 V 770

= 3.6 V 590 m Ω

= 5.5 V 500

DD ( SHUTDOWN)

= 2.5 V to 5.5 V 200 250 300 kHz

= 2.5 V to 5.5 V 25 mV

–0.8 V

= 0.35 V, V

= 2.5 V to 5.5 V 0.5 2 µ A

= 0.35 V >1 k Ω

Gain V

Resistance from shutdown to GND 300 k Ω

OPERATING CHARACTERISTICS

TA= 25 ° C, Gain = 2 V/V, RL= 8 Ω (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

THD + N = 10%, f = 1 kHz, RL= 8 Ω V

THD+N V

SVR

SNR Signal-to-noise ratio V

CMRR Common mode rejection ratio V Z

Output power

THD + N = 1%, f = 1 kHz, RL= 8 Ω V

= 5 V, PO= 1 W, RL= 8 Ω , f = 1 kHz 0.19% Total harmonic distortion plus noise

Supply ripple rejection ratio V

Output voltage noise µ V

= 3.6 V, PO= 0.5 W, RL= 8 Ω , f = 1 kHz 0.19%

= 2.5 V, PO= 200 mW, RL= 8 Ω , f = 1 kHz 0.20%

= 3.6 V, Inputs ac-grounded

with Ci= 2 µ F

= 5 V, PO= 1 W, RL= 8 Ω , A-weighted 97 dB

= 3.6 V, f = 20 Hz to 20 kHz,

Inputs ac-grounded with Ci= 2 µ F

= 3.6 V, VIC= 1 V

Input impedance 142 150 158 k Ω Start-up time from shutdown V

= 3.6 V 1 ms

= 2.5 V to 5.5 V

= 5 V 1.45

= 3.6 V 0.73 W

= 2.5 V 0.33

= 5 V 1.19

= 3.6 V 0.59 W

= 2.5 V 0.26

f = 217 Hz,

= 200 –67 dB

(RIPPLE)

No weighting 48 A weighting 36

f = 217 Hz –63 dB

RMS

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150kW

300kW

150kW

TPA2006D1

SLOS498 – SEPTEMBER 2006

Terminal Functions

TERMINAL

NAME DRB

IN– 4 I Negative differential input IN+ 3 I Positive differential input V

O+

GND 7 O High-current ground V

O-

SHUTDOWN 1 I Shutdown terminal (active low logic) NC 2 - No Connect, not connected internal to the device. May be left unconnected Thermal Pad O Should be soldered to a grounded thermal pad on PCB for best thermal performance

6 I Power supply 5 O Positive BTL output

8 O Negative BTL output

FUNCTIONAL BLOCK DIAGRAM

I/O DESCRIPTION

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TPA2006D1

IN+

IN-

OUT+

OUT-

GND

Measurement

Output

1 Fm

Load

30-kHz

Low-Pass

Filter

Measurement

Input

SLOS498 – SEPTEMBER 2006

TYPICAL CHARACTERISTICS

TABLE OF GRAPHS

FIGURE

Efficiency vs Output power 1

(Q)

(SD)

THD+N Total harmonic distortion plus noise vs Frequency 10, 11, 12

CMRR Common-mode rejection ratio

Power dissipation vs Output power 2

Supply current vs Output power 3 Quiescent current vs Supply voltage 4 Shutdown current vs Shutdown voltage 5

Output power

vs Supply voltage 8 vs Load resistance 6, 7 vs Output power 9

vs Common-mode input voltage 13

Supply ripple rejection ratio vs Frequency 14, 15

SVR

GSM power supply rejection

Supply ripple rejection ratio vs Common-mode input voltage 18

SVR

vs Time 16 vs Frequency 17

vs Frequency 19 vs Common-mode input voltage 20

TPA2006D1

TEST SET-UP FOR GRAPHS

A. CIis shorted for any common-mode input voltage measurement. B. A 33- µ H inductor is placed in series with the load resistor to emulate a small speaker for efficiency measurements. C. The 30-kHz low-pass filter is required even if the analyzer has an internal low-pass filter. An RC low-pass filter

(100 Ω , 47 nF) is used on each output for the data sheet graphs.

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0 0.2 0.4 0.6 0.8 1 1.2

=2.5V,

R =8 ,33 HW m

Class-AB, V =5V,

R =8

P -OutputPower-W

Efficiency-%

=5V,

R =8 ,33 HW m

100

150

200

250

300

0 0.2 0.4 0.6 0.8 1 1.2

-OutputPower-W

V =2.5V,

R =8 ,33 H

W m

V =3.6V,

R =8 ,33 H

W m

V =5V,

R =8 ,33 H

W m

SupplyCurrent-mA

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0 0.2 0.4 0.6 0.8 1 1.2

PowerDissipation-W

PO-OutputPower-W

Class-AB, V =5V,R =8

DD L

Class-AB, V =3.6V,

R =8

V =3.6V,

R =8 ,33 H

W m

V =5V,

R =8 ,33 H

W m

0.5

1.5

0 0.1 0.2 0.3 0.4 0.5

Shutdown Voltage − V

− Shutdown Current −

(SD)

Aµ

VDD = 5 V

VDD = 3.6 V

VDD = 2.5 V

0.2

0.4

0.6

0.8

1.2

1.4

1.6

8 12 16 20 24 28 32

VDD=5V

V =3.6V

V =2.5V

R -LoadResistance-LW

P -OutputPower-W

f=1kHz THD+N=10% Gain=2V/V

2.2

2.4

2.6

2.8

3.2

3.4

3.6

3.8

2.5 3 3.5 4 4.5 5 5.5

(Q)

− QuiescentCurrent −

V − V

− SupplyVoltage

NoLoad

R =8 ,33 H

W m

2.5 3 3.5 4 4.5 5

V -SupplyVDDoltage-V

P -OutputPower-W

R =8 f=1kHz

Gain=2V/V

THD+N=1%

THD+N=10%

0.2

0.4

0.6

0.8

1.2

1.4

1.6

0.1

0.001 0.01 1k 10k

PowerOutput − W

THD+N − TotalHarmonicDistortion+Noise − %

0.1k

R =8 f=1kHz

2.5V

3.6V

5V

0.2

0.4

0.6

0.8

1.2

1.4

8 12 16 20 28

R -LoadResistance-LW

P -OutputPower-W

3224

f=1kHz THD+N=1% Gain=2V/V

V =2.5V

V =3.6V

VDD=5V

TPA2006D1

SLOS498 – SEPTEMBER 2006

EFFICIENCY POWER DISSIPATION SUPPLY CURRENT

vs vs vs

OUTPUT POWER OUTPUT POWER OUTPUT POWER

Figure 1. Figure 2. Figure 3.

QUIESCENT CURRENT SUPPLY CURRENT OUTPUT POWER

vs vs vs

SUPPLY VOLTAGE SHUTDOWN VOLTAGE LOAD RESISTANCE

Figure 4. Figure 5. Figure 6.

TOTAL HARMONIC DISTORTION +

OUTPUT POWER OUTPUT POWER NOISE

vs vs vs

LOAD RESISTANCE SUPPLY VOLTAGE OUTPUT POWER

Figure 7. Figure 8. Figure 9.

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0.01

0.1

20 100 10k 20k

f − Frequency − Hz

THD+N − TotalHarmonicDistortion+Noise − %

P =1W

P =0.25W

P =0.5W

V =5V

R =8LW

1k

0.001

0.1

20 100 10k 20k

f − Frequency − Hz

THD+N − TotalHarmonicDistortion+Noise − %

0.01

1k

V =3.6V

R =8LW

P =0.25W

P =0.5W

P =0.125W

0.001

0.1

20 100 10k 20k

f − Frequency − Hz

THD+N − TotalHarmonicDistortion+Noise − %

0.01

1k

V =2.5V

R =8LW

P =0.2W

P =0.075W

P =0.015W

−90

−80

−70

−60

−50

−40

−30

20 100 1k 10k

VDD=5V

VDD=2.5V

f − Frequency − Hz

SopplyRippleRejectionRatio − dB

Inputsfloating R =8LW

20k

VDD=3.6V

−90

−80

−70

−60

−50

−40

−30

20 100 1k 20k

f − Frequency − Hz

SupplyRippleRejectionRatio − dB

VDD=2.5V

VDD=3.6V

VDD=5V

Inputsac-grounded C

=2 Fm

=8 W

Gain=2V/V

10k

0.1

0 0.5 1 1.5 2 2.5

f = 1 kHz PO = 200 mW

− Common Mode Input Voltage − V

THD+N − Total Harmonic Distortion + Noise − %

3 3.5 4 4.5 5

VDD = 2.5 V

VDD = 5 V

VDD = 3.6 V

C1 − High

3.6 V

C1 − Amp 512 mV

C1 − Duty 12%

t − Time − 2 ms/div

200 mV/div

OUT

20 mV/div

−150

−100

−50

0 400 800 1200 1600 2000

−150

−100

−50

f − Frequency − Hz

− Output Voltage − dBVV O

− Supply Voltage − dBVV DD

VDD Shown in Figure 22 CI = 2 µF, Inputs ac-grounded Gain = 2V/V

TPA2006D1

SLOS498 – SEPTEMBER 2006

TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION +

NOISE NOISE NOISE

vs vs vs

FREQUENCY FREQUENCY FREQUENCY

Figure 10. Figure 11. Figure 12.

TOTAL HARMONIC DISTORTION +

NOISE SUPPLY RIPPLE REJECTION RATIO SUPPLY RIPPLE REJECTION RATIO

vs vs vs

COMMON MODE INPUT VOLTAGE FREQUENCY FREQUENCY

Figure 13. Figure 14. Figure 15.

GSM POWER SUPPLY REJECTION GSM POWER SUPPLY REJECTION

vs vs

TIME FREQUENCY

Figure 16. Figure 17.

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−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

0 1 2 3 4 5

VIC − Common Mode Input Voltage − V

CMRR − Common Mode Rejection Ratio − dB

VDD = 5 V, Gain = 2

VDD = 2.5 V

VDD = 3.6 V

−75

−70

−65

−60

−55

−50

20 100 1 k 20 k

VDD = 3.6 V

f − Frequency − Hz

CMRR − Common Mode Rejection Ratio − dB

= 200 mV

RL = 8 Ω Gain = 2 V/V

10 k

−80

−70

−60

−50

−40

−30

−20

−10

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

DC Common Mode Voltage − V

Sopply Ripple Rejection Ratio − dB

VDD = 2. 5 V

VDD = 3.6 V

VDD = 5 V

TPA2006D1

SLOS498 – SEPTEMBER 2006

SUPPLY RIPPLE REJECTION RATIO COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO

vs vs vs

DC COMMON MODE VOLTAGE FREQUENCY COMMON-MODE INPUT VOLTAGE

Figure 18. Figure 19. Figure 20.

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TEXAS INSTRUMENTS TPA2006D1 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES APPLICATIONS

DESCRIPTION

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

APPLICATION CIRCUIT

ORDERING INFORMATION

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

PACKAGE DISSIPATION RATINGS

ELECTRICAL CHARACTERISTICS

OPERATING CHARACTERISTICS

FUNCTIONAL BLOCK DIAGRAM

TYPICAL CHARACTERISTICS

TABLE OF GRAPHS

TEST SET-UP FOR GRAPHS