TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Excellent Output Drive Capability
V
O
= ± 2.5 V Min at RL = 100 Ω,
V
CC±
= ± 5 V
V
O
= ± 12.5 V Min at R
L
= 600 Ω,
V
CC±
= ± 15 V
D
Low Supply Current...280 µA Typ
D
Decompensated for High Slew Rate and
Gain-Bandwidth Product
A
VD
= 0.5 Min
Slew Rate = 10 V/µs Typ
Gain-Bandwidth Product = 6.5 MHz Typ
D
Wide Operating Supply Voltage Range
V
CC ±
= ± 3.5 V to ± 18 V
D
High Open-Loop Gain...280 V/mV Typ
D
Low Offset Voltage . . . 500 µV Max
D
Low Offset Voltage Drift With Time
0.04 µV/Month Typ
D
Low Input Bias Current...5 pA Typ
description
The TLE2161, TLE2161A, and TLE2161B are
JFET-input, low-power, precision operational
amplifiers manufactured using the Texas
Instruments Excalibur process. Decompensated
for stability with a minimum closed-loop gain of 5,
these devices combine outstanding output drive
capability with low power consumption, excellent
dc precision, and high gain-bandwidth product.
In addition to maintaining the traditional JFET
advantages of fast slew rates and low input bias
and offset currents, the Excalibur process offers
outstanding parametric stability over time and
temperature. This results in a device that remains
precise even with changes in temperature and
over years of use.
AVAILABLE OPTIONS
PACKAGE
T
A
VIOmax
°
SMALL
CHIP
CERAMIC
PLASTIC
AT 25 C
OUTLINE
(D)
CARRIER
(FK)
DIP
(JG)
DIP
(P)
0°C
500 µV
—
— — TLE2161BCP
t
o
70°C
1.5 mV
3 mV
TLE2161ACD
TLE2161CD — —
TLE2161ACP
TLE2161CP
–40°C
500 µV
—
— — TLE2161BIP
t
o
85°C
1.5 mV
3 mV
TLE2161AID
TLE2161ID — —
TLE2161AIP
TLE2161IP
–55°C
500 µV
—
—
TLE2161BMJG
TLE2161BMP
to
125°C
1.5 mV
3 mV
TLE2161AMD
TLE2161MD
TLE2161AMFK
TLE2161MFK
TLE2161AMJG
TLE2161MJG
TLE2161AMP
TLE2161MP
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2161ACDR).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1996, Texas Instruments Incorporated
10 k1 k100
RL – Load Resistance – Ω
10
0
2
4
6
8
10
TA = 25
°C
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
– Maximum Peak-to-Peak Output Voltage – V
V
O(PP)
V
CC
±
= ± 5 V
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
A variety of available options includes small-outline packages and chip-carrier versions for high-density system
applications.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of – 55°C to 125°C.
NC
1
2
3
4
8
7
6
5
OFFSET N1
IN –
IN +
V
CC –
NC
V
CC +
OUT
OFFSET N2
D, JG, OR P PACKAGE
(TOP VIEW)
NC – No internal connection
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
V
CC +
NC
OUT
NC
NC
IN –
NC
IN +
NC
FK PACKAGE
(TOP VIEW)
NCN1NCNCNC
NC
NC
N2
CC –
V
equivalent schematic
Q35
Q34
2.7 kΩ
Q10
Q15
V
CC –
Q2
OFFSET N2
OFFSET N1
1.1 kΩ
R1
15 pF
C1
55 kΩ
1.1 kΩ
R4
R2
Q8
C2 15 pF
Q6
2.4 k
Ω
R3
60 kΩ
R5
Q12
Q22
Q21
Q26
Q7
IN –
IN +
1.6 pF
C3
Q11
Q20
Q24
Q16
Q17
Q23
R6
Q19
Q18
Q25
Q27
Q28
600Ω
R7
Q31
Q30 Q38
Q39
Q41
Q42
OUT
100 Ω
R9
20 Ω
R8
Q29
Q43Q40Q37
Q36Q33
Q32
Q5
Q1
Q3
Q14
Q13Q9
Q4
V
CC +
All component values are nominal.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC +
(see Note 1) 19 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, V
CC –
– 19 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V
ID
(see Note 2) ± 38 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(any input) V
CC ±
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, I
I
(each input) ± 1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I
O
± 80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current into V
CC +
80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current out of V
CC –
80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix – 40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M suffix – 55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package 260°C. . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
CC +
, and VCC –.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW
FK 1375 mW 1 1.0 mW/° C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW
recommended operating conditions
C SUFFIX I SUFFIX M SUFFIX
MIN MAX MIN MAX MIN MAX
UNIT
Supply voltage, V
CC
±
±3.5 ±18 ±3.5 ±18 +3.5 ±18 V
p
V
CC ±
= ± 5 V –1.6 4 –1.6 4 –1.6 4
Common-mode input voltage, V
IC
V
CC ±
= ± 15 V –11 13 –11 13 –11 13
V
Operating free-air temperature, T
A
0 70 –40 85 –55 125 °C
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
CC ±
= ± 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161C, TLE2161AC
TLE2161BC
UNIT
A
MIN TYP MAX
25°C 0.8 3.1
TLE2161C
Full range 4
p
25°C 0.6 2.6
VIOInput offset voltage
TLE2161AC
Full range 3.5
mV
25°C 0.5 1.9
TLE2161BC
Full range 2.4
α
VIO
Temperature coefficient of input offset voltage
V
IC
=
0
,
R
S
=
50 Ω
Full range 6 µV/°C
Input offset voltage long-term drift (see Note 4) 25°C 0.04 µV/mo
p
25°C 1 pA
IIOInput offset current
Full range 0.8 nA
p
25°C 3 pA
IIBInput bias current
Full range 2 nA
p
25°C
–1.6
to 4–2to 6
V
V
ICR
Common-mode input voltage range
Full range
–1.6
to 4
V
25°C 3.5 3.7
p
p
p
R
L
=
10
kΩ
Full range 3.3
V
OM +
Maximum positive peak output voltage swing
25°C 2.5 3.1
V
R
L
=
100 Ω
Full range 2
25°C –3.7 –3.9
p
p
R
L
= 10
kΩ
Full range –3.3
V
OM –
Maximum negative peak output voltage swing
25°C –2.5 –2.7
V
R
L
=
100 Ω
Full range –2
25°C 15 80
V
O
= ±2.8 V,
R
L
= 10
kΩ
Full range 2
p
25°C 0.75 45
AVDLarge-signal differential voltage amplification
V
O
= 0 to 2 V,
R
L
=
100 Ω
Full range 0.5
V/mV
25°C 0.5 3
V
O
=
0 to –2 V
,
R
L
=
100 Ω
Full range 0.25
r
i
Input resistance 25°C 10
12
Ω
c
i
Input capacitance 25°C 4 pF
z
o
Open-loop output impedance IO = 0 25°C 280 Ω
25°C 65 82
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
R
S
= 50
Ω
Full range 65
dB
pp
V
= ±5 V to ±15 V
,
25°C 75 93
k
SVR
Suppl
y-v
oltage rejection ratio (∆V
CC±
/∆VIO)
V
CC±
±5 V to
±15 V,
RS = 50 Ω
Full range 75
dB
pp
25°C 280 325
ICCSupply current
Full range 350
µ
A
Supply-current change over operating
V
O
= 0,
No load
∆I
CC
yg g
temperature range
Full range
29µA
†
Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V
CC ±
= ±5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161C, TLE2161AC
TLE2161BC
UNIT
A
MIN TYP MAX
25°C 7 10
SR Slew rate (see Figure 1) AVD = 5, RL = 10 kΩ,CL = 100 pF
Full
range
5
V/µs
Equivalent input noise voltage
RS = 20 Ω, f = 10 Hz
°
59 100
V
n
qg
(see Figure 2)
RS = 20 Ω,
f = 1 kHz
25°C
43 60
n
V/√H
z
V
n(PP)
Peak-to-peak equivalent input
noise voltage
f = 0.1 Hz to 10 Hz 25°C 1.1 µV
I
n
Equivalent input noise current f = 1 kHz 25°C 1 fA/√Hz
THD Total harmonic distortion
V
O(PP)
= 2 V,
RL = 10 kΩ
A
VD
= 5, f = 10 kHz,
25°C 0.025%
Gain-bandwidth product
f = 100 kHz, RL = 10 kΩ, CL = 100 pF
°
5.8
(see Figure 3)
f = 100 kHz,
RL = 100 kΩ, CL = 100 pF
25°C
4.3
MH
z
ε = 0.1%
°
5
tsSettling time
ε = 0.01%
25°C
10
µ
s
B
OM
Maximum output-swing
bandwidth
AVD = 5, RL = 10 kΩ 25°C 420 kHz
AVD = 5, RL = 10 kΩ, CL = 100 pF
°
70°
φ
m
Phase margin (see Figure 3)
AVD = 5, RL = 100 Ω, CL = 100 pF
25°C
84°
†
Full range is 0°C to 70°C.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
CC ±
= ± 15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161C, TLE2161AC
TLE2161BC
UNIT
A
MIN TYP MAX
25°C 0.6 3
TLE2161C
Full range 3.9
p
25°C 0.5 1.5
VIOInput offset voltage
TLE2161AC
Full range 2.5
mV
25°C 0.3 0.5
TLE2161BC
Full range 1
α
VIO
Temperature coefficient of input offset voltage
VIC = 0, RS = 50 Ω
Full range
6 µV/°C
Input offset voltage long-term drift
(see Note 4)
25°C 0.04 µV/mo
p
25°C 2 pA
IIOInput offset current
Full range 1 nA
p
25°C 4 pA
IIBInput bias current
Full range 3 nA
p
25°C
–11
to 13
–12
to 16
V
V
ICR
Common-mode input voltage range
Full range
–11
to 13
V
25°C 13.2 13.7
p
p
p
R
L
= 10
kΩ
Full range 13
V
OM +
Maximum positive peak output voltage swing
25°C 12.5 13.2
V
R
L
=
600 Ω
Full range 12
25°C –13.2 –13.7
p
p
R
L
= 10
kΩ
Full range –13
V
OM –
Maximum negative peak output voltage swing
25°C –12.5 –13
V
R
L
=
600 Ω
Full range –12
25°C 30 230
V
O
=
±10 V
,
R
L
= 10
kΩ
Full range 20
p
25°C 25 100
AVDLarge-signal differential voltage amplification
V
O
= 0 to 8 V,
R
L
=
600 Ω
Full range 10
V/mV
25°C 3 25
V
O
= 0 to –8 V,
R
L
=
600 Ω
Full range 1
r
i
Input resistance 25°C
10
12
Ω
c
i
Input capacitance 25°C 4 pF
z
o
Open-loop output impedance IO = 0 25°C 280 Ω
25°C 72 90
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
R
S
= 50
Ω
Full range 70
dB
pp
V
= ±5 V to ±15 V,
25°C 75 93
k
SVR
Suppl
y-v
oltage rejection ratio (∆V
CC±
/∆VIO)
CC±
,
RS = 50 Ω
Full range 75
dB
pp
25°C 290 350
ICCSupply current
Full range 375
µ
A
Supply-current change over operating
VO
= 0,
No load
∆I
CC
yg g
temperature range
Full range
34µA
†
Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V
CC±
= ±15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161C, TLE2161AC
TLE2161BC
UNIT
A
MIN TYP MAX
p
25°C 7 10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
L
= 10 kΩ,
C
L
=
100 pF
Full range 5
V/µs
Equivalent input noise voltage
RS = 20 Ω, f = 10 Hz
°
70 100
V
n
qg
(see Figure 2)
RS = 20 Ω,
f = 1 kHz
25°C
40 60
n
V/√H
z
V
n(PP)
Peak-to-peak equivalent input
noise voltage
f = 0.1 Hz to 10 Hz 25°C 1.1 µV
I
n
Equivalent input noise current f = 1 kHz 25°C 1.1 fA/√Hz
THD T otal harmonic distortion
V
O(PP)
= 2 V,
RL = 10 kΩ
A
VD
= 5, f = 10 kHz,
25°C 0.025%
Gain-bandwidth product
f = 100 kHz, RL = 10 kΩ, CL = 100 pF
°
6.4
(see Figure 3)
f = 100 kHz,
RL = 600 Ω, CL = 100 pF
25°C
5.6
MH
z
ε = 0.1%
°
5
tsSettling time
ε = 0.01%
25°C
10
µ
s
B
OM
Maximum output-swing
bandwidth
AVD = 5, RL = 10 kΩ 25°C 116 kHz
AVD = 5, RL = 10 kΩ, CL = 100 pF
°
72°
φ
m
Phase margin (see Figure 3)
AVD = 5, RL = 600 Ω, CL = 100 pF
25°C
78°
†
Full range is 0°C to 70°C.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
CC ±
= ± 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161I, TLE2161AI
TLE2161BI
UNIT
A
MIN TYP MAX
25°C 0.8 3.1
TLE2161I
Full range 4.4
p
25°C 0.6 2.6
VIOInput offset voltage
TLE2161AI
Full range 3.9
mV
25°C 0.5 1.9
TLE2161BI
Full range 2.7
α
VIO
Temperature coefficient of input offset voltage
VIC = 0, RS = 50 Ω
Full range
6 µV/°C
Input offset voltage long-term drift
(see Note 4)
25°C 0.04 µV/mo
p
25°C 1 pA
IIOInput offset current
Full range 2 nA
p
25°C 3 pA
IIBInput bias current
Full range 4 nA
p
25°C
–1.6
to
4
–2
to
6
V
ICR
Common-mode input voltage range
Full range
–1.6
to
4
V
25°C 3.5 3.7
p
p
p
R
L
= 10
kΩ
Full range 3.1
V
OM +
Maximum positive peak output voltage
25°C 2.5 3.1
V
R
L
=
100 Ω
Full range 2
25°C –3.7 –3.9
p
p
R
L
= 10
kΩ
Full range –3.1
V
OM –
Maximum negative peak output voltage swing
25°C –2.5 –2.7
V
R
L
=
100 Ω
Full range –2
25°C 15 80
V
O
= ±2.8 V,
R
L
= 10
kΩ
Full range 2
p
25°C 0.75 45
AVDLarge-signal differential voltage amplification
V
O
= 0 to 2 V,
R
L
=
100 Ω
Full range 0.5
V/mV
25°C 0.5 3
V
O
=
0 to –2 V
,
R
L
=
100 Ω
Full range 0.25
r
i
Input resistance 25°C 10
12
Ω
c
i
Input capacitance 25°C 4 pF
z
o
Open-loop output impedance IO = 0 25°C 280 Ω
25°C 65 82
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
R
S
= 50
Ω
Full range 65
dB
pp
V
CC±
= ±5 V to ± 15 V,
25°C 75 93
k
SVR
Suppl
y-v
oltage rejection ratio (∆V
CC±
/∆VIO)
CC±
RS = 50 Ω
Full range 65
dB
pp
25°C 280 325
ICCSupply current
Full range 350
µ
A
∆I
CC
Supply-current change over operating
temperature range
V
O
= 0,
No load
Full range 29 µA
†
Full range is – 40°C to 85°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V
CC ±
= ± 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161I, TLE2161AI
TLE2161BI
UNIT
A
MIN TYP MAX
p
25°C 7 10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
L
= 10 kΩ,
C
L
=
100 pF
Full range 5
V/µs
Equivalent input noise
RS = 20 Ω, f = 10 Hz
°
59 100
V
n
q
voltage (see Figure 2)
RS = 20 Ω,
f = 1 kHz
25°C
43 60
n
V/√H
z
V
n(PP)
Peak-to-peak equivalent
input noise voltage
f = 0.1 Hz to 10 Hz 25°C 1.1 µV
I
n
Equivalent input noise
current
f = 1 kHz 25°C 1 fA/√Hz
THD Total harmonic distortion
V
O(PP)
= 2 V,
RL = 10 kΩ
A
VD
= 5, f = 10 kHz,
25°C 0.025%
Gain-bandwidth product
f = 100 kHz, RL = 10 kΩ, CL = 100 pF
°
5.8
(see Figure 3)
f = 100 kHz,
RL = 100 Ω, CL = 100 pF
25°C
4.3
MH
z
ε = 0.1%
°
5
tsSettling time
ε = 0.01%
25°C
10
µ
s
B
OM
Maximum output-swing
bandwidth
AVD = 5, RL = 10 kΩ 25°C 420 kHz
AVD = 5, RL = 10 kΩ, CL = 100 pF
°
70°
φ
m
Phase margin (see Figure 3)
AVD = 5, RL = 100 Ω, CL = 100 pF
25°C
84°
†
Full range is – 40°C to 85°C.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
CC ±
= ± 15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161I, TLE2161AI
TLE2161BI
UNIT
A
MIN TYP MAX
25°C 0.6 3
TLE2161I
Full range 4.3
p
25°C 0.5 1.5
VIOInput offset voltage
TLE2161AI
Full range 2.9
mV
25°C 0.3 0.5
TLE2161BI
Full range 1.3
α
VIO
Temperature coefficient of input offset voltage
V
IC
= 0,
R
S
= 50
Ω
Full range 6 µV/°C
Input offset voltage long-term drift (see Note 4) 25°C 0.04 µV/mo
p
25°C 2 pA
IIOInput offset current
Full range 3 nA
p
25°C 4 pA
IIBInput bias current
Full range 5 nA
p
25°C
–11
to
13
–12
to
16
V
V
ICR
Common-mode input voltage range
Full range
–11
to
13
V
25°C 13.2 13.7
p
p
p
R
L
= 10
kΩ
Full range 13
V
OM +
Maximum positive peak output voltage swing
25°C 12.5 13.2
V
R
L
=
600 Ω
Full range 12
25°C –13.2 –13.7
p
p
R
L
= 10
kΩ
Full range –13
V
OM –
Maximum negative peak output voltage swing
25°C –12.5 –13
V
R
L
=
600 Ω
Full range –12
25°C 30 230
V
0
=
±10 V
,
R
L
= 10
kΩ
Full range 20
p
25°C 25 100
AVDLarge-signal differential voltage amplification
V
0
= 0 to 8 V,
R
L
=
600 Ω
Full range 10
V/mV
25°C 3 25
V
0
= 0 to –8 V,
R
L
=
600 Ω
Full range 1
r
i
Input resistance 25°C
10
12
Ω
c
i
Input capacitance 25°C 4 pF
z
o
Open-loop output impedance IO = 0 25°C 280 Ω
25°C 72 90
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
R
S
= 50
Ω
Full range 65
dB
pp
V
CC±
= ±5 V to ±15 V,
25°C 75 93
k
SVR
Suppl
y-v
oltage rejection ratio (∆V
CC±
/∆VIO)
CC±
RS = 50 Ω
Full range 65
dB
pp
25°C 290 350
ICCSupply current
Full range 375
µ
A
∆I
CC
Supply-current change over operating
temperature range
V
O
= 0,
No load
Full range 34 µA
†
Full range is – 40°C to 85°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA= 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V
CC ±
= ± 15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
†
TLE2161I, TLE2161AI
TLE2161IB
UNIT
A
MIN TYP MAX
p
25°C 7 10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
L
= 10 kΩ,
C
L
=
100 pF
Full range 5
V/µs
Equivalent input noise voltage
RS = 20 Ω, f = 10 Hz
°
70 100
V
n
qg
(see Figure 2)
RS = 20 Ω,
f = 1 kHz
25°C
40 60
n
V/√H
z
Peak-to-peak equivalent input
°
V
n(PP)
q
noise voltage
f
= 0.1 Hz to 10 Hz
25°C
1.1µV
I
n
Equivalent input noise current f = 1 kHz 25°C 1.1
fA/√Hz
V
= 2 V , A
= 5, f = 10 kHz,
°
THD
Total harmonic distortion
O(PP)
,
RL = 10 kΩ
VD
,
,
25°C
0.025%
Gain-bandwidth product
f = 100 kHz, RL = 10 kΩ, CL = 100 pF
°
6.4
(see Figure 3)
f = 100 kHz,
RL = 600 Ω, CL = 100 pF
25°C
5.6
MH
z
ε = 0.1%
°
5
tsSettling time
ε = 0.01%
25°C
10
µ
s
Maximum output-swing
°
B
OM
g
bandwidth
A
VD
= 5,
R
L
= 10
kΩ
25°C
116
kH
z
AVD = 5, RL = 10 kΩ, CL = 100 pF
°
72°
φ
m
Phase margin (see Figure 3)
AVD = 5, RL = 600 Ω, CL = 100 pF
25°C
78°
†
Full range is – 40°C to 85°C.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
CC ±
= ± 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
†
TLE2161M
TLE2161AM
TLE2161BM
UNIT
MIN TYP MAX
25°C 0.8 3.1
TLE2161M
Full range 6
p
25°C 0.6 2.6
VIOInput offset voltage
TLE2161AM
Full range 4.6
mV
25°C 0.5 1.9
TLE2161BM
Full range 3.1
α
VIO
Temperature coefficient of input offset
voltage
VIC = 0, RS = 50 Ω
Full range 6 µV/°C
Input offset voltage long-term drift
(see Note 4)
25°C 0.04 µV/mo
p
25°C 1 pA
IIOInput offset current
Full range 15 nA
p
25°C 3 pA
IIBInput bias current
Full range 30 nA
p
25°C
–1.6
to 4–2to 6
V
V
ICR
Common-mode input voltage range
Full range
–1.6
to 4
V
p
25°C 3.5 3.7
All packages
R
L
= 10
kΩ
Full range 3
V
Maximum positive peak FK and JG
25°C 2.5 3.6
V
OM +
output voltage swing packages
R
L
=
600 Ω
Full range 2
D and P
25°C 2.5 3.1
V
packages
R
L
=
100 Ω
Full range 2
p
25°C –3.7 –3.9
All packages
R
L
= 10
kΩ
Full range –3
Maximum negative peak FK and JG
25°C –2.5 –3.5
V
OM –
g
output voltage swing packages
R
L
=
600 Ω
Full range –2
V
D and P
25°C –2.5 –2.7
packages
R
L
=
100 Ω
Full range –2
p
25°C 15 80
All packages
V
0
= ±2.8 V,
R
L
= 10
kΩ
Full range 2
25°C 1 65
FK and JG
V
0
= 0 to 2.5 V,
R
L
=
600 Ω
Full range 0.5
Large-signal differential
packages
25°C 1 16
A
VD
gg
voltage amplification
V
0
=
0 to –2.5 V
,
R
L
=
600 Ω
Full range 0.5
V/mV
25°C 0.75 45
D and P
V
0
= 0 to 2 V,
R
L
=
100 Ω
Full range 0.5
packages
25°C 0.5 3
V
0
= 0 to –2 V,
R
L
=
100 Ω
Full range 0.25
†
Full range is – 55°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
CC ±
= ± 5 V (unless otherwise noted
continued)
PARAMETER TEST CONDITIONS
T
A
†
TLE2161M
TLE2161AM
TLE2161BM
UNIT
MIN TYP MAX
r
i
Input resistance 25°C 10
12
Ω
c
i
Input capacitance 25°C 4 pF
z
o
Open-loop output impedance IO = 0 25°C 280 Ω
25°C 65 82
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
R
S
= 50
Ω
Full range 60
dB
pp
V
= ±5 V to ±15 V,
25°C 75 93
k
SVR
Suppl
y-v
oltage rejection ratio (∆V
CC±
/∆VIO)
CC±
,
RS = 50 Ω
Full range 65
dB
pp
25°C 280 325
ICCSupply current
Full range 350
µ
A
∆I
CC
Supply-current change over operating
temperature range
V
O
= 0,
No load
Full range 39 µA
†
Full range is – 55°C to 125°C.
operating characteristics, V
CC ±
= ± 5 V, TA = 25°C
PARAMETER TEST CONDITIONS
TLE2161M
TLE2161AM
TLE2161BM
UNIT
MIN TYP MAX
SR Slew rate (see Figure 1) AVD = 5, RL = 10 kΩ, CL = 100 pF 10 V/µs
p
RS = 20 Ω, f = 10 Hz 59
VnEquivalent input noise voltage (see Figure 2)
RS = 20 Ω, f = 1 kHz 43
n
V/√H
z
V
n(PP)
Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 1.1 µV
I
n
Equivalent input noise current f = 1 kHz 1 fA/√Hz
THD Total harmonic distortion
A
VD
= 5,
RL = 10 kΩ
V
O(PP)
= 2 V, f = 10 kHz,
0.025%
p
f = 100 kHz, RL = 10 kΩ, CL = 100 pF 5.8
Gain-bandwidth product (see Figure 3)
f = 100 kHz, RL = 600 kΩ, CL = 100 pF 4.3
MH
z
ε = 0.1% 5
tsSettling time
ε = 0.01% 10
µ
s
B
OM
Maximum output-swing bandwidth AVD = 5, RL = 10 kΩ 420 kHz
AVD = 5, RL = 10 kΩ, CL = 100 pF 70°
φ
m
Phase margin (see Figure 3)
AVD = 5, RL = 600 Ω, CL = 100 pF 84°
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
CC ±
= ±15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
†
TLE2161M
TLE2161AM
TLE2161BM
UNIT
MIN TYP MAX
25°C 0.6 3
TLE2161M
Full range 6
p
25°C 0.5 1.5
VIOInput offset voltage
TLE2161AM
Full range 3.6
mV
25°C 0.3 0.5
TLE2161BM
Full range 1.7
α
VIO
Temperature coefficient of input offset voltage
VIC = 0, RS = 50 Ω
Full range
6 µV/°C
Input offset voltage long-term drift
(see Note 4)
25°C 0.04 µV/mo
p
25°C 2 pA
IIOInput offset current
Full range 20 nA
p
25°C 4 pA
IIBInput bias current
Full range 40 nA
p
25°C
–11
to 13
–12
to 16
V
V
ICR
Common-mode input voltage range
Full range
–11
to 13
V
25°C 13.2 13.7
p
p
p
R
L
=
10 kΩ
Full range 12.5
V
OM +
Maximum positive peak output voltage swing
25°C 12.5 13.2
V
R
L
=
600 Ω
Full range 12
25°C –13.2 –13.7
p
p
R
L
=
10 kΩ
Full range –12.5
V
OM –
Maximum negative peak output voltage swing
25°C –12.5 –13
V
R
L
=
600 Ω
Full range –12
25°C 30 230
V
O
=
±10 V
,
R
L
= 10
kΩ
Full range 20
p
25°C 25 100
AVDLarge-signal differential voltage amplification
V
O
= 0 to 8 V,
R
L
=
600 Ω
Full range 7
V/mV
25°C 3 25
V
O
=
0 to –8 V
,
R
L
=
600 Ω
Full range 1
r
i
Input resistance 25°C 10
12
Ω
c
i
Input capacitance 25°C 4 pF
z
o
Open-loop output impedance IO = 0 25°C 280 Ω
25°C 72 90
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
R
S
= 50
Ω
Full range 65
dB
pp
V
CC±
= ±5 V to ±15 V,
25°C 75 93
k
SVR
Suppl
y-v
oltage rejection ratio (∆V
CC±
/∆VIO)
CC±
RS = 50 Ω
Full range 65
dB
pp
25°C 290 350
ICCSupply current
Full range 375
µ
A
∆I
CC
Supply-current change over operating
temperature range
V
O
= 0,
No load
Full range 46 µA
†
Full range is – 55°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V
CC ±
= ±15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
†
TLE2161M
TLE2161AM
TLE2161BM
UNIT
MIN TYP MAX
p
25°C 7 10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
L
= 10 kΩ,
C
L
=
100 pF
Full range 5
V/µs
Equivalent input noise voltage
RS = 20 Ω, f = 10 Hz
°
70
V
n
qg
(see Figure 2)
RS = 20 Ω,
f = 1 kHz
25°C
40
n
V/√H
z
V
N(PP)
Peak-to-peak equivalent input
noise voltage
f = 0.1 Hz to 10 Hz 25°C 1.1 µV
I
n
Equivalent input noise current f = 1 Hz 25°C 1.1 fA/√Hz
THD Total harmonic distortion
V
O(PP)
= 2 V,
RL = 10 kΩ
A
VD
= 5, f = 10 kHz,
25°C 0.025%
Gain-bandwidth product
f = 100 kHz, RL = 10 kΩ, CL = 100 pF
°
6.4
(see Figure 3)
f = 100 kHz,
RL = 600 Ω, CL = 100 pF
25°C
5.6
MH
z
ε = 0.1%
°
5
tsSettling time
ε = 0.01%
25°C
10
µ
s
B
OM
Maximum output-swing
bandwidth
AVD = 5, RL = 10 kΩ 25°C 116 kHz
AVD = 5, RL = 10 kΩ, CL = 100 pF
°
72°
φ
m
Phase margin (see Figure 3)
AVD = 5, RL = 600 Ω, CL = 100 pF
25°C
78°
†
Full range is – 55°C to 125°C.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
2 kΩ
8 kΩ
(see Note A)
C
L
V
O
V
CC –
V
I
+
–
V
CC +
NOTE A: CL includes fixture capacitance.
Figure 1. Slew-Rate Test Circuit
V
O
R
S
R
S
2 kΩ
V
CC –
V
CC +
+
–
Figure 2. Noise-Voltage Test Circuit
V
O
R
LC
L
(see Note A)
10 kΩ
100 Ω
V
I
V
CC –
V
CC +
+
–
NOTE A: CL includes fixture capacitance.
Figure 3. Gain-Bandwidth Product and Phase-Margin Test Circuit
typical values
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.
Input bias and offset current
At the picoampere bias-current level typical of the TLE2161, TLE2161A, and TLE2161B, accurate
measurement of the bias current becomes difficult. Not only does this measurement require a picoammeter,
but test socket leakages can easily exceed the actual device bias currents. T o accurately measure these small
currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters
with bias voltages applied but with no device in the socket. The device is then inserted into the socket, and a
second test that measures both the socket leakage and the device input bias current is performed. The two
measurements are then subtracted algebraically to determine the bias current of the device.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
IO
Input offset voltage Distribution 4
I
IB
Input bias current
vs Common-mode input voltage
vs Free-air temperature
5
6
I
IO
Input offset current vs Free-air temperature 6
V
ICR
Common-mode input voltage range limits vs Free-air temperature 7
V
OM
Maximum positive peak output voltage vs Output current 8
V
OM
Maximum negative peak output voltage vs Output current 9
V
OM
Maximum peak output voltage vs Supply voltage 10, 11, 12
V
O(PP)
Maximum peak-to-peak output voltage vs Frequency 13, 14, 15
A
VD
Large-signal differential voltage amplification
vs Frequency
vs Free-air temperature
16
17
I
OS
Short-circuit output current vs Elapsed time 18
Large-signal voltage amplification vs Free-air temperature 19
z
o
Output impedance vs Frequency 20
CMRR Common-mode rejection ratio vs Frequency 21
I
CC
Supply current
vs Supply voltage
vs Free-air temperature
22
23
Pulse response
Small signal
Large signal
24, 25
26, 27
Noise voltage (referred to input) 0.1 to 10 Hz 28
V
n
Equivalent input noise voltage vs Frequency 29
THD Total harmonic distortion vs Frequency 30, 31
Gain-bandwidth product
vs Supply voltage
vs Free-air temperature
32
33
φ
m
Phase margin
vs Supply voltage
vs Free-air temperature
34
35
Phase shift vs Frequency 16
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
TLE2161
DISTRIBUTION OF
INPUT OFFSET VOLTAGE
P Package
TA = 25°C
V
CC
±
= ±15 V
736 Amplifiers Tested From 3 Wafer Lots
43210–1–2–3–4
VIO – Input Offset Voltage – mV
Percentage of Amplifiers – %
0
5
10
15
Figure 4
TA = 25°C
VID = 0
VIC – Common-Mode Input Voltage – V
– 20 – 15 –10 – 5 0 5 10 15 20
0
– Input Bias Current – pA
INPUT BIAS CURRENT
vs
COMMON-MODE INPUT VOLTAGE
I
IB
V
CC
±
= ±15 V
30
60
50
40
20
10
Figure 5
INPUT BIAS CURRENT
AND INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
10585654525
10
5
10
4
10
3
10
2
10
1
1
VIC = 0
V
CC
±
= ±15 V
I
IB
– Input Bias and Offset Currents – pA
IB
I and
IO
I
I
IO
Figure 6
125
– Common-Mode Input Voltage – VV
IC
COMMON-MODE
INPUT VOLTAGE RANGE LIMITS
vs
FREE-AIR TEMPERATURE
Negative Limit
Positive Limit
1251007550250–25–50–75
TA – Free-Air Temperature – °C
V
CC +
V
CC +
V
CC –
V
CC –
V
CC –
+2
+3
+4
V
CC +
+1
+2
Figure 7
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 8
– Maximum Positive Peak Output Voltage – VV
OM+
MAXIMUM POSITIVE PEAK
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
TA = 25°C
–60–50–40–30–20–100
IO – Output Current – mA
0
2
4
6
8
10
12
14
16
V
CC
±
= ±5 V
V
CC
±
= ±15 V
Figure 9
– Maximum Negative Peak Output Voltage – VV
OM –
MAXIMUM NEGATIVE PEAK
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
30 35
V
CC
±
= ±15 V
V
CC
±
= ± 5 V
IO – Output Current – mA
0 5 10 15 20 25 40
–16
–14
–12
–10
–8
–6
–4
–2
0
TA = 25°C
– Maximum Peak Output Voltage – VV
OM
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
20181614121086420
| V
CC
±
| – Supply Voltage – V
– 20
– 15
– 10
– 5
0
5
10
15
20
V
OM –
V
OM +
TA = 25°C
RL = 10 kΩ
Figure 10
– Maximum Peak Output Voltage – VV
OM
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
RL = 600Ω
TA = 25°C
V
OM +
V
OM –
20
15
10
5
0
–5
–10
–15
–20
| V
CC
±
| – Supply Voltage – V
0246 8101214161820
Figure 11
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 12
– Maximum Peak Output Voltage – VV
OM
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
V
OM –
V
OM +
TA = 25°C
RL = 100Ω
1086420
|V
CC
±
| – Supply Voltage – V
–6
–4
–2
0
2
4
6
Figure 13
– Maximum Peak-to-Peak Output Voltage – VV
O(PP)
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
FREQUENCY
TA = 25°C
RL = 10 kΩ
V
CC
±
= ±5 V
10
8
6
10 k 100 k 1 M 10 M
f – Frequency – Hz
4
2
0
– Maximum Peak-to-Peak Output Voltage – VV
O(PP)
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
FRQUENCY
15
TA = 25°C
RL = 10 kΩ
V
CC
±
= ±15 V
30
25
20
10 k 100 k 1 M 10 M
f – Frequency – Hz
10
5
0
Figure 14
– Maximum Peak-to-Peak Output Voltage – VV
O(PP)
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
FREQUENCY
10
20
30
0
5
15
f – Frequency – Hz
10 M1 M100 k10 k
25
35
40
V
CC
±
= ±5 V
RL = 10 kΩ
TA = 25°C
Figure 15
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FRQUENCY
TA = 25°C
CL = 100 pF
RL = 10 kΩ
V
CC
±
= ±15 V
Phase Shift
A
VD
60°
80°
10 M1 M100 k10 k1 k1001010.1
f – Frequency – Hz
–20
0
20
40
60
80
100
120
AVD – Large-Signal Differential
A
VD
Voltage Amplification – dB
Figure 16
100°
120°
140°
160°
180°
200°
Phase Shift
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
RL = 10 kΩ
V
CC
±
= ±5 V
V
CC
±
= ±15 V
TA – Free-Air Temperature – °C
1251007550250–25–50–75
350
300
250
200
150
100
50
0
400
AVD – Large-Signal Differential
A
VD
Voltage Amplification – V/mV
Figure 17
– Short-Circuit Output Current – mAI
OS
SHORT-CIRCUIT OUTPUT CURRENT
vs
ELAPSED TIME
VID = 100 mV
VO = 0
TA = 25°C
V
CC
±
= ±15 V
VID = – 100 mV
6050403020100
t – Elapsed Time – s
–80
–60
–40
–20
0
20
40
60
80
Figure 18
LARGE-SIGNAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
VID = –100 mV
VID = 100 mV
VO = 0
V
CC
±
= ±15 V
80
–80
–60
–40
–20
0
20
40
60
– 75 – 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
– Short-Circuit Output Current – mAI
OS
Figure 19
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
Ω
– Output Impedance –z
o
OUTPUT IMPEDANCE
vs
FREQUENCY
AVD =100
AVD = 1
TA = 25°C
V
CC
±
= ±15 V
AVD = 10
f – Frequency – Hz
1 M100 k10 k1 k10010
0.001
0.01
0.1
1
10
100
1000
Figure 20
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
CMRR – Common-Mode Rejection Ratio – dB
10 100 1 k 10 k 100 k 1 M
f – Frequency – Hz
10 M
0
20
40
60
80
100
TA = 25°C
V
CC
±
= ±5 V
Figure 21
– Supply Current – AI
CC
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
No Load
VO = 0
TA = 125°C
TA = 25°C
TA = – 55°C
|V
CC
±
| – Supply Voltage – V
20181614121086420
240
260
280
300
320
340
µ
Figure 22
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
V
CC
±
= ±5 V
V
CC
±
= ±15 V
VO = 0
No Load
TA – Free-Air Temperature – °C
240
260
280
300
320
340
1251007550250–25–50–75
– Supply Current – AI
CC
µ
Figure 23
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
– Output Voltage – mVV
O
SMALL-SIGNAL
PULSE RESPONSE
See Figure 1
t – Time – µs
32
1
0
– 100
–50
0
50
100
TA = 25°C
CL = 100 pF
RL = 10 kΩ
AVD = 5
V
CC
±
= ± 5 V
0.5 1.5 2.5
Figure 24
SMALL-SIGNAL
PULSE RESPONSE
V
CC
±
= ± 15 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
100
50
0
–50
– 100
0
1
23
t – Time – µs
– Output Voltage – mVV
O
0.5 1.5 2.5
AVD = 5
Figure 25
CL = 100 pF
– Output Voltage – VV
O
LARGE-SIGNAL
PULSE RESPONSE
RL = 10 kΩ
V
CC
±
= ± 5 V
AVD = 5
TA = 25°C
See Figure 1
0
5
10 15
t – Time – µs
–2
–1
0
1
2
3
4
Figure 26
LARGE-SIGNAL
PULSE RESPONSE
– Output Voltage – VV
O
See Figure 1
TA = 25°C
CL = 100 pF
RL = 10 kΩ
AVD = 5
V
CC
±
= ±15 V
t – Time – µs
403020100
–15
–10
–5
0
5
10
15
Figure 27
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
NOISE VOLTAGE
(REFERRED TO INPUT)
OVER A 10-SECOND INTERVAL
t – Time – s
109876543210
–1
– 0.5
0
0.5
1
TA = 25°C
f = 0.1 to 10 Hz
V
CC±
= ±15 V
– Noise Voltage – uVV
n
µ
Figure 28
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
– Equivalent Input Noise Voltage – V
n
See Figure 2
TA = 25°C
RS = 20 Ω
V
CC±
= ±5 V
10 k1 k100101
f – Frequency – Hz
0
20
40
60
80
100
nV/ Hz
Figure 29
AVD = 2
V
O(PP)
= 2 V
TA = 25°C
Source Signal
0.2
0.15
100 k10 k1 k10010
t – Frequency – Hz
THD – Total Harmonic Distortion – %
0
0.25
0.1
0.05
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
V
CC
±
= ±5 V
Figure 30
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
V
CC
±
= ± 5 V
Source Signal
TA = 25°C
V
O(PP)
= 2 V
AVD = 10
0.3
0.1
0.5
0.6
0
THD – Total Harmonic Distortion – %
f – Frequency – Hz
10 100 1 k 10 k 100 k
0.2
0.4
Figure 31
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
6.6
6.2
5.8
5.4
161284
7
20
5
0
f = 100 kHz
See Figure 3
TA = 25°C
CL = 100 pF
RL = 10 kΩ
|V
CC
±
| – Supply Voltage – V
Gain-Bandwidth Product – MHz
Figure 32
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
1251007550250–25–50
6.6
6.2
5.8
5.4
7
5
See Figure 3
CL = 100 pF
RL = 10 kΩ
f = 100 kHz
V
CC
±
= ± 5 V
V
CC
±
= ±15 V
TA – Free-Air Temperature – °C
–75
Gain-Bandwidth Product – MHz
Figure 33
PHASE MARGIN
vs
SUPPLY VOLTAGE
AVD = 5
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 3
74°
73°
72°
71°
70°
69°
68°
0
|V
CC
±
| – Supply Voltage – V
2 4 6 8 10 12 14 16 18 20
67°
– Phase Margin
m
m
φ
Figure 34
– Phase Margin
m
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
V
CC
±
= ±5 V
V
CC
±
= ±15 V
See Figure 3
CL = 100 pF
RL = 10 kΩ
AVD = 5
76°
74°
72°
70°
68°
1007550250–25–50
78°
125
TA – Free-Air Temperature – °C
66°
–75
m
φ
Figure 35
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim
Parts
, the model generation software used
with Microsim
PSpice
. The Boyle macromodel (see Note 5) and subcircuit in Figure 36 and Figure 37 were
generated using the TLE2161 typical electrical and operating characteristics at 25
°
C. Using this information,
output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
• Maximum positive output voltage swing
• Maximum negative output voltage swing
• Slew rate
• Quiescent power dissipation
• Input bias current
• Open-loop voltage amplification
• Gain-bandwidth product
• Common-mode rejection ratio
• Phase margin
• DC output resistance
• AC output resistance
• Short-circuit output current limit
4
dlp
ro2
99
V
CC –
IN +
IN –
V
CC+
OUT
8
5
ro1
–
+
vlim
7
vb
9
egnd
fb
92
dln
9190
vlnvlphlim
+
––
–
++
+
+
–
–
6
53
–
vc
+
r2
C2
gagcm
dc
de
54
ve
–+
rd2rd1
C1
rss
3
iss
10
11 12
j2j1
1
2
dp
rp
Figure 36. Boyle Macromodel
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, ”Macromodeling of Integrated Circuit Operational Amplifiers”,
IEEE
Journal
of Solid-State Circuits
, SC-9, 353 (1974).
PSpice
and
Parts
are trademark of MicroSim Corporation.
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information (continued)
.subckt TLE2161 1 2 3 4 5
c1 11 12 125.4E–14
c2 6 7 5.000E–12
dc 5 53 dx
de 54 5d x
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0 4.085E6 –4E6 4E6 4E6 –4E6
ga 6 0 11 12 201.1E–6
gcm 0 6 10 99 3.576E–9
iss 3 10 dc 45.00E–6
hlim 90 0 vlim 1K
j1 11 2 10 jx
j2 12 1 10 jx
r2 6 9 100.0E3
rd1 4 11 4.973E3
rd2 4 12 4.973E3
ro1 8 5 280
ro2 7 99 280
rp 3 4 113.2E3
rss 10 99 4.444E6
vb 9 0 dc 0
vc 3 53 dc 2
ve 54 4 dc 2
vlim 7 8 dc 0
vlp 91 0 dc 50
vln 0 92 dc 50
.model dx D (Is=800.0E–18)
.model jx PJF (Is=1.000E–12 Beta=480E–6 Vto=–1)
.ends
Figure 37. Macromodel Subcircuit
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MA Y 1996
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
input characteristics
The TLE2161, TLE2161A and TLE2161B are specified with a minimum and a maximum input voltage that if
exceeded at either input could cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLE2161,
TLE2161A, and TLE2161B are well suited for low-level signal processing; however, leakage currents on printed
circuit boards and sockets can easily exceed bias-current requirements and cause degradation in system
performance. It is a good practice to include guard rings around inputs (see Figure 38). These guards should
be driven from a low-impedance source at the same voltage level as the common-mode input.
V
I
R2
R1
V
I
R4
+
–
V
O
R3
V
O
+
–
R3
R4
+
R2
R1
Where
Figure 38. Use of Guard Rings
input offset voltage nulling
The TLE2161 series offers external null pins that can further reduce the input offset voltage. The circuit in
Figure 39 can be connected as shown if the feature is desired. When external nulling is not needed, the null
pins may be left disconnected.
+
–
V
CC –
N2
N1
100 kΩ
5 kΩ
IN –
OUT
IN +
Figure 39. Input Offset Voltage Nulling
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