Texas Instruments TLC277MJGB, TLC277MJG, TLC277CPS, TLC277CPSR, TLC277CP Datasheet

...
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Trimmed Offset Voltage:
DD
= 5 V
D
Input Offset Voltage Drift...Typically
0.1 µV/Month, Including the First 30 Days
D
Wide Range of Supply Voltages Over Specified Temperature Range:
0°C to 70°C...3 V to 16 V –40°C to 85°C...4 V to 16 V –55°C to 125°C...4 V to 16 V
D
Single-Supply Operation
D
Common-Mode Input Voltage Range Extends Below the Negative Rail (C-Suffix, I-Suffix types)
D
Low Noise...Typically 25 nV/Hz at f = 1 kHz
D
Output Voltage Range Includes Negative Rail
D
High Input impedance...1012 Typ
D
ESD-Protection Circuitry
D
Small-Outline Package Option Also Available in Tape and Reel
D
Designed-in Latch-Up Immunity
description
The TLC272 and TLC277 precision dual operational amplifiers combine a wide range of input offset voltage grades with low offset voltage drift, high input impedance, low noise, and speeds approaching that of general-purpose BiFET devices.
These devices use T exas instruments silicon-gate LinCMOS technology, which provides offset voltage stability far exceeding the stability available with conventional metal-gate pro­cesses.
The extremely high input impedance, low bias currents, and high slew rates make these cost­effective devices ideal for applications which have previously been reserved for BiFET and NFET products. Four offset voltage grades are available (C-suffix and I-suffix types), ranging from the low-cost TLC272 (10 mV) to the high-precision TLC277 (500 µV). These advantages, in combination with good common-mode rejection and supply voltage rejection, make these devices a good choice for new state-of-the-art designs as well as for upgrading existing designs.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
1 2 3 4
8 7 6 5
1OUT
1IN– 1IN+ GND
V
DD
2OUT 2IN– 2IN+
D, JG, P, OR PW PACKAGE
3 2 1 20 19
910111213
4 5 6 7 8
18 17 16 15 14
NC 2OUT NC 2IN– NC
NC
1IN–
NC
1IN+
NC
FK PACKAGE
(TOP VIEW)
NC
1OUT
NC
2IN +
NC
NC
NC
GND
NC
NC – No internal connection
P Package
TA = 25°C
25
20
15
10
5
4000–400
0
800
30
VIO – Input Offset Voltage – µV
Percentage of Units – %
–800
DISTRIBUTION OF TLC277
INPUT OFFSET VOLTAGE
V
DD
473 Units Tested From 2 Wafer Lots VDD = 5 V
(TOP VIEW)
LinCMOS is a trademark of Texas Instruments Incorporated.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
VIOmax AT 25°C
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TSSOP
(PW)
CHIP
FORM
(Y)
500 µV TLC277CD TLC277CP
°
°
500 µV
2 mV
TLC277CD
TLC272BCD
TLC277CP
TLC272BCP
0°C to 70°c
5 mV TLC272ACD TLC272ACP
10mV TLC272CD TLC272CP TLC272CPW TLC272Y
500 µV TLC277ID TLC277IP
°
°
500 µV
2 mV
TLC277ID
TLC272BID
TLC277IP
TLC272BIP
40°C to 85°C
5 mV TLC272AID TLC272AIP
10 mV TLC272ID TLC272IP
°
°
500 µV TLC277MD TLC277MFK TLC277MJG TLC277MP
55°C to 125°C
µ
10 mV TLC272MD TLC272MFK TLC272MJG TLC272MP
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC277CDR).
description (continued)
In general, many features associated with bipolar technology are available on LinCMOS operational amplifiers without the power penalties of bipolar technology . General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC272 and TLC277. The devices also exhibit low voltage single-supply operation, making them ideally suited for remote and inaccessible battery-powered applications. The common-mode input voltage range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip carrier versions for high-density system applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up. The TLC272 and TLC277 incorporate internal ESD-protection circuits that prevent functional failures at voltages
up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling these devices as exposure to ESD may result in the degradation of the device parametric performance.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
equivalent schematic (each amplifier)
P5 P6
OUT
N7N6
R7
N4
C1
R5
N3
GND
N2
D2R4D1R3
N1
IN+
IN–
P1
R1
P2
R2
N5
R6
P3 P4
V
DD
TLC272Y chip information
This chip, when properly assembled, displays characteristics similar to the TLC272C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
1OUT
1IN+
1IN–
V
DD
(8)
(6)
(3)
(2)
(5)
(1)
+
(7)
2IN+
2IN–
2OUT
(4)
GND
60
73
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
DD
(see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V
ID
(see Note 2) ±V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(any input) –0.3 V to V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, I
I
±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
output current, I
O
(each output) ±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current into V
DD
45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current out of GND 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature, T
A
: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, or PW package 260°C. . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
PACKAGE
TA 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D 725 mW 5.8 mW/°C 464 mW 377 mW N/A FK 1375 mW 11 mW/°C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
P 1000 mW 8.0 mW/°C 640 mW 520 mW N/A
PW 525 mW 4.2 mW/°C 336 mW N/A N/A
recommended operating conditions
C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX
UNIT
Supply voltage, V
DD
3 16 4 16 4 16 V
p
VDD = 5 V –0.2 3.5 –0.2 3.5 0 3.5
Common-mode input voltage, V
IC
VDD = 10 V –0.2 8.5 –0.2 8.5 0 8.5
V
Operating free-air temperature, T
A
0 70 –40 85 –55 125
°C
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
TLC272C, TLC272AC,
TLC272BC, TLC277C
UNIT
A
MIN TYP MAX
V
= 1.4 V, V
= 0,
25°C 1.1 10
TLC272C
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
12
V
= 1.4 V, V
= 0,
25°C 0.9 5
mV
p
TLC272AC
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
6.5
VIOInput offset voltage
V
= 1.4 V, V
= 0,
25°C 230 2000
TLC272BC
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
3000
V
= 1.4 V, V
= 0,
25°C 200 500
µ
V
TLC277C
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
1500
α
VIO
Temperature coefficient of input offset voltage
25°C to
70°C
1.8 µV/°C
p
25°C 0.1
p
IIOInput offset current (see Note 4)
V
O
= 2.5 V,
V
IC
= 2.5
V
70°C 7 300
pA
p
25°C 0.6
p
IIBInput bias current (see Note 4)
V
O
= 2.5 V,
V
IC
= 2.5
V
70°C 40 600
pA
Common-mode input voltage range
25°C
–0.2
to
4
–0.3
to
4.2
V
V
ICR
gg
(see Note 5)
Full range
–0.2
to
3.5
V
25°C 3.2 3.8
V
OH
High-level output voltage VID = 100 mV , RL = 10 k
0°C
3 3.8
V 70°C 3 3.8 25°C 0 50
V
OL
Low-level output voltage VID = –100 mV , IOL = 0
0°C
0 50
mV 70°C 0 50 25°C 5 23
A
VD
Large-signal differential voltage amplification VO = 0.25 V to 2 V, RL = 10 k
0°C 4 27
V/mV 70°C 4 20 25°C 65 80
CMRR Common-mode rejection ratio VIC = V
ICR
min
0°C 60 84
dB 70°C 60 85 25°C 65 95
k
SVR
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
0°C 60 94
dB
(VDD/VIO)
70°C 60 96 25°C 1.4 3.2
I
DD
Supply current (two amplifiers)
V
O
=
2.5 V
,
V
IC
=
5 V
,
0°C
1.6 3.6
mA
No load
70°C 1.2 2.6
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
TLC272C, TLC272AC,
TLC272BC, TLC277C
UNIT
A
MIN TYP MAX
V
= 1.4 V, V
= 0,
25°C 1.1 10
TLC272C
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
12
V
= 1.4 V, V
= 0,
25°C 0.9 5
mV
p
TLC272AC
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
6.5
VIOInput offset voltage
V
= 1.4 V, V
= 0,
25°C 290 2000
TLC272BC
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
3000
V
= 1.4 V, V
= 0,
25°C 250 800
µ
V
TLC277C
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
1900
α
VIO
Temperature coefficient of input offset voltage
25°C to
70°C
2 µV/°C
p
25°C 0.1
p
IIOInput offset current (see Note 4)
V
O
= 5 V,
V
IC
= 5
V
70°C 7 300
pA
p
25°C 0.7
p
IIBInput bias current (see Note 4)
V
O
= 5 V,
V
IC
= 5
V
70°C 50 600
pA
Common-mode input voltage range
25°C
–0.2
to
9
–0.3
to
9.2
V
V
ICR
gg
(see Note 5)
Full range
–0.2
to
8.5
V
25°C 8 8.5
V
OH
High-level output voltage VID = 100 mV , RL = 10 k
0°C
7.8 8.5
V 70°C 7.8 8.4 25°C 0 50
V
OL
Low-level output voltage VID = –100 mV , IOL = 0
0°C
0 50
mV 70°C 0 50 25°C 10 36
A
VD
Large-signal differential voltage amplification VO = 1 V to 6 V, RL = 10 k
0°C 7.5 42
V/mV 70°C 7.5 32 25°C 65 85
CMRR Common-mode rejection ratio VIC = V
ICR
min
0°C 60 88
dB 70°C 60 88 25°C 65 95
k
SVR
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
0°C 60 94
dB
(VDD/VIO)
70°C 60 96 25°C 1.9 4
I
DD
Supply current (two amplifiers)
V
O
=
2.5 V
,
V
IC
=
5 V
,
0°C
2.3 4.4
mA
No load
70°C 1.6 3.4
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
5. This range also applies to each input individually.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
TLC272I, TLC272AI,
TLC272BI, TLC277I
UNIT
A
MIN TYP MAX
V
= 1.4 V, V
= 0,
25°C 1.1 10
TLC272I
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
13
V
= 1.4 V, V
= 0,
25°C 0.9 5
mV
p
TLC272AI
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
7
VIOInput offset voltage
V
= 1.4 V, V
= 0,
25°C 230 2000
TLC272BI
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
3500
V
= 1.4 V, V
= 0,
25°C 200 500
µ
V
TLC277I
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
2000
α
VIO
Temperature coefficient of input offset voltage
25°C to
85°C
1.8 µV/°C
p
25°C 0.1
p
IIOInput offset current (see Note 4)
V
O
= 2.5 V,
V
IC
= 2.5
V
85°C 24 15
pA
p
25°C 0.6
p
IIBInput bias current (see Note 4)
V
O
= 2.5 V,
V
IC
= 2.5
V
85°C 200 35
pA
Common-mode input voltage range
25°C
–0.2
to
4
–0.3
to
4.2
V
V
ICR
gg
(see Note 5)
Full range
–0.2
to
3.5
V
25°C 3.2 3.8
V
OH
High-level output voltage VID = 100 mV , RL = 10 k
–40°C
3 3.8
V 85°C 3 3.8 25°C 0 50
V
OL
Low-level output voltage VID = –100 mV , IOL = 0
–40°C
0 50
mV 85°C 0 50 25°C 5 23
A
VD
Large-signal differential voltage amplification
VO = 1 V to 6 V,
RL = 10 k
–40°C
3.5 32
V/mV 85°C 3.5 19 25°C 65 80
CMRR Common-mode rejection ratio VIC = V
ICR
min
–40°C 60 81
dB 85°C 60 86 25°C 65 95
k
SVR
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
–40°C
60 92
dB
(VDD/VIO)
85°C 60 96 25°C 1.4 3.2
I
DD
Supply current (two amplifiers)
V
O
= 5 V,
V
IC
= 5 V,
–40°C
1.9 4.4
mA
No load
85°C 1.1 2.4
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
5. This range also applies to each input individually.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
DD
= 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
TLC272I, TLC272AI,
TLC272BI, TLC277I
UNIT
A
MIN TYP MAX
V
= 1.4 V, V
= 0,
25°C 1.1 10
TLC272I
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
13
V
= 1.4 V, V
= 0,
25°C 0.9 5
mV
p
TLC272AI
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
7
VIOInput offset voltage
V
= 1.4 V, V
= 0,
25°C 290 2000
TLC272BI
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
3500
V
= 1.4 V, V
= 0,
25°C 250 800
µ
V
TLC277I
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
2900
α
VIO
Temperature coefficient of input offset voltage
25°C to
85°C
2 µV/°C
p
25°C 0.1
p
IIOInput offset current (see Note 4)
V
O
= 5 V,
V
IC
= 5
V
85°C 26 1000
pA
p
25°C 0.7
p
IIBInput bias current (see Note 4)
V
O
= 5 V,
V
IC
= 5
V
85°C 220 2000
pA
Common-mode input voltage range
25°C
–0.2
to
9
–0.3
to
9.2
V
V
ICR
gg
(see Note 5)
Full range
–0.2
to
8.5
V
25°C 8 8.5
V
OH
High-level output voltage VID = 100 mV , RL = 10 k
–40°C
7.8 8.5
V 85°C 7.8 8.5 25°C 0 50
V
OL
Low-level output voltage VID = –100 mV , IOL = 0
–40°C
0 50
mV 85°C 0 50 25°C 10 36
A
VD
Large-signal differential voltage amplification VO = 1 V to 6 V, RL = 10 k
–40°C
7 46
V/mV 85°C 7 31 25°C 65 85
CMRR Common-mode rejection ratio VIC = V
ICR
min
–40°C 60 87
dB 85°C 60 88 25°C 65 95
k
SVR
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
–40°C
60 92
dB
(VDD/VIO)
85°C 60 96 25°C 1.4 4
I
DD
Supply current (two amplifiers)
V
O
= 5 V,
V
IC
= 5 V,
–40°C
2.8 5
mA
No load
85°C 1.5 3.2
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
5. This range also applies to each input individually.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
TLC272M, TLC277M
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
V
= 1.4 V, V
= 0,
25°C 1.1 10
p
TLC272M
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
12
mV
VIOInput offset voltage
V
= 1.4 V, V
= 0,
25°C 200 500
TLC277M
O
,
RS = 50 ,
IC
,
RL = 10 k
Full range
3750
µ
V
α
VIO
Temperature coefficient of input offset voltage
25°C to
125°C
2.1 µV/°C
p
25°C 0.1 pA
IIOInput offset current (see Note 4)
V
O
=
2.5 V
V
IC
=
2.5 V
125°C 1.4 15 nA
p
25°C 0.6 pA
IIBInput bias current (see Note 4)
V
O
=
2.5 V
V
IC
=
2.5 V
125°C 9 35 nA
Common-mode input voltage range
25°C
0
to
4
–0.3
to
4.2
V
V
ICR
gg
(see Note 5)
Full range
0
to
3.5
V
25°C 3.2 3.8
V
OH
High-level output voltage VID = 100 mV , RL = 10 k
–55°C
3 3.8
V
125°C 3 3.8
25°C 0 50
V
OL
Low-level output voltage VID = –100 mV, IOL = 0
–55°C
0 50
mV
125°C 0 50
25°C 5 23
A
VD
Large-signal differential voltage amplification VO = 0.25 V to 2 V RL = 10 k
–55°C
3.5 35
V/mV
125°C 3.5 16
25°C 65 80
CMRR Common-mode rejection ratio VIC = V
ICR
min
–55°C 60 81
dB
125°C 60 84
25°C 65 95
k
SVR
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
–55°C
60 90
dB
(VDD/VIO)
125°C 60 97
25°C 1.4 3.2
I
DD
Supply current (two amplifiers)
V
O
=
2.5 V
,
V
IC
=
2.5 V
,
–55°C
2 5
mA
No load
125°C 1 2.2
Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
5. This range also applies to each input individually.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
TLC272M, TLC277M
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
VO = 1.4 V, VIC = 0, 25°C 1.1 10
p
TLC272M
RS = 50 , RL = 10 k Full range 12
mV
VIOInput offset voltage
VO = 1.4 V, VIC = 0, 25°C 250 800
TLC277M
RS = 50 , RL = 10 k Full range 4300
µ
V
α
VIO
Temperature coefficient of input offset voltage
25°C to
125°C
2.2 µV/°C
p
25°C 0.1 pA
IIOInput offset current (see Note 4)
V
O
=
5 V
,
V
IC
=
5 V
125°C 1.8 15 nA
p
25°C 0.7 pA
IIBInput bias current (see Note 4)
V
O
=
5 V
,
V
IC
=
5 V
125°C 10 35 nA
Common-mode input voltage range
25°C
0
to
9
–0.3
to
9.2
V
V
ICR
gg
(see Note 5)
Full range
0
to
8.5
V
25°C 8 8.5
V
OH
High-level output voltage VID = 100 mV , RL = 10 k
–55°C
7.8 8.5
V
125°C 7.8 8.4
25°C 0 50
V
OL
Low-level output voltage VID = –100 mV, IOL = 0
–55°C 0 50
mV
125°C 0 50
25°C 10 36
A
VD
Large-signal differential voltage
p
VO = 1 V to 6 V, RL = 10 k
–55°C
7 50
V/mV
am lification
125°C 7 27
25°C 65 85
CMRR Common-mode rejection ratio VIC = V
ICR
min
–55°C 60 87
dB
125°C 60 86
25°C 65 95
k
SVR
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
–55°C
60 90
dB
(VDD/VIO)
125°C 60 97
25°C 1.9 4
I
DD
Supply current (two amplifiers)
V
O
= 5 V,
V
IC
= 5 V,
–55°C
3 6
mA
No load
125°C 1.3 2.8
Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
5. This range also applies to each input individually.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)
TLC272Y
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
p
V
= 1.4 V, V
= 0,
VIOInput offset voltage
O
,
RS = 50 ,
IC
,
RL = 10 k
1.110mV
α
VIO
Temperature coefficient of input offset voltage 1.8 µV/°C
I
IO
Input offset current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.1 pA
I
IB
Input bias current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.6 pA
V
ICR
Common-mode input voltage range (see Note 5)
–0.2
to
4
–0.3
to
4.2
V
V
OH
High-level output voltage VID = 100 mV , RL = 10 k 3.2 3.8 V
V
OL
Low-level output voltage VID = –100 mV , IOL = 0 0 50 mV
A
VD
Large-signal differential voltage amplification VO = 0.25 V to 2 V RL = 10 k 5 23 V/mV
CMRR Common-mode rejection ratio VIC = V
ICR
min 65 80 dB
k
SVR
Supply-voltage rejection ratio (VDD/VIO) VDD = 5 V to 10 V, VO = 1.4 V 65 95 dB
I
DD
Supply current (two amplifiers)
VO = 2.5 V, No load
VIC = 2.5 V,
1.4 3.2 mA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
5. This range also applies to each input individually.
electrical characteristics, VDD = 10 V, TA = 25°C (unless otherwise noted)
TLC272Y
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
p
V
= 1.4 V, V
= 0,
VIOInput offset voltage
O
,
RS = 50 ,
IC
,
RL = 10 k
1.110mV
α
VIO
Temperature coefficient of input offset voltage 1.8 µV/°C
I
IO
Input offset current (see Note 4) VO = 5 V, VIC = 5 V 0.1 pA
I
IB
Input bias current (see Note 4) VO = 5 V, VIC = 5 V 0.7 pA
V
ICR
Common-mode input voltage range (see Note 5)
–0.2
to
9
–0.3
to
9.2
V
V
OH
High-level output voltage VID = 100 mV , RL = 10 k 8 8.5 V
V
OL
Low-level output voltage VID = –100 mV , IOL = 0 0 50 mV
A
VD
Large-signal differential voltage amplification VO = 1 V to 6 V, RL = 10 k 10 36 V/mV
CMRR Common-mode rejection ratio VIC = V
ICR
min 65 85 dB
k
SVR
Supply-voltage rejection ratio (VDD/VIO) VDD = 5 V to 10 V, VO = 1.4 V 65 95 dB
I
DD
Supply current (two amplifiers)
VO = 5 V, No load
VIC = 5 V,
1.9 4 mA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
5. This range also applies to each input individually.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V
DD
= 5 V
PARAMETER TEST CONDITIONS T
TLC272C, TLC272AC,
TLC272BC, TLC277C
UNIT
A
MIN TYP MAX
25°C 3.6
V
IPP
= 1 V
0°C 4
RL = 10 k,
p
70°C 3
SR
Slew rate at unity gain
C
L
= 20 pF,
See Fi
g
ure 1
25°C 2.9
V/µs
See Figure 1
V
IPP
= 2.5 V
0°C 3.1
70°C 2.5
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 2
RS = 20 ,
25°C 25
nV/Hz
25°C 320
B
OM
Maximum output-swing bandwidth
VO = VOH,
CL = 20 pF,
0°C 340
kHz
R
L
= 10 k,
See Figure 1
70°C 260 25°C 1.7
B
1
Unity-gain bandwidth
VI = 10 mV,
CL = 20 pF,
0°C
2
MHz
See Figure 3
70°C 1.3 25°C 46°
φ
m
Phase margin
V
I
=
10 mV
,
=
p
f
=
B
1
,
0°C 47°
C
L
= 20 F,
See Figure 3
70°C 43°
operating characteristics at specified free-air temperature, VDD = 10 V
PARAMETER TEST CONDITIONS T
TLC272C, TLC272AC,
TLC272BC, TLC277C
UNIT
A
MIN TYP MAX
25°C 5.3
V
IPP
= 1 V
0°C 5.9
RL = 10 k,
p
70°C 4.3
SR
Slew rate at unity gain
C
L
= 20 pF,
See Fi
g
ure 1
25°C 4.6
V/µs
See Figure 1
V
IPP
= 5.5 V
0°C 5.1
70°C 3.8
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 2
RS = 20 ,
25°C 25
nV/Hz
25°C 200
B
OM
Maximum output-swing bandwidth
VO = VOH,
CL = 20 pF,
0°C 220
kHz
R
L
= 10 k,
See Figure 1
70°C 140 25°C 2.2
B
1
Unity-gain bandwidth
VI = 10 mV,
CL = 20 pF,
0°C
2.5
MHz
See Figure 3
70°C 1.8 25°C 49°
φ
m
Phase margin
V
I
= 10 mV,
p
f
=
B
1
,
0°C 50°
C
L
= 20 F,
See Figure 3
70°C 46°
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS T
TLC272I, TLC272AI,
TLC272BI, TLC277I
UNIT
A
MIN TYP MAX
25°C 3.6
V
IPP
= 1 V
–40°C 4.5
RL = 10 k,
p
85°C 2.8
SR
Slew rate at unity gain
C
L
= 20 pF,
See Fi
g
ure 1
25°C 2.9
V/µs
See Figure 1
V
IPP
= 2.5 V
–40°C 3.5
85°C 2.3
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 2
RS = 20 ,
25°C 25
nV/Hz
25°C 320
B
OM
Maximum output-swing bandwidth
VO = VOH,
CL = 20 pF,
–40°C 380
kHz
R
L
= 10 k,
See Figure 1
85°C 250 25°C 1.7
B
1
Unity-gain bandwidth
VI = 10 mV,
CL = 20 pF,
–40°C
2.6
MHz
See Figure 3
85°C 1.2 25°C 46°
φ
m
Phase margin
V
I
= 10 mV,
=
p
f
=
B
1
,
–40°C 49°
C
L
= 20 F,
See Figure 3
85°C 43°
operating characteristics at specified free-air temperature, VDD = 10 V
PARAMETER TEST CONDITIONS T
TLC272I, TLC272AI,
TLC272BI, TLC277I
UNIT
A
MIN TYP MAX
25°C 5.3
V
IPP
= 1 V
–40°C 6.8
RL = 10 k,
p
85°C 4
SR
Slew rate at unity gain
C
L
= 20 pF,
See Fi
g
ure 1
25°C 4.6
V/µs
See Figure 1
V
IPP
= 5.5 V
–40°C 5.8
85°C 3.5
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 2
RS = 20 ,
25°C 25
nV/Hz
25°C 200
B
OM
Maximum output-swing bandwidth
VO = VOH,
CL = 20 pF,
–40°C 260
kHz
R
L
= 10 k,
See Figure 1
85°C 130 25°C 2.2
B
1
Unity-gain bandwidth
VI = 10 mV,
CL = 20 pF,
–40°C
3.1
MHz
See Figure 3
85°C 1.7 25°C 49°
φ
m
Phase margin
V
I
= 10 mV,
p
f
=
B
1
,
–40°C 52°
C
L
= 20 F,
See Figure 3
85°C 46°
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
14
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V
DD
= 5 V
TLC272M, TLC277M
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
25°C 3.6
V
IPP
= 1 V
–55°C 4.7
RL = 10 k,
p
125°C 2.3
SR
Slew rate at unity gain
C
L
= 20 pF,
See Fi
g
ure 1
25°C 2.9
V/µs
See Figure 1
V
IPP
= 2.5 V
–55°C 3.7
125°C 2
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 2
RS = 20 ,
25°C 25
nV/Hz
25°C 320
B
OM
Maximum output-swing bandwidth
VO = VOH,
CL = 20 pF,
–55°C 400
kHz
R
L
= 10 k,
See Figure 1
125°C 230
25°C 1.7
B
1
Unity-gain bandwidth
VI = 10 mV,
CL = 20 pF,
–55°C
2.9
MHz
See Figure 3
125°C 1.1
25°C 46°
φ
m
Phase margin
V
I
= 10 mV,
p
f
=
B
1
,
–55°C 49°
C
L
= 20 F,
See Figure 3
125°C 41°
operating characteristics at specified free-air temperature, VDD = 10 V
TLC272M, TLC277M
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
25°C 5.3
V
IPP
= 1 V
–55°C 7.1
RL = 10 k,
p
125°C 3.1
SR
Slew rate at unity gain
C
L
= 20 pF,
See Fi
g
ure 1
25°C 4.6
V/µs
See Figure 1
V
IPP
= 5.5 V
–55°C 6.1
125°C 2.7
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 2
RS = 20 ,
25°C 25 nV/Hz 25°C 200
B
OM
Maximum output-swing bandwidth
VO = VOH,
CL = 20 pF,
–55°C 280
kHz
R
L
= 10 k,
See Figure 1
125°C 110
25°C 2.2
B
1
Unity-gain bandwidth
VI = 10 mV,
CL = 20 pF,
–55°C
3.4
MHz
See Figure 3
125°C 1.6
25°C 49°
φ
m
Phase margin
V
I
=
10 mV
,
p
f
=
B
1
,
–55°C 52°
C
L
= 20 F,
See Figure 3
125°C 44°
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics, V
DD
= 5 V, T
A
= 25°C
TLC272Y
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
R
= 10 k, C
= 20 pF,
V
IPP
= 1 V 3.6
SR
Slew rate at unity gain
L
,
See Figure 1
L
,
V
IPP
= 2.5 V 2.9
V/µs
V
n
Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 25
nV/Hz
B
OM
Maximum output-swing bandwidth
VO = VOH, See Figure 1
CL = 20 pF, RL = 10 k,
320 kHz
B
1
Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 3 1.7 MHz
φ
m
Phase margin
VI = 10 mV, See Figure 3
f = B1, CL = 20 pF,
46°
operating characteristics, VDD = 10 V, T
A
= 25°C
TLC272Y
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
R
= 10 k, C
= 20 pF,
V
IPP
= 1 V 5.3
SR
Slew rate at unity gain
L
,
See Figure 1
L
,
V
IPP
= 5.5 V 4.6
V/µs
V
n
Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 25
nV/Hz
B
OM
Maximum output-swing bandwidth
VO = VOH, See Figure 1
CL = 20 pF, RL = 10 k,
200 kHz
B
1
Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 3 2.2 MHz
φ
m
Phase margin
VI = 10 mV, See Figure 3
f = B1, CL = 20 pF,
49°
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
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16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC272 and TLC277 are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives the same result.
V
DD–
V
DD+
+
C
L
R
L
V
O
V
I
V
I
V
O
R
L
C
L
V
DD
+
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 1. Unity-Gain Amplifier
V
O
2 k
20 20
V
DD–
20
2 k
V
O
20
1/2 V
DD
+
V
DD+
+
V
DD
(b) SPLIT SUPPL Y
(a) SINGLE SUPPLY
Figure 2. Noise-Test Circuit
V
DD–
V
DD+
+
10 k
V
O
100
C
L
V
I
V
I
1/2 V
DD
C
L
100
V
O
10 k
+
V
DD
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 3. Gain-of-100 Inverting Amplifier
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLC272 and TLC277 operational amplifiers, attempts to measure the input bias current can result in erroneous readings. The bias current at normal room ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using a picoammeter) with no device in the test socket. The actual input bias current can then be calculated by subtracting the open-socket leakage readings from the readings obtained with a device in the test socket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage drop across the series resistor is measured and the bias current is calculated). This method requires that a device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not feasible using this method.
85
14
V = V
IC
Figure 4. Isolation Metal Around Device Inputs
(JG and P packages)
low-level output voltage
T o obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise results in the device low-level output being dependent on both the common-mode input voltage level as well as the differential input voltage level. When attempting to correlate low-level output readings with those quoted in the electrical specifications, these two conditions should be observed. If conditions other than these are to be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This parameter is actually a calculation using input offset voltage measurements obtained at two different temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these measurements be performed at temperatures above freezing to minimize error.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until the maximum frequency is found above which the output contains significant distortion. The full-peak response is defined as the maximum output frequency , without regard to distortion, above which full peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained (Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum peak-to-peak output is reached.
(d) f > B
OM
(c) f = B
OM
(b) BOM > f > 1 kHz(a) f = 1 kHz
Figure 5. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume, short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more pronounced with reduced supply levels and lower temperatures.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
IO
Input offset voltage Distribution 6, 7
α
VIO
Temperature coefficient of input offset voltage Distribution 8, 9
vs High-level output current 10, 11
V
OH
High-level output voltage
vs High level out ut current
vs Supply voltage
10, 11
12
OH
gg
yg
vs Free-air temperature 13
-
p
p
vs Common mode in ut voltage
vs Differential input voltage
14, 15
16
VOLLow-level output voltage
g
vs Free-air temperature 17 vs Low-level output current 18, 19
vs Supply voltage 20
A
VD
Large-signal differential voltage amplification
vs Su ly voltage
vs Free-air temperature
20
21
VD
gg g
vs Frequency 32, 33
I
IB
Input bias current vs Free-air temperature 22
I
IO
Input offset current vs Free-air temperature 22
V
IC
Common-mode input voltage vs Supply voltage 23
pp
vs Supply voltage 24
IDDSupply current
yg
vs Free-air temperature 25 vs Supply voltage 26
SR
Slew rate
yg
vs Free-air temperature 27
Normalized slew rate vs Free-air temperature 28
V
O(PP)
Maximum peak-to-peak output voltage vs Frequency 29
vs Free-air temperature 30
B1Unity-gain bandwidth
vs Supply voltage 31 vs Supply voltage 34
φ
m
Phase margin
vs Su ly voltage
vs Free-air temperature
34
35
φ
m
g
vs Load capacitance 36
V
n
Equivalent input noise voltage vs Frequency 37 Phase shift vs Frequency 32, 33
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS
Figure 6
–5
0
Percentage of Units – %
VIO – Input Offset Voltage – mV
5
60
–4 –3 –2 –1 0 1 2 34
10
20
30
40
50
753 Amplifiers Tested From 6 Wafer Lots VDD = 5 V
TA = 25°C P Package
DISTRIBUTION OF TLC272
INPUT OFFSET VOLTAGE
Figure 7
50
40
30
20
10
43210–1–2–3–4
60
5
VIO – Input Offset Voltage – mV
Percentage of Units – %
0
–5
DISTRIBUTION OF TLC272
INPUT OFFSET VOLTAGE
753 Amplifiers Tested From 6 Wafer Lots VDD = 10 V
TA = 25°C P Package
Figure 8
324 Amplifiers Tested From 8 Wafer Lots VDD = 5 V TA = 25°C to 125°C P Package Outliers: (1) 20.5 µV/°C
50
40
30
20
10
864
20–2–4–6–8
60
10
Percentage of Units – %
0 –10
αVIO – Temperature Coefficient – µV/°C
DISTRIBUTION OF TLC272 AND TLC277
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
Figure 9
324 Amplifiers Tested From 8 Wafer Lots VDD = 5 V TA = 25°C to 125°C P Package Outliers: (1) 21.2 µV/°C
–10
0
Percentage of Units – %
10
60
–8 –6 –4 –2 0 2 4 6 8
10
20
30
40
50
αVIO – Temperature Coefficient – µV/°C
DISTRIBUTION OF TLC272 AND TLC277
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
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TYPICAL CHARACTERISTICS
Figure 10
VDD = 3 V
VDD = 4 V
VDD = 5 V
VID = 100 mV TA = 25°C See Note A
4
3
2
1
–8–6–4–2
5
–10
IOH – High-Level Output Current – mA
VOH – High-Level Output Voltage – V
0
0
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
V
OH
NOTE A: The 3-V curve only applies to the C version.
Figure 11
TA = 25°C
VID = 100 mV
VDD = 10 V
VDD = 16 V
14
12
10
8
6
4
2
–30–20–10
16
–40
IOH – High-Level Output Current – mA
VOH – High-Level Output Voltage – V
0
0
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
V
OH
–5 –15 –20 –25 –35
Figure 12
TA = 25°C
RL = 10 k
VID = 100 mV
0
16
2
4
6
8
10
12
14
1412108642 16
VDD – Supply Voltage – V
0
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
VOH – High-Level Output Voltage – V
V
OH
Figure 13
VDD = 10 V
VDD = 5 V
VID = 100 mA
IOH = –5 mA
–75
TA – Free-Air Temperature – °C
125
VDD –1.6
–50 –25 0 20 50 75 100
VDD –1.8
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VDD –1.7
VDD –1.9
VDD –2.1
VDD –2
VDD –2.3
VDD –2.2
VDD –2.4
VOH – High-Level Output Voltage – V
V
OH
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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TYPICAL CHARACTERISTICS
Figure 14
VID = –1 V
VID = –100 mV
VDD = 5 V IOL = 5 mA
TA = 25°C
600
500
400
321
700
4
VIC – Common-Mode Input Voltage – V
VOL – Low-Level Output V oltage – mV
300
0
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
V
OL
0.5 1.5 2.5 3.5
650
550
450
350
Figure 15
VID = –100 mV
VID = –2.5 V
VID = –1 V
TA = 25°C
IOL = 5 mA
VDD = 10 V
108642
500
450
400
350
300
VIC – Common-Mode Input Voltage – V
0
250
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VOL – Low-Level Output V oltage – mV
V
OL
13579
Figure 16
VDD = 10 V
VDD = 5 V
TA = 25°C
VIC = |V
ID/
2|
IOL = 5 mA
0
100
200
300
400
500
600
700
800
–8–6–4–2 –10
VID – Differential Input Voltage – V
0
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
–1 –3 –5 –7 –9
VOL – Low-Level Output V oltage – mV
V
OL
Figure 17
VDD = 10 V
VDD = 5 V
IOL = 5 mA VID = –1 V VIC = 0.5 V
800
700
600
500
400
300
200
100
1007550250–25–50
900
125
TA – Free-Air Temperature – °C
0
–75
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VOL – Low-Level Output V oltage – mV
V
OL
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
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TYPICAL CHARACTERISTICS
Figure 18
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VDD = 5 V
VDD = 4 V
VDD = 3 V
TA = 25°C See Note A
VIC = 0.5 V
VID = –1 V
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
7654321
0
8
1.0
IOL – Low-Level Output Current – mA
VOL – Low-Level Output Voltage – V
0
V
OL
NOTE A: The 3-V curve only applies to the C version.
Figure 19
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VDD = 16 V
VDD = 10 V
VID = –1 V VIC = 0.5 V TA = 25°C
2.5
2.0
1.5
1.0
0.5
252015105
0
30
3.0
IOL – Low-Level Output Current – mA
VOL – Low-Level Output Voltage – V
0
V
OL
Figure 20
0
60
16
0
2 4 6 8 10 12 14
10
20
30
40
50
VDD – Supply Voltage – V
TA = –55°C
RL = 10 k
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
TA = 25°C TA = 85°C TA = 125°C
TA = 0°C
AVD – Large-Signal Differential
A
VD
Voltage Amplification – V/mV
Figure 21
–75
50
125
0
–50 –25 0 25 50 75 100
5
10
15
20
25
30
35
40
45
VDD = 5 V
VDD = 10 V
RL = 10 k
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
AVD – Large-Signal Differential
A
VD
Voltage Amplification – V/mV
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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TYPICAL CHARACTERISTICS
Figure 22
INPUT BIAS CURRENT AND INPUT OFFSET CURREN
T
vs
FREE-AIR TEMPERATURE
0.1 125
10000
45 65 85 105
1
10
100
1000
25
– Input Bias and Offset Currents – pA
VDD = 10 V VIC = 5 V See Note A
I
IB
I
IB
I
IO
and
TA – Free-Air Temperature – °C
I
IO
35 55 75 95 115
NOTE A: The typical values of input bias current and input offset current below 5 pA were determined mathematically .
Figure 23
COMMON-MODE
INPUT VOLTAGE POSITIVE LIMIT
vs
SUPPLY VOLTAGE
0
VDD – Supply Voltage – V
16
16
0
2 4 6 8 10 12 14
2
4
6
8
10
12
14
TA = 25°C
IC
V – Common-Mode Input Voltage – V
Figure 24
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
0
VDD – Supply Voltage – V
5
16
0
2 4 6 8 10 12 14
1
2
3
4
VO = VDD/2 No Load
TA = –55°C
– Supply Current – mAI
DD
0.5
1.5
2.5
3.5
4.5
TA = 70°C
TA = 125°C
TA = 0°C
TA = 25°C
Figure 25
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
–75
– Supply Current – mA
2
125
0
0.5
1
1.5
–50 –25
0 25 50 75 100
No Load
VO = VDD/2
VDD = 10 V
VDD = 5 V
2.5
3
3.5
4
I
DD
TA – Free-Air Temperature – °C
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
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TYPICAL CHARACTERISTICS
Figure 26
AV = 1 V
IPP
= 1 V RL = 10 k CL = 20 pF TA = 25°C See Figure 1
8
7
6
5
4
3
2
1
1412108642
0
16
VDD – Supply Voltage – V
0
SLEW RATE
vs
SUPPLY VOLTAGE
µsSR – Slew Rate – V/
Figure 27
V
IPP
= 1 V
VDD = 10 V
V
IPP
= 2.5 V
VDD = 5 V
V
IPP
= 1 V
VDD = 5 V
VDD = 10 V V
IPP
= 5.5 V
–75
0
1
2
3
4
5
6
7
8
1007550250–25–50 125
TA – Free-Air Temperature – °C
SLEW RATE
vs
FREE-AIR TEMPERATURE
AV = 1 RL = 10 k CL = 20 pF See Figure 1
µsSR – Slew Rate – V/
Figure 28
VDD = 5 V
VDD = 10 V
1.5
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
CL = 20 pF
RL = 10 k
V
IPP
= 1 V
AV = 1
1007550250–25–50 125
TA – Free-Air Temperature – °C
Normalized Slew Rate
–75
NORMALIZED SLEW RATE
vs
FREE-AIR TEMPERATURE
Figure 29
TA = –55°C
TA = 25°C
TA = 125°C
RL = 10 k See Figure 1
VDD = 5 V
VDD = 10 V
1000100
9
8
7
6
5
4
3
2
1
0
10000
10
f – Frequency – kHz
10
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
– Maximum Peak-to-Peak Output Voltage – V
V
O(PP)
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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TYPICAL CHARACTERISTICS
Figure 30
2.5
2.0
1.5
1007550250–25–50
1.0
3.0
TA – Free-Air Temperature – °C
–75
See Figure 3
CL = 20 pF
VI = 10 mV
VDD = 5 V
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
– Unity-Gain Bandwidth – MHz
B
1
125
Figure 31
2.0
1.5
1412108642
1.0 16
2.5
VDD – Supply Voltage – V
0
VI = 10 mV CL = 20 pF TA = 25°C
See Figure 3
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
– Unity-Gain Bandwidth – MHz
B
1
Phase Shift
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
Phase Shift
A
VD
VDD = 5 V RL = 10 k TA = 25°C
180°
0°
30°
60°
90°
120°
150°
10
6
10
5
10
4
10
3
10
2
10
1
1
1 M100 k10 k1 k100
0.1 10 M
f – Frequency – Hz
10
10
7
AVD – Large-Signal Differential
Á
A
VD
Voltage Amplification
Figure 32
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
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TYPICAL CHARACTERISTICS
Phase Shift
A
VD
TA = 25°C
RL = 10 k
VDD = 10 V
Phase Shift
150°
120°
90°
60°
30°
0°
180°
10
6
10
5
10
4
10
3
10
2
10
1
1
1 M100 k10 k1 k100
0.1 10 M
f – Frequency – Hz
10
10
7
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
AVD – Large-Signal Differential
A
VD
Voltage Amplification
Figure 33
Figure 34
45°
See Figure 3
VI = 10 mV
TA = 25°C
CL = 20 pF
51°
49°
47°
1412108642 16
53°
VDD – Supply Voltage – V
m – Phase Margin
0
PHASE MARGIN
vs
SUPPLY VOLTAGE
m
φ
48°
46°
52°
50°
Figure 35
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
See Figure 3
VI = 10 mV CL = 20 pF
VDD = 5 V
48°
46°
44°
42°
1007550250–25–50
40°
125
50°
–75
m – Phase Margin
m
φ
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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TYPICAL CHARACTERISTICS
Figure 36
VDD = 5 V
TA = 25°C
VI = 10 mV
See Figure 3
45°
40°
35°
30°
80604020
25°
100
50°
CL – Capacitive Load – pF
0
PHASE MARGIN
vs
CAPACITIVE LOAD
m – Phase Margin
m
φ
10 30 50 70 90
Figure 37
VN – Equivalent Input Noise Voltage –
See Figure 2
RS = 20 TA = 25°C
VDD = 5 V
10010
300
200
100
0
1000
400
f – Frequency – Hz
1
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
nV/ Hz
V
n
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
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APPLICATION INFORMATION
single-supply operation
While the TLC272 and TLC277 perform well using dual power supplies (also called balanced or split supplies), the design is optimized for single-supply operation. This design includes an input common-mode voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38). The low input bias current of the TLC272 and TLC277 permits the use of very large resistive values to implement the voltage divider, thus minimizing power consumption.
The TLC272 and TLC277 work well in conjunction with digital logic; however, when powering both linear devices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive decoupling is often adequate; however, high-frequency applications may require RC decoupling.
– +
C
0.01 µF
R3
V
REF
V
I
R1
R2
V
DD
V
O
R4
V
REF
+
V
DD
R3
R1)R3
VO+
(V
REF
*
VI)
R4 R2
)
V
REF
Figure 38. Inverting Amplifier With Voltage Reference
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
(a) COMMON SUPPLY RAILS
– +
– +
Logic Logic Logic
Power Supply
Supply
Power
LogicLogicLogic
OUT
OUT
Figure 39. Common vs Separate Supply Rails
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APPLICATION INFORMATION
input characteristics
The TLC272 and TLC277 are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit is specified at V
DD
– 1 V at TA = 25°C and at VDD – 1.5 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TLC272 and TLC277 very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC272 and TLC277 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement Information section). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input (see Figure 40).
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier. The low input bias current requirements of the TLC272 and TLC277 result in a very low noise current, which is insignificant in most applications. This feature makes the devices especially favorable over bipolar devices when using values of circuit impedance greater than 50 k, since bipolar devices exhibit greater noise currents.
V
I
+
+
V
I
(b) INVERTING AMPLIFIER
– +
(c) UNITY-GAIN AMPLIFIER(a) NONINVERTING AMPLIFIER
V
I
OUT OUT OUT
Figure 40. Guard-Ring Schemes
output characteristics
The output stage of the TLC272 and TLC277 is designed to sink and source relatively high amounts of current (see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can cause device damage under certain conditions. Output current capability increases with supply voltage.
All operating characteristics of the TLC272 and TLC277 are measured using a 20-pF load. The devices can drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
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APPLICATION INFORMATION
output characteristics (continued)
(c) CL = 150 pF, RL = NO LOAD
(b) CL = 130 pF, RL = NO LOAD
(a) CL = 20 pF, RL = NO LOAD
V
I
–2.5 V
C
L
V
O
2.5 V
+
TA = 25°C
f = 1 kHz V
IPP
= 1 V
(d) TEST CIRCUIT
Figure 41. Effect of Capacitive Loads and Test Circuit
Although the TLC272 and TLC277 possess excellent high-level output voltage and current capability , methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup resistor (R
P
) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on resistance between approximately 60 and 180 , depending on how hard the operational amplifier input is driven. With very low values of R
P
, a voltage offset from 0 V at the output occurs. Second, pullup resistor R
P
acts as a drain load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying the output current.
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APPLICATION INFORMATION
output characteristics (continued)
Figure 42. Resistive Pullup to Increase V
OH
VDD – V
O
IF + IL + I
P
Rp =
I
L
I
F
I
P
R
L
R1
R2
V
O
R
P
V
DD
V
I
+
Ip = Pullup current required by the operational amplifier (typically 500 µA)
Figure 43. Compensation for Input Capacitance
C
+
V
O
feedback
Operational amplifier circuits almost always employ feedback, and since feedback is the first prerequisite for oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads (discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically .
electrostatic discharge protection
The TLC272 and TLC277 incorporate an internal electrostatic discharge (ESD) protection circuit that prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be exercised, however, when handling these devices as exposure to ESD may result in the degradation of the device parametric performance. The protection circuit also causes the input bias currents to be temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC272 and TLC277 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up; however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply voltage by more than 300 mV . Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground and can be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of latch-up occurring increases with increasing temperature and supply voltages.
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
33
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
10 k
10 k
5 k
V
I
+
10 k
10 k
10 k
0.016 µF
+
R = 5 k(3/d-1) (see Note A)
Band Pass
High Pass
Low Pass
+
0.016 µF
5 V
1/2
TLC272
1/2
TLC272
1/2
TLC272
NOTE A: d = damping factor, 1/Q
Figure 44. State-Variable Filter
1/2
TLC272
V
I
12 V
H.P.
5082-2835
0.5 µF
Mylar
V
O
100 k
+
+
1/2
TLC272
N.O.
Reset
Figure 45. Positive-Peak Detector
TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
34
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
1/2
TLC272
110
V
O
(see Note B)
+
250 µF,
25 V
10 k
TIP31
TL431
20 k
1 k
100 k
0.47 µF
15
TIS193
0.01 µF
47 k
22 k
0.1 µF
4.7 k
1.2 k
V
I
(see Note A)
+
NOTES: A. VI = 3.5 to 15 V
B. VO = 2 V, 0 to 1 A
Figure 46. Logic-Array Power Supply
9 V
100 k
47 k
TLC272
1/2
1/2
TLC272
R2
VO (see Note A)
VO (see Note B)
10 k
10 k
R3
0.1 µF
100 k
9 V
R1
+
fO+
1
4C(R2)
[
R1 R3
]
C
NOTES: A. V
O(PP)
= 8 V
B. V
O(PP)
= 4 V
Figure 47. Single-Supply Function Generator
TLC272, TLC272A, TLC272B, TLC272Y, TLC277
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS091B – OCTOBER 1987 – REVISED AUGUST 1994
35
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
10 k
1/2
TLC277
(see Note A)
R1,10 k
V
O
95 k
10 k
+
–5 V
VI+
VI–
5 V
10 k 100 k
+
+
1/2
TLC277
1/2
TLC277
NOTE B: CMRR adjustment must be noninductive.
Figure 48. Low-Power Instrumentation Amplifier
R/2
5 M
C
270 pF
2C
540 pF
R
10 M
V
O
V
I
5 V
+
f
NOTCH
+
1
2pRC
C
270 pF
R
10 M
1/2
TLC272
Figure 49. Single-Supply Twin-T Notch Filter
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