Texas Instruments TIBPAL16R8-30MWB, TIBPAL16R8-30MJB, TIBPAL16R8-30MJ, TIBPAL16R8-30MFKB, TIBPAL16R8-25CN Datasheet

TIBPAL16L8-25C, TIBPAL16R4-25C, TIBPAL16R6-25C, TIBPAL16R8-25C

TIBPAL16L8-30M, TIBPAL16R4-30M, TIBPAL16R6-30M, TIBPAL16R8-30M

LOW-POWER HIGH-PERFORMANCE IMPACT  PAL



CIRCUITS

SRPS059 – FEBRUARY 1984 – REVISED APRIL 2000

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

High-Performance Operation:
Propagation Delay
C Suffix . . . 25 ns Max
M Suffix . . . 30 ns Max

D

Functionally Equivalent, but Faster Than
PAL16L8A, PAL16R4A, PAL16R6A, and
PAL16R8A

D

Power-Up Clear on Registered Devices (All
Register Outputs Are Set High, but Voltage
Levels at the Output Pins Go Low)

D

Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs

D

Dependable Texas Instruments Quality and
Reliability

DEVICE

I

INPUTS

3-STATE

O

OUTPUTS

REGISTERED

Q

OUTPUTS

I/O

PORTS

PAL16L8 10 2 0 6
PAL16R4 8 0

4 (3-state

buffers)

4

PAL16R6 8 0

6 (3-state

buffers)

2

PAL16R8 8 0

8 (3-state

buffers)

0

description

These programmable array logic devices feature
high speed and functional equivalency when
compared with currently available devices. These
IMP ACT circuits combine the latest Advanced
Low-Power Schottky technology with proven
titanium-tungsten fuses to provide reliable,
high-performance substitutes for conventional
TTL logic. Their easy programmability allows for
quick design of custom functions and typically
results in a more compact circuit board. In
addition, chip carriers are available for further
reduction in board space.

The TIBP AL16’ C series is characterized from 0°C
to 75°C. The TIBP AL16’ M series is characterized
for operation over the full military temperature
range of –55°C to 125°C.

Copyright  2000, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

These devices are covered by U.S. Patent 4,410,987.
IMPACT is a trademark of Texas Instruments.
PAL is a registered trademark of Advanced Micro Devices Inc.

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

I
I
I
I
I
I
I
I
I

GND

V

CC

O
I/O
I/O
I/O
I/O
I/O
I/O
O
I

TIBPAL16L8’

C SUFFIX ...J OR N PACKAGE

M SUFFIX ...J OR W PACKAGE

(TOP VIEW)

4
5
6
7
8

18
17
16
15
14

I/O
I/O
I/O
I/O
I/O

I
I
I
I
I

TIBPAL16L8’

C SUFFIX . . . FN PACKAGE

M SUFFIX . . . FK PACKAGE

(TOP VIEW)

I

I

I

O

I/O

O

I

GND

I

V

CC

3212019

910111213

TIBPAL16R4-25C, TIBPAL16R6-25C, TIBPAL16R8-25C
TIBPAL16R4-30M, TIBPAL16R6-30M, TIBPAL16R8-30M
LOW-POWER HIGH-PERFORMANCE IMPACT  PAL



CIRCUITS

SRPS059 FEBRUARY 1984 – REVISED APRIL 2000

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

CLK

I
I
I
I
I
I
I
I

GND

V

CC

I/O
I/O
Q
Q
Q
Q
I/O
I/O
OE

TIBPAL16R4’

C SUFFIX ...J OR N PACKAGE

M SUFFIX ...J OR W PACKAGE

(TOP VIEW)

CLK

I
I
I
I
I
I
I
I

GND

V

CC

I/O
Q
Q
Q
Q
Q
Q
I/O
OE

TIBPAL16R6’

C SUFFIX ...J OR N PACKAGE

M SUFFIX ...J OR W PACKAGE

(TOP VIEW)

CLK

I
I
I
I
I
I
I
I

GND

V

CC

Q
Q
Q
Q
Q
Q
Q
Q
OE

TIBPAL16R8’

C SUFFIX ...J OR N PACKAGE

M SUFFIX ...J OR W PACKAGE

(TOP VIEW)

I

I

CLK

I/O

I/O

I/O

I

GND

V

CC

OE

I/O
Q
Q
Q
Q

I
I
I
I
I

TIBPAL16R4’

C SUFFIX . . . FN PACKAGE

M SUFFIX . . . FK PACKAGE

(TOP VIEW)

I

I

CLK

I/O

Q

I/O

I

GND

V

CC

Q
Q
Q
Q
Q

I
I
I
I
I

OE

TIBPAL16R6’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE

(TOP VIEW)

I

I

CLK

Q

Q

Q

I

GND

V

CC

OE

Q
Q
Q
Q
Q

I
I
I
I
I

TIBPAL16R8’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

4
5
6
7
8

18
17
16
15
14

3212019

910111213

4
5
6
7
8

18
17
16
15
14

3212019

910111213

4
5
6
7
8

18
17
16
15
14

3212019

910111213

TIBPAL16L8-25C, TIBPAL16R4-25C

TIBPAL16L8-30M, TIBPAL16R4-30M

LOW-POWER HIGH-PERFORMANCE IMPACT  PAL



CIRCUITS

SRPS059 – FEBRUARY 1984 – REVISED APRIL 2000

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagrams (positive logic)

denotes fused inputs

TIBPAL16L8 ’

TIBPAL16R4’

O

O

I/O

I/O

I/O

I/O

I/O

I/O

I

EN

≥ 1

&

32 × 64

10 16

166

7

7

7

7

7

7

7

7

6

Q

I/O

I/O

I/O

I/O

I

EN

816

164

7

7

7

8

8

8

7

4

≥ 1

≥ 1

8

Q

Q

Q

4

1D

I = 1

2

CLK

C1

EN 2

OE

4

16 ×

16 ×

&

32 × 64

TIBPAL16R6-25C, TIBPAL16R8-25C
TIBPAL16R6-30M, TIBPAL16R8-30M
LOW-POWER HIGH-PERFORMANCE IMPACT  PAL



CIRCUITS

SRPS059 – FEBRUARY 1984 – REVISED APRIL 2000

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagrams (positive logic)

denotes fused inputs

TIBPAL16R6’

TIBPAL16R8’

Q

I/O

I/O

I

EN

816

162

7

8

8

8

7

2

≥ 1

≥ 1

8

Q

Q

Q

6

1D

I = 1

2

CLK

C1

EN 2

OE

6

8

Q

8

Q

Q

I

816

168

8

8

8

8

8

Q

Q

Q

1D

I = 1

2

CLK

C1

EN 2

8

Q

8

Q

≥ 1

OE

8

Q

8

Q

16 ×

16 ×

&

32 × 64

&

32 × 64

TIBPAL16L8-25C

TIBPAL16L8-30M

LOW-POWER HIGH-PERFORMANCE IMPACT  PAL



CIRCUITS

SRPS059 – FEBRUARY 1984 – REVISED APRIL 2000

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic)

0 4 8 12 16 20 24 28 31

I

2

I

3

4

I

5

I

6

I

7

I

8

I

9

O

19

I/O

18

I/O

17

I/O

16

I/O

15

I/O

14

I/O

13

O

12

I

11

Increment

I

1

Fuse number = First fuse number + Increment

0
32
64
96

128
160
192
224

256
288
320
352
384
416
448
480

512
544
576
608
640
672
704
736

768
800
832
864
896
928
960
992

1024
1056
1088
1120
1152
1184
1216
1248

1280
1312
1344
1376
1408
1440
1472
1504

1536
1568
1600
1632
1664
1696
1728
1760

1792
1824
1856
1888
1920
1952
1984
2016

First

Fuse

Numbers

I

TIBPAL16R4-25C
TIBPAL16R4-30M
LOW-POWER HIGH-PERFORMANCE IMPACT  PAL



CIRCUITS

SRPS059 – FEBRUARY 1984 – REVISED APRIL 2000

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic)

2016

0 4 8 12 16 20 24 28 31

I

2

I

3

I

4

I

5

I

6

I

7

I

8

I

9

I/O

19

I/O

18

Q

17

Q

16

Q

15

Q

14

I/O

13

I/O

12

11

Increment

CLK

1

Fuse number = First fuse number + Increment

0
32
64
96

128
160
192
224

256
288
320
352
384
416
448
480

512
544
576
608
640
672
704
736

768
800
832
864
896
928
960
992

1024
1056
1088
1120
1152
1184
1216
1248

1280
1312
1344
1376
1408
1440
1472
1504

1536
1568
1600
1632
1664
1696
1728
1760

1792
1824
1856
1888
1920
1952
1984

First

Fuse

Numbers

C1

1D

I = 1

C1

1D

I = 1

C1

1D

I = 1

C1

1D

I = 1

OE