Texas Instruments TCM37C15AIDW, TCM37C14AIDWR, TCM37C14AIDW, TCM37C15AIN Datasheet
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Meet CCITT/(D3/D4) Channel Bank
Recommendations for Input Signals
Greater than –55 dBm0
D
Programmable T ransmit and Receive Gain
Control With Pin-Selectable
Gain/Attenuation Levels
D
Includes Differential Output on the
TCM37C14A
D
Precision Switched-Capacitor Filters and
Converters
D
Improved Version TCM29C13A Series
COMBOs (CODEC and Filters)
D
Low Power CMOS
– Operating Mode...70 mW Typical
– Power-Down Mode...7 mW Typical
D
Internal Sample-and-Hold and Autozero
Functions
D
Precision Internal Voltage References
D
TCM37C14A Features Pin-Selectable µ-Law
or A-Law Companding and Pin-Selectable
Master Clock Rate (1.536 MHz, 1.544 MHz,
and 2.048 MHz Available)
D
TCM37C15A is 2.048 MHz A-Law Only
description
The TCM37C14A and TCM37C15A PCM combo with programmable gain control devices are single-chip PCM
combos (pulse-code-modulated CODECs with voice-band filtering). They are designed to perform transmit
encoding (A/D conversion) and receive decoding (D/A conversion), as well as the transmit and receive filtering
functions required to meet CCITT/(D3/D4) G.711 and G.714 specifications in a PCM system. Each device
provides all the functions required to interface a full-duplex, 4-line voice telephone circuit with a TDM
(time-division-multiplexed) system, and also perform the encoding and decoding of call progress tones. The
TCM37C14A and TCM37C15A are based on the proven TI TCM29C13A core, and have the added feature of
programmable transmit and receive gain.
Primary applications include line interface for digital transmission and switching of T1/E1 carrier (P ABX [private
branch automatic exchange] and central office telephone systems), subscriber line concentrators, digital
encryption systems, and digital signal processing. They are intended to be used at the analog termination of
a PCM line or trunk to the POTS (plain old telephone system) local-loop line.
The TCM37C15A is available in 20-pin DW SOIC (small-outline IC) or 20-pin N PDIP (plastic dual-in-line
package) packages, and the TCM37C14A is available in a 24-pin DW SOIC package and includes differential
output. All are characterized for operation from –40°C to 85°C.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
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5
6
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8
9
10
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24
23
22
21
20
19
18
17
16
15
14
13
V
BB
PWRO+
PWRO–
RIN
RS1
RS2
GSR
GS1
GS0
CLKSEL
PCMIN
FSR
V
CC
GSX
TS1
TS2
ANLGIN
AGND
TSX
PCMOUT
FSX
ASEL
MCLK
DGND
TCM37C14A ...DW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
BB
PWRO+
RIN
RS1
RS2
GSR
GS1
GS0
PCMIN
FSR
V
CC
GSX
TS1
TS2
ANLGIN
AGND
PCMOUT
FSX
MCLK
DGND
TCM37C15A ...DW OR N PACKAGE
(TOP VIEW)
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGE
20 PIN 24 PIN
T
A
SMALL OUTLINE
(DW)
PLASTIC DIP
(N)
SMALL OUTLINE
(DW)
–40°C to 85°C TCM37C15AIDW TCM37C15AIN TCM37C14AIDW
functional block diagram
Transmit
Third-Order
Antialias
Low-Pass
Filter
(Analog)
Transmit
Sixth-Order
Low-Pass
Filter
(Switched Cap)
Fc = 3400 Hz
Transmit
Third-Order
High-Pass
Filter
(Switched Cap)
Fc = 200 Hz
Sample
and Hold
ADC
Output
Register
Auto Zero
Analog to
Digital Control
Logic
Reference
Digital-to-
Analog
Converter
Control
Logic
Digital-to-
Analog Control
Logic
Control SectionReceive Section
Input
Register
Buffer
Filter
Gain
Set
Gain
Set
Transmit Section
PCMOUT
TSX
†
FSX
MCLK
CLKSEL
†
ASEL
†
GS0
GS1
PCMIN
FSRAGNDDGNDVBBVCC
TS1
TS2
ANLGIN
GSX
RIN
GSR
RS1
RS2
PWRO+
PWRO–
†
†
TCM37C14A only
24 1 13 19 12
17
18
16
14
10
9
8
11
22
21
20
23
4
7
5
6
2
3
NOTE A: Terminal numbers shown are for the TCM37C14A.
15
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NO.
I/O DESCRIPTION
NAME
’37C15A ’37C14A
AGND 15 19 Analog ground return for all internal voice circuits. AGND is connected internally to DGND.
ANLGIN 16 20 I Analog input to transmit operational amplifier.
ASEL 15 I Selection between A-law and µ-law operation. When ASEL is connected to VBB, A-law is selected.
When ASEL is connected to VCC or ground, µ-law is selected.
CLKSEL 10 I Clock frequency selection. CLKSEL must be connected to VBB, VCC, or ground to select the master
clock frequency. When CLKSEL is tied to VBB, MCLK is 2.048 MHz. When it is tied to ground, MCLK
is at 1.544 MHz. When it is tied to VCC, MCLK is 1.536 MHz.
DGND 11 13 Digital ground for all internal logic circuits. DGND is internally connected to AGND.
FSR 10 12 I Frame-synchronization clock input/time-slot enable for receive channel. The receive channel enters
the standby state when FSR is held low for 300 ms.
FSX 13 16 I Frame-synchronization clock input/time-slot enable for transmit. The transmit channel enters the
standby state when FSX is held low for 300 ms.
GS0 8 9 I Input for first bit of the programmable gain control circuitry. GS0 works in combination with GS1 to
simultaneously control transmit and receive gain, and controls power-down instruction. (See
Table 1 and 2 for control logic information.)
GS1 7 8 I Input for second bit of the programmable gain control circuitry. GS1 works in combination with GS0
to simultaneously control transmit and receive gain, and controls power-down instruction. (See T able
1 and 2 for control logic information.)
GSR 6 7 I Input to gain-setting network of the output power amplifier. Gain is set by external resistors with three
levels of programmable gain or attenuation control. (See Figure 6 and Figure 7 for recommended
configuration.)
GSX 19 23 O Output terminal of internal uncommitted operational amplifier. Internally , GSX is the voice signal input
to the transmit filter.
MCLK 12 14 I Master clock (input). For the TCM37C14A, the master clock frequency can be either 2.048 MHz,
1.544 MHz, or 1.536 MHz, and is selected by CLKSEL. MCLK for the TCM37C15A is 2.048 MHz.
PCMIN 9 11 I Receive PCM input. PCM data is clocked in on PCMIN on eight consecutive negative transitions of
the receive data clock (MCLK).
PCMOUT 14 17 O Transmit PCM output. PCM data is clocked out on PCMOUT on eight consecutive positive transitions
of the transmit data clock (MCLK).
PWRO+ 2 2 O Noninverting output of power amplifier. PWRO+ can drive transformer hybrids or high-impedance
loads directly in a differential or a single-ended configuration.
PWRO– 3 O Inverting output of power amplifier. PWRO– is functionally identical with and complementary to
PWRO +.
RIN 3 4 I Input to receive section amplifiers. (See Figure 6 and Figure 7 for recommended circuitry.)
RS1 4 5 Terminal for first gain-control resistor of the receive section. RS1 is selected through closure of the
first gain control switch. (See Figure 6 and Figure 7 for recommended circuitry.)
RS2 5 6 Terminal for second gain control resistor of the receive section. RS2 is selected through closure of
the second gain control switch. (See Figure 6 and Figure 7 for recommended configuration.)
TS1 18 22 Terminal for gain-control resistor on input of transmit section. TS1 is selected through closure of the
first gain-control switch. (See Figure 6 and Figure 7 for recommended configuration.)
TS2 17 21 Terminal for gain-control resistor on input of transmit section. TS2 is selected through closure of the
second gain-control switch. (See Figure 6 and Figure 7 for recommended configuration.)
TSX 18 O Transmit channel time-slot strobe for the transmit channel (active low). TSX is an open drain output
and can be used as an enable signal for a 3-state output buffer .
V
BB
1 1 Negative supply voltage. Input is –5 V ± 5%.
V
CC
20 24 Positive supply voltage. Input is 5 V ± 5%.
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
(see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, V
BB
(see Note 1) –7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at any analog input, V
I
V
CC
+ 0.3 V to V
BB
– 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation at (or below) 25°C free-air temperature 1300 mW. . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package 260°C. . . . . . . . . . . . . . .
JEDEC Latch up ±250 mA or ±10 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Voltage values are with respect to GND.
recommended operating conditions (see Note 2)
MIN NOM MAX UNIT
Supply voltage, VCC (see Notes 2 and 3) 4.75 5 5.25 V
Supply voltage, V
BB
–4.75 –5 –5.25 V
DGND voltage with respect to AGND 0 V
High-level input voltage, V
IH
2.2 V
Low-level input voltage, V
IL
0.8 V
At GSX/GSR 10 kΩ
Load resistance, R
L
At PWRO+ and/or PWRO– 300 Ω
p
At GSX/GSR 50
p
Load capacitance, C
L
At PWRO+ and/or PWRO– 100
pF
Operating free-air temperature, T
A
–40 85 °C
NOTES: 2. To avoid possible damage to these CMOS devices and resulting reliability problems, the power-up procedure described in the device
power-up sequence paragraphs later in this document should be followed.
3. Voltages at analog inputs and outputs, VCC and VBB terminals, are with respect to the AGND terminal. All other voltages are
referenced to the DGND terminal unless otherwise noted.
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (outputs not loaded) (unless otherwise noted)
supply current
0°C to 85°C –40°C to 0°C
PARAMETER
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX
UNIT
Operating 7 10 8 11
I
CC
Supply current from
Standby FSX, FSR at VIL (after 300 ms) 0.5 1.3 1 1.7
mA
V
CC
Power down GS0, GS1 = VIL (after 300 ms) 0.5 1.2 1 1.7
Operating –7 –9 –9 –11.5
I
BB
Supply current from
Standby FSX, FSR at VIL (after 300 ms) –0.6 –1 –0.8 –1.2
mA
V
BB
Power down GS0, GS1 = VIL (after 300 ms) –0.3 –0.9 –0.4 –1.2
Operating 70 100 80 110
PDPower dissipation
Standby
FSX, FSR at VIL (after 300 ms) 9 13 10 17
mW
Power down GS0, GS1 = VIL (after 300 ms) 7 12 10 17
digital interface
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
OH
High-level output voltage at PCMOUT IOH = –9.6 mA 2.4 V
V
OL
Low-level output voltage at PCMOUT, TSX IOL = 3.2 mA 0.5 V
I
IH
High-level input current, any digital input VI = 2.2 V to V
CC
12 µA
I
IL
Low-level input current, any digital input VI = 0 to 0.8 V 12 µA
C
i
Input capacitance 5 pF
C
o
Output capacitance 5 pF
†
All typical values are at VBB = –5 V, VCC = 5 V, and TA = 25°C.
transmit amplifier input
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
Input current at ANLGIN VI = –2.17 V to 2.17 V ±100 nA
Input offset voltage at ANLGIN VI = –2.17 V to 2.17 V ±25 mV
Common-mode rejection at ANLGIN VI = –2.17 V to 2.17 V 55 dB
Open-loop voltage amplification at GSX 5000
Open-loop unity-gain bandwidth at GSX 1 MHz
Input resistance at ANLGIN 10 MΩ
†
All typical values are at VBB = –5 V, VCC = 5 V, and TA = 25°C.
receive filter output‡
PARAMETER MIN TYP†MAX UNIT
Output offset voltage PWRO+, PWRO– (single ended), Relative to AGND 80 mV
Output resistance at PWRO+, PWRO– 1 Ω
†
All typical values are at VBB = –5 V, VCC = 5 V, and TA = 25°C.
‡
PWRO– on TCM37C14A only
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (outputs not loaded) (unless otherwise noted) (continued)
gain and dynamic range, V
CC
= 5 V, VBB = –5 V, TA = 25°C (see Notes 4, 5, and 6) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Encoder milliwatt response (transmit gain tolerance)
Signal input = 1.064 Vrms for µ-law,
Signal input = 1.068 Vrms for A-law
±0.04 ±0.2 dBm0
Encoder milliwatt response variation with temperature and
supplies
TA = –40°C – 85°C, supplies = ±5% ±0.08 dB
Digital milliwatt response (receive gain tolerance) relative to zerotransmission level point
Signal input per CCITT G.711,
output signal = 1 kHz
±0.04 ±0.2 dBm0
Digital milliwatt response variation with temperature and supplies TA = –40°C – 85°C, supplies = ±5% ±0.08 dB
µ-law
2.76
p
A-law
R
L
=
600 Ω
2.79
Zero-transmission-level point, transmit channel (0 dBm0)
µ-law
1
dBm
A-law
R
L
=
900 Ω
1.03
µ-law
5.76
p
A-law
R
L
=
600 Ω
5.79
Zero-transmission-level point, receive channel (0 dBm0)
µ-law
4
dBm
A-law
R
L
=
900 Ω
4.03
NOTES: 4. Unless otherwise noted, the analog input is a 0-dBm0, 1020-Hz sine wave, where 0 dBm0 is defined as the zero-reference point
of the channel under test with unity gain set on the amplifier. This corresponds to an analog signal input of 1.064 V rms, or an output
of 1.503 Vrms.
5. The input amplifier is set for unity gain, noninverting. The digital input is a PCM bit stream generated by passing a 0-dBm0, 1020-Hz
sine wave through an ideal encoder.
6. Receive output is measured single ended with the output amplifier in the unity-gain configuration. All output levels are (sin x)/x
corrected.
gain tracking, reference level = –10 dBm0
PARAMETER TEST CONDITIONS MIN MAX UNIT
3 > input level ≥ –40 dBm0 ±0.25
Transmit gain tracking error , sinusoidal input
–40 > input level ≥ –50dBm0 ±0.5
dB
–50 > input level ≥ –55 dBm0 ±1.2
3 > input level ≥ –40 dBm0 ±0.25
Receive gain tracking error, sinusoidal input
–40 > input level ≥ –50 dBm0 ±0.5
dB
–50 > input level ≥ –55 dBm0 ±1.2
noise
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
Transmit noise, C-message weighted ANLGIN = AGND 1 7 dBrnC0
Transmit noise, psophometrically weighted ANLGIN = AGND –82 –80 dBm0p
Receive noise, C-message-weighted quiet code at PWRO+
PCMIN = 11111111 (µ-law),
PCMIN = 11010101 (A-law)
2 5 dBrnC0
Receive noise, psophometrically weighted PCM = lowest positive decode level –81 dBm0p
†
All typical values are at VBB = –5 V, VCC = 5 V, and TA = 25°C.
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (outputs not loaded) (unless otherwise noted) (continued)
power supply rejection and crosstalk attenuation
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
pp
0 < f < 30 kHz
Idle channel,
pp
pp
–40
V
CC
su
ppl
y v
oltage rejection ratio, transmit channel
30 < f < 50 kHz
supply signal =
200 mV
pp,
f measured at PCMOUT
–45
dB
pp
0 < f < 30 kHz
Idle channel,
suppl
y
signal = 200 mVpp,
–35
V
BB
su
ppl
y v
oltage rejection ratio, transmit channel
30 < f < 50 kHz
yg ,
f measured at PCMOUT
Idle channel,
–55
dB
V
supply voltage rejection ratio, receive channel
0 < f < 30 kHz
Idle channel,
suppl
y
signal = 200 mVpp,
–40
CC
ygj ,
(single ended)
30 < f < 50 kHz
yg ,
narrow-band,
f measured at PWRO+
–45
dB
V
supply voltage rejection ratio, receive channel
0 < f < 30 kHz
Idle channel,
suppl
y
signal = 200 mVpp,
–40
BB
ygj ,
(single ended)
30 < f < 50 kHz
yg ,
narrow-band,
f measured at PWRO+
–45
dB
Crosstalk attenuation, transmit-to-receive at PWRO+ (single ended)
ANLGIN = 0 dBm0,
f = 1.02 kHz, unity gain,
PCMIN = lowest decode level
75 dB
Crosstalk attenuation, receive-to-transmit at PWRO+ (single ended)
PCMIN = 0 dBm0,
f = 1.02 kHz
75 dB
†
All typical values are at VBB = –5 V, VCC = 5 V, and TA = 25°C.
distortion
PARAMETER TEST CONDITIONS MIN MAX UNIT
0 > ANLGIN ≥ –30 dBm0 36
Transmit signal to distortion ratio, sinusoidal input (CCITT G.712 – Method 2)
–30 > ANLGIN ≥ –40 dBm0 30
dB
–40 > ANLGIN ≥ –45 dBm0 25
0 > ANLGIN ≥ –30 dBm0 36
Receive signal to distortion ratio, sinusoidal input (CCITT G.712 – Method 2)
–30 > ANLGIN ≥ –40 dBm0 30
dB
–40 > ANLGIN ≥ –45 dBm0 25
Transmit single-frequency distortion products Input signal = 0 dBm0 –46 dBm0
Receive single-frequency distortion products Input signal = 0 dBm0 –46 dBm0
CCITT G.712 (7.1) –35
Intermodulation distortion, end-to-end
CCITT G.712 (7.2) –49
Spurious out-of-band signals, end-to-end
CCITT G.712 (6.1) –25
dBm0
CCITT G.712 (9) –40
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