TEXAS INSTRUMENTS SN74LVC245A Technical data

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FEATURES

1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
A1 A2 A3 A4 A5 A6 A7 A8
GND
V
CC
OE B1 B2 B3 B4 B5 B6 B7 B8
DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
1 20
10 11
2 3 4 5 6 7 8 9
19 18 17 16 15 14 13 12
OE B1 B2 B3 B4 B5 B6 B7
A1 A2 A3 A4 A5 A6 A7 A8
B8
V
GND
CC
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpdof 6.3 ns at 3.3 V
Typical V
<0.8 V at V
Typical V
>2 V at V
I
Supports Partial-Power-Down Mode
off
Operation
Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V V
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101)
CC
OLP
CC
OHV
CC
)
(Output Ground Bounce)
= 3.3 V, T
(Output V
= 3.3 V, T
A
= 25 ° C
A OH
= 25 ° C
Undershoot)
SN74LVC245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS218T – JANUARY 1993 – REVISED FEBRUARY 2005

DESCRIPTION/ORDERING INFORMATION

This octal bus transceiver is designed for 1.65-V to
3.6-V V The SN74LVC245A is designed for asynchronous
communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the device so the buses effectively are isolated.
–40 ° C to 85 ° C
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
operation.
CC
T
A
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PDIP N Tube of 20 SN74LVC245AN SN74LVC245AN QFN RGY Reel of 1000 SN74LVC245ARGYR LC245A
SOIC DW LVC245A
SOP NS Reel of 2000 SN74LVC245ANSR LVC245A SSOP DB Reel of 2000 SN74LVC245ADBR LC245A
TSSOP PW Reel of 2000 SN74LVC245APWR LC245A
TVSOP DGV Reel of 2000 SN74LVC245ADGVR LC245A VFBGA GQN SN74LVC245AGQNR VFBGA ZQN (Pb-Free) SN74LVC245AZQNR
ORDERING INFORMATION
PACKAGE
(1)
Tube of 25 SN74LVC245ADW Reel of 2000 SN74LVC245ADWR
Tube of 70 SN74LVC245APW
Reel of 250 SN74LVC245APWT
Reel of 1000 LC245A
ORDERABLE PART NUMBER TOP-SIDE MARKING
Copyright © 1993–2005, Texas Instruments Incorporated
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GQN OR ZQN PACKAGE
(TOP VIEW)
1 2 3 4
A B C D E
DIR
OE
A1
B1
To Seven Other Channels
1
2
19
18
Pin numbers shown are for the DB, DGV , DW, N, NS, PW, and RGY packages.
SN74LVC245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS218T – JANUARY 1993 – REVISED FEBRUARY 2005

DESCRIPTION/ORDERING INFORMATION (CONTINUED)

To ensure the high-impedance state during power up or power down, OE should be tied to V resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using I
. The I
off
circuitry disables the outputs,
off
preventing damaging current backflow through the device when it is powered down.
through a pullup
CC
TERMINAL ASSIGNMENTS
1 2 3 4
A A1 DIR V B A3 B2 A2 B1 C A5 A4 B4 B3 D A7 B6 A6 B5 E GND A8 B8 B7
CC
FUNCTION TABLE
INPUTS
OE DIR
L L B data to A bus L H A data to B bus H X Isolation
OPERATION
LOGIC DIAGRAM (POSITIVE LOGIC)
OE
2
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SN74LVC245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS218T – JANUARY 1993 – REVISED FEBRUARY 2005

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
θ
JA
T
stg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of V (4) The package thermal impedance is calculated in accordance with JESD 51-7. (5) The package thermal impedance is calculated in accordance with JESD 51-5.
Supply voltage range –0.5 6.5 V Input voltage range
(2)
Voltage range applied to any output in the high-impedance or power-off state Voltage range applied to any output in the high or low state Input clamp current VI< 0 –50 mA Output clamp current VO< 0 –50 mA Continuous output current ± 50 mA Continuous current through V
Package thermal impedance ° C/W
Storage temperature range –65 150 ° C
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
is provided in the recommended operating conditions table.
CC
(1)
MIN MAX UNIT
–0.5 6.5 V
(2)
(2) (3)
or GND ± 100 mA
CC
DB package DGV package DW package GQN/ZQN package N package NS package PW package RGY package
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(5)
–0.5 6.5 V –0.5 V
CC
+ 0.5 V
70 92 58 78 69 60 83 37
3
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SN74LVC245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS218T – JANUARY 1993 – REVISED FEBRUARY 2005

Recommended Operating Conditions

V
V
V
V V
I
OH
I
OL
t/ v Input transition rise or fall rate 10 10 ns/V
(1) All unused inputs of the device must be held at V
Supply voltage V
CC
High-level input voltage V
IH
Low-level input voltage V
IL
Input voltage 0 5.5 0 5.5 V
I
Output voltage 0 V
O
High-level output current mA
Low-level output current mA
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(1)
TA= 25° C –40 ° C TO 85° C MIN MAX MIN MAX
Operating 1.65 3.6 1.65 3.6 Data retention only 1.5 1.5 V
= 1.65 V to 1.95 V 0.65 × V
CC
= 2.3 V to 2.7 V 1.7 1.7 V
CC
V
= 2.7 V to 3.6 V 2 2
CC
V
= 1.65 V to 1.95 V 0.35 × V
CC
= 2.3 V to 2.7 V 0.7 0.7 V
CC
V
= 2.7 V to 3.6 V 0.8 0.8
CC
V
= 1.65 V –4 –4
CC
V
= 2.3 V –8 –8
CC
V
= 2.7 V –12 –12
CC
V
= 3 V –24 –24
CC
V
= 1.65 V 4 4
CC
V
= 2.3 V 8 8
CC
V
= 2.7 V 12 12
CC
V
= 3 V 24 24
CC
or GND to ensure proper device operation. Refer to the TI application report,
CC
CC
0.65 × V
CC
CC
CC
0.35 × V
0 V
UNIT
CC
V
CC
4
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Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
IOH= –100 µ A 1.65 V to 3.6 V V IOH= –4 mA 1.65 V 1.29 1.2
V
OH
IOH= –8 mA 2.3 V 1.9 1.7
IOH= –12 mA
IOH= –24 mA 3 V 2.3 2.2 IOL= 100 µ A 1.65 V to 3.6 V 0.1 0.2 IOL= 4 mA 1.65 V 0.24 0.45
V
OL
IOL= 8 mA 2.3 V 0.3 0.7 V IOL= 12 mA 2.7 V 0.4 0.4 IOL= 24 mA 3 V 0.55 0.55
I
I
I
off
I
OZ
I
CC
I C
C
Control inputs VI= 0 to 5.5 V 3.6 V ± 1 ± 5 µ A
VIor VO= 5.5 V 0 ± 1 ± 10 µ A
(1)
CC
Control inputs VI= V
i
A or B ports VI= V
io
VO= 0 to 5.5 V 3.6 V ± 1 ± 10 µ A VI= V
3.6 V VI≤ 5.5 V One input at V
Other inputs at V
or GND 1 10
CC
or GND 3.3 V 4 pF
CC
or GND 3.3 V 5.5 pF
CC
(2)
0.6 V,
CC
CC
IO= 0 3.6 V µ A
or GND
(1) For I/O ports, the parameter IOZincludes the input leakage current. (2) This applies in the disabled state only.
CC
2.7 V 2.2 2.2 3 V 2.4 2.4
2.7 V to 3.6 V 500 500 µ A
SN74LVC245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS218T – JANUARY 1993 – REVISED FEBRUARY 2005
TA= 25 ° C –40 ° C TO 85 ° C
MIN TYP MAX MIN MAX
0.2 V
CC
1 10
0.2
CC
UNIT
V

Switching Characteristics

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
PARAMETER V
FROM TO
(INPUT) (OUTPUT)
1.8 V ± 0.15 V 1 6 12.2 1 12.7
t
pd
A or B B or A ns
2.5 V ± 0.2 V 1 3.9 7.8 1 8.3
3.3 V ± 0.3 V 1.5 3.8 6.1 1.5 6.3
1.8 V ± 0.15 V 1 7 14.8 1 15.3
t
en
OE A or B ns
2.5 V ± 0.2 V 1 4.5 10 1 10.5
3.3 V ± 0.3 V 1.5 4.4 8.3 1.5 8.5
1.8 V ± 0.15 V 1 7.8 16.5 1 17
t
dis
OE A or B ns
2.5 V ± 0.2 V 1 4 9 1 9.5
3.3 V ± 0.3 V 1.7 4.1 7.3 1.7 7.5
t
sk(o)
3.3 V ± 0.3 V 1 ns
CC
2.7 V 1 4.2 7.1 1 7.3
2.7 V 1 5.4 9.3 1 9.5
2.7 V 1 4.4 8.3 1 8.5
TA= 25 ° C –40 ° C TO 85 ° C
MIN TYP MAX MIN MAX
UNIT
5
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SN74LVC245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS218T – JANUARY 1993 – REVISED FEBRUARY 2005

Operating Characteristics

TA= 25 ° C
PARAMETER V
C
Power dissipation capacitance per transceiver f = 10 MHz pF
pd
TEST
CONDITIONS
Outputs enabled 2.5 V 43
Outputs disabled 2.5 V 1
CC
1.8 V 42
3.3 V 45
1.8 V 1
3.3 V 2
TYP UNIT
6
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V
M
t
h
t
su
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
S1
V
LOAD
Open
GND
R
L
R
L
Data Input
Timing Input
V
I
0 V
V
I
0 V
0 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
V
I
0 V
Input
Output Waveform 1 S1 at V
LOAD
(see Note B)
Output Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
V
LOAD
/2
0 V
VOL + V
VOH - V
0 V
V
I
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
V
LOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 . D. The outputs are measured one at a time, with one transition per measurement. E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as ten.
G. t
PLH
and t
PHL
are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
I
V
M
V
M
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
1 k 500 500 500
V
CC
R
L
2 × V
CC
2 × V
CC
6 V 6 V
V
LOAD
C
L
30 pF 30 pF 50 pF 50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V
V
CC
V
CC
2.7 V
2.7 V
V
I
VCC/2 VCC/2
1.5 V
1.5 V
V
M
tr/t
f
2 ns
2 ns2.5 ns2.5 ns
INPUTS
SN74LVC245A
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS218T – JANUARY 1993 – REVISED FEBRUARY 2005

PARAMETER MEASUREMENT INFORMATION

Figure 1. Load Circuit and Voltage Waveforms
7
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