TEXAS INSTRUMENTS SN74LVC1G79 Technical data

SOT (SOT-23)

DBV

C79

SOT (SC-70)

DCK

CR

SN74LVC1G79

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES220M – APRIL 1999 – REVISED JANUARY 2003

D

Available in the Texas Instruments
NanoStar and NanoFree Packages

D

Supports 5-V VCC Operation

D

Inputs Accept Voltages to 5.5 V

D

Max tpd of 4 ns at 3.3 V

D

Low Power Consumption, 10-µA Max I

D

±24-mA Output Drive at 3.3 V

D

I

Supports Partial-Power-Down Mode

off

Operation

D

Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II

D

ESD Protection Exceeds JESD 22

CC

DBV OR DCK PACKAGE

(TOP VIEW)

1

D

2

CLK

GND

3

YEA OR YZA PACKAGE

(BOTTOM VIEW)

GND

CLK

D

3
2
145

5

V

4

Q

Q

V

CC

CC

– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

description/ordering information

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on

the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related
to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without
affecting the level at the output.

NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the
die as the package.

This device is fully specified for partial-power-down applications using I

off

. The I

circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMA TION

T

A

NanoStar
WCSP (DSBGA) – YEA

NanoFree
WCSP (DSBGA) – YZA (Pb-free)

–40°C to 85°C

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.

‡

DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site.

–

–

PACKAGE

†

Reel of 3000 SN74LVC1G79YEAR

Reel of 3000 SN74LVC1G79YZAR
Reel of 3000 SN74LVC1G79DBVR

Reel of 250 SN74LVC1G79DBVT
Reel of 3000 SN74LVC1G79DCKR

Reel of 250 SN74LVC1G79DCKT

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

_ _ _CR_

_

_

‡

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar and NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  2003, Texas Instruments Incorporated

1

SN74LVC1G79
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES220M – APRIL 1999 – REVISED JANUARY 2003

FUNCTION TABLE

INPUTS

CLK D

↑ H H
↑ LL

L X Q

logic diagram (positive logic)

OUTPUT

Q

0

CLK

2

C

1

D

TG

C

C

C

C

TG

C

TG

C

4

C

C

TG

C

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V
Input voltage range, V
Voltage range applied to any output in the high-impedance or power-off state, V

(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high or low state, V

(see Notes 1 and 2) –0.5 V to V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The value of VCC is provided in the recommended operating conditions table.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

–0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

O

O

(VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OK

±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 3): DBV package 206°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

DCK package 252°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

YEA/YZA package 154°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

CC

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Q

†

2

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VCCSupply voltage

V

VIHHigh-level input voltage

V

VILLow-level input voltage

V

V

3 V

V

3 V

SN74LVC1G79

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES220M – APRIL 1999 – REVISED JANUARY 2003

recommended operating conditions (see Note 4)

MIN MAX UNIT

pp

p

p

V

Input voltage 0 5.5 V

I

V

Output voltage 0 V

O

I

High-level output current

OH

I

Low-level output current

OL

∆t/∆v Input transition rise or fall rate

T

Operating free-air temperature –40 85 °C

A

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Operating 1.65 5.5
Data retention only 1.5
VCC = 1.65 V to 1.95 V 0.65 × V
VCC = 2.3 V to 2.7 V 1.7
VCC = 3 V to 3.6 V 2
VCC = 4.5 V to 5.5 V 0.7 × V
VCC = 1.65 V to 1.95 V 0.35 × V
VCC = 2.3 V to 2.7 V 0.7
VCC = 3 V to 3.6 V 0.8
VCC = 4.5 V to 5.5 V 0.3 ×V

VCC = 1.65 V –4
VCC = 2.3 V –8

=

CC

VCC = 4.5 V –32
VCC = 1.65 V 4
VCC = 2.3 V 8

=

CC

VCC = 4.5 V 32
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V 5

CC

CC

CC

–16
–24

16
24

10

CC

CC

V

mA

mA

ns/V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

SN74LVC1G79

V

V

3 V

V

V

3 V

t

Set

CLK↑

ns

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES220M – APRIL 1999 – REVISED JANUARY 2003

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

PARAMETER TEST CONDITIONS V

IOH = –100 mA 1.65 V to 5.5 V VCC–0.1
IOH = –4 mA 1.65 V 1.2

OH

OL

I

CLK or D inputs VI = 5.5 V or GND 0 to 5.5 V ±10

I

I

off

I

CC

∆I

CC

C

i

†

All typical values are at VCC = 3.3 V, TA = 25°C.

IOH = –8 mA 2.3 V 1.9
IOH = –16 mA

IOH = –24 mA
IOH = –32 mA

IOL = 100 mA 1.65 V to 5.5 V 0.1
IOL = 4 mA 1.65 V 0.45
IOL = 8 mA 2.3 V 0.3
IOL = 16 mA

IOL = 24 mA
IOL = 32 mA

VI or VO = 5.5 V 0 ±10
VI = 5.5 V or GND, IO = 0 1.65 V to 5.5 V 10
One input at VCC – 0.6 V, Other inputs at VCC or GND 3 V to 5.5 V 500
VI = VCC or GND 3.3 V 4 pF

CC

4.5 V 3.8

4.5 V 0.55

MIN

2.4

2.3

TYP

†

MAX UNIT

0.4

0.55

m

A

m

A

m

A

m

A

timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)

f

clock

t

w

su

t

h

VCC = 1.8 V

± 0.15 V

MIN MAX MIN MAX MIN MAX MIN MAX

Clock frequency 160 160 160 160 MHz
Pulse duration, CLK high or low 2.5 2.5 2.5 2.5 ns

up time before

Hold time, data after CLK↑

Data high 2.2 1.4 1.3 1.2
Data low 2.6 1.4 1.3 1.2

0.3 0.4 1 0.5 ns

VCC = 2.5 V

± 0.2 V

VCC = 3.3 V

± 0.3 V

VCC = 5 V

± 0.5 V

UNIT

4

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