Package Options Include Plastic
Small-Outline Transistor (DBV, DCK)
DBV OR DCK PACKAGE
(TOP VIEW)
NC
1
A
2
GND
NC – No internal connection
3
V
5
CC
Y
4
Packages
description
This single Schmitt-trigger inverter is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G14 device contains one inverter, and performs the Boolean function Y = A. The device
functions as an independent inverter, but because of Schmitt action, it may have dif ferent input threshold levels
for positive-going (V
The SN74LVC1G14 is characterized for operation from –40°C to 85°C.
) and negative-going (VT–) signals.
T+
FUNCTION TABLE
INPUT
A
HL
LH
OUTPUT
Y
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
2
AY
logic diagram (positive logic)
24
A
4
Y
PRODUCT PREVIEW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2000, Texas Instruments Incorporated
1
SN74LVC1G14
VCCSuppl
oltage
V
VIHHigh-level input voltage
V
VILLow-level input voltage
V
V
3 V
V
V
SINGLE SCHMITT-TRIGGER INVERTER
SCES218C – APRIL 1999 – REVISED FEBRUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51.
Operating1.655.5
Data retention only1.5
VCC = 1.65 V to 1.95 V0.65 × V
VCC = 2.3 V to 2.7 V1.7
VCC = 3 V to 3.6 V2
VCC = 4.5 V to 5.5 V0.7 ×V
VCC = 1.65 V to 1.95 V0.35 × V
VCC = 2.3 V to 2.7 V0.7
VCC = 3 V to 3.6 V0.8
VCC = 4.5 V to 5.5 V0.3 × V
VCC = 1.65 V–4
VCC = 2.3 V–8
=
CC
VCC = 4.5 V–32
VCC = 1.65 V4
VCC = 2.3 V8
= 3
CC
VCC = 4.5 V32
CC
CC
CC
–16
–24
16
24
CC
CC
†
V
mA
mA
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
V
MIN
TYP†MAX
UNIT
Positi
t
age
V
threshold voltage
N
t
age
V
threshold voltage
Hyst
(
)
V
(V
T+
V
T
)
V
V
3 V
V
V
3 V
(INPUT)
(OUTPUT)
SN74LVC1G14
SINGLE SCHMITT-TRIGGER INVERTER
SCES218C – APRIL 1999 – REVISED FEBRUARY 2000
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CC
1.65 V
V
T+
ve-going inpu
threshold volt
V
egative-going inpu
threshold volt
∆V
V
I
I
I
off
I
CC
∆I
CC
C
†
All typical values are at VCC = 3.3 V, TA = 25°C.
T–
T
eresis
– V
OH
OL
i
p
p
–
–
IOH = –100 µA1.65 V to 4.5 VVCC–0.2
IOH = –4 mA1.65 V1.2
IOH = –8 mA2.3 V1.7
IOH = –16 mA
IOH = –24 mA
IOH = –32 mA4.5 V2.2
IOL = 100 µA1.65 V to 4.5 V0.2
IOL = 4 mA1.65 V0.45
IOL = 8 mA2.3 V0.7
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA4.5 V0.55
VI = 5.5 V or GND0 to 5.5 V±5µA
VI or VO = 5.5 V0±10µA
VI = 5.5 V or GND,IO = 01.65 V to 5.5 V10µA
One input at VCC – 0.6 V,Other inputs at VCC or GND3 V to 5.5 V500
VI = VCC or GND0pF
2.3 V
3 V
4.5 V
1.65 V
2.3 V
3 V
4.5 V
1.65 V
2.3 V
3 V
4.5 V
2.4
2.4
0.4
0.55
m
A
PRODUCT PREVIEW
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 4)
PARAMETER
FROM
t
pd
A
TO
Y
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
VCC = 1.8 V
± 0.15 V
MINMAXMINMAXMINMAXMINMAX
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
UNIT
ns
3
SN74LVC1G14
PARAMETER
TEST CONDITIONS
UNIT
SINGLE SCHMITT-TRIGGER INVERTER
SCES218C – APRIL 1999 – REVISED FEBRUARY 2000
operating characteristics, T
C
Power dissipation capacitancef = 10 MHzpF
pd
A
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
Timing
Input
t
su
Data
Input
PRODUCT PREVIEW
Input
Output
t
PLH
VCC/2
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC/2VCC/2
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1 kΩ
1 kΩ
VCC/2
t
h
VCC/2VCC/2
= 25°C
VCC/2
S1
= 1.8 V ± 0.15 V
V
CC
2 × V
CC
Open
GND
V
CC
0 V
V
CC
0 V
V
CC
0 V
t
PHL
V
OH
V
OL
VCC = 1.8 V VCC = 2.5 V VCC = 3.3 VVCC = 5 V
TYPTYPTYPTYP
TESTS1
t
VCC/2
w
Open
2 × V
GND
CC
VCC/2VCC/2
VCC/2VCC/2
t
PLZ
VOL + 0.15 V
t
PHZ
VOH – 0.15 V
Input
Output
Control
Output
Waveform 1
S1 at 2 × V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
VOLTAGE WAVEFORMS
PULSE DURATION
t
PZL
CC
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VCC/2
V
0 V
V
0 V
V
V
V
0 V
CC
CC
CC
OL
OH
NOTES: A. CL includes probe and jig capacitance.
4
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
F. t
G. t
PLZ
PZL
PLH
and t
and t
and t
are the same as t
PHZ
are the same as ten.
PZH
are the same as tpd.
PHL
dis
.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
CL = 30 pF
(see Note A)
SINGLE SCHMITT-TRIGGER INVERTER
SCES218C – APRIL 1999 – REVISED FEBRUARY 2000
PARAMETER MEASUREMENT INFORMATION
= 2.5 V ± 0.2 V
V
CC
2 × V
Open
GND
CC
TESTS1
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
500 Ω
500 Ω
S1
SN74LVC1G14
Open
2 × V
CC
GND
LOAD CIRCUIT
Timing
Input
t
Data
Input
Input
t
PLH
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
PLZ
F. t
PZL
G. t
PLH
VCC/2
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC/2VCC/2
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
and t
PHZ
and t
PZH
and t
PHL
VCC/2
t
su
are the same as t
are the same as ten.
are the same as tpd.
h
VCC/2
VCC/2VCC/2
.
dis
t
PHL
V
0 V
V
0 V
V
0 V
V
V
CC
CC
CC
OH
OL
Input
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PULSE DURATION
t
PZL
CC
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VCC/2
VCC/2
t
w
V
0 V
V
0 V
V
V
V
0 V
CC
CC
CC
OL
OH
VCC/2VCC/2
VCC/2VCC/2
t
PLZ
VOL + 0.15 V
t
PHZ
VOH – 0.15 V
PRODUCT PREVIEW
Figure 2. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN74LVC1G14
SINGLE SCHMITT-TRIGGER INVERTER
SCES218C – APRIL 1999 – REVISED FEBRUARY 2000
PARAMETER MEASUREMENT INFORMATION
V
= 3.3 V ± 0.3 V
CC
From Output
Under Test
CL = 50 pF
(see Note A)
Timing
Input
Data
Input
Input
t
PLH
Output
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V1.5 V
500 Ω
500 Ω
LOAD CIRCUIT
1.5 V
t
su
1.5 V1.5 V
1.5 V1.5 V
PRODUCT PREVIEW
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
6 V
S1
t
h
t
PHL
Open
GND
3 V
0 V
3 V
0 V
3 V
0 V
V
V
OH
OL
Input
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
TESTS1
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
1.5 V1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
PZL
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
t
w
1.5 V
1.5 V
Open
6 V
GND
1.5 V1.5 V
t
PLZ
VOL + 0.3 V
t
PHZ
VOH – 0.3 V
3 V
0 V
3 V
0 V
3 V
V
V
0 V
OL
OH
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
F. t
G. t
PLZ
PZL
PLH
and t
and t
and t
are the same as t
PHZ
are the same as ten.
PZH
are the same as tpd.
PHL
dis
Figure 3. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
.
From Output
Under Test
Input
CL = 50 pF
(see Note A)
PARAMETER MEASUREMENT INFORMATION
500 Ω
500 Ω
LOAD CIRCUIT
t
w
VCC/2VCC/2
VOLTAGE WAVEFORMS
PULSE DURATION
S1
= 5 V ± 0.5 V
V
CC
11 V
Open
GND
V
CC
0 V
SINGLE SCHMITT-TRIGGER INVERTER
Timing Input
Data Input
SN74LVC1G14
SCES218C – APRIL 1999 – REVISED FEBRUARY 2000
TESTS1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
t
su
VCC/2
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Open
11 V
GND
VCC/2
t
h
VCC/2
V
0 V
V
0 V
CC
CC
Input
t
PLH
Output
t
PHL
Output
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
PLZ
F. t
PZL
G. t
PLH
VCC/2
VCC/2VCC/2
VCC/2
VOLTAGE WAVEFORMS
and t
and t
and t
are the same as t
PHZ
are the same as ten.
PZH
are the same as tpd.
PHL
VCC/2
t
PHL
t
VCC/2
.
dis
PLH
Figure 4. Load Circuit and Voltage Waveforms
V
0 V
V
V
V
V
CC
OH
OL
OH
OL
Output
Control
Output
Waveform 1
S1 at 11 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
VCC/2VCC/2
t
PZL
VCC/2
t
PZH
VCC/2
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
VOL + 0.3 V
VOH – 0.3 V
t
PLZ
t
PHZ
V
CC
0 V
5.5 V
V
OL
V
OH
≈ 0 V
PRODUCT PREVIEW
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCTOR PRODUCTS MA Y INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
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