Texas Instruments SN74AHC04DBR, SN74AHC04DGVR, SN74AHC04DR, SN74AHC04N, SN74AHC04PWLE Datasheet

SN54AHC04, SN74AHC04

HEX INVERTERS

SCLS231J – OCTOBER 1995 – REVISED JANUARY 2000

D

EPIC

 (Enhanced-Performance Implanted

CMOS) Process

D

Operating Range 2-V to 5.5-V V

D

Latch-Up Performance Exceeds 250 mA Per

CC

JESD 17

D

ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)

D

Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), Thin
Shrink Small-Outline (PW), and Ceramic
Flat (W) Packages, Ceramic Chip Carriers
(FK), and Standard Plastic (N) and Ceramic
(J) DIPs

description

The ’AHC04 devices contain six independent
inverters. These devices perform the Boolean
function Y = A

The SN54AHC04 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74AHC04 is characterized for
operation from –40°C to 85°C.

.

FUNCTION TABLE

(each inverter)

INPUTAOUTPUT

Y

H L

L H

SN54AHC04 ...J OR W PACKAGE

SN74AHC04 . . . D, DB, DGV, N, OR PW PACKAGE

SN54AHC04 . . . FK PACKAGE

2A

NC

2Y

NC

3A

NC – No internal connection

(TOP VIEW)

1A

1

1Y

2

2A

3

2Y

4

3A

5
6

3Y

7

GND

(TOP VIEW)

1Y1ANC

3212019

4
5
6
7
8

910111213

3Y

GND

NC

14
13
12
11
10

9
8

CC

V

4Y

V
6A
6Y
5A
5Y
4A
4Y

6A

18
17
16
15
14

4A

CC

6Y
NC
5A
NC
5Y

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

†

1

1A

3

2A 2Y

5

3A 3Y

9

4A 4Y

11

5A 5Y

13

6A 6Y

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

2

1Y

4
6

8
10
12

Copyright  2000, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

1

SN54AHC04, SN74AHC04

UNIT

mA

mA

∆t/∆vInput transition rise or fall rate

ns/V

HEX INVERTERS

SCLS231J – OCTOBER 1995 – REVISED JANUARY 2000

logic diagram, each inverter (positive logic)

YA

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Note 1) –0.5 V to V
Input clamp current, I
Output clamp current, I
Continuous output current, I

(V

< 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

I

(V

OK

< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(V

= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

O

CC

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51.

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

recommended operating conditions (see Note 3)

SN54AHC04 SN74AHC04

MIN MAX MIN MAX

V

V

V

V
V

I

OH

I

OL

T

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Supply voltage 2 5.5 2 5.5 V

CC

VCC = 2 V 1.5 1.5

High-level input voltage

IH

Low-level input voltage

IL

Input voltage 0 5.5 0 5.5 V

I

Output voltage 0 V

O

High-level output current

Low-level output current

p

Operating free-air temperature –55 125 –40 85 °C

A

Implications of Slow or Floating CMOS Inputs

, literature number SCBA004.

VCC = 3 V
VCC = 5.5 V 3.85 3.85
VCC = 2 V 0.5 0.5
VCC = 3 V
VCC = 5.5 V 1.65 1.65

VCC = 2 V –50 –50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V –8 –8
VCC = 2 V 50 50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V 8 8
VCC = 3.3 V ± 0.3 V 100 100
VCC = 5 V ± 0.5 V 20 20

2.1 2.1

0.9 0.9

CC

–4 –4

4 4

0 V

CC

V

V

V

m

A

m

A

2

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PARAMETER

TEST CONDITIONS

V

UNIT

OH

OL

PARAMETER

UNIT

A

Y

C

15 pF

ns

A

Y

C

pF

ns

PARAMETER

UNIT

A

Y

C

pF

ns

A

Y

C

pF

ns

SN54AHC04, SN74AHC04

HEX INVERTERS

SCLS231J – OCTOBER 1995 – REVISED JANUARY 2000

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

CC

2 V 1.9 2 1.9 1.9

IOH = –50 mA

V

OH

IOH = –4 mA
IOH = –8 mA

IOL = 50 mA

V

OL

IOL = 4 mA
IOL = 8 mA

I

I

I

CC

C

i

* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.

VI = VCC or GND 0 V to 5.5 V ±0.1 ±1* ±1
VI = VCC or GND, IO = 0 5.5 V 2 20 20
VI = VCC or GND 5 V 2 10 10 pF

3 V 2.9 3 2.9 2.9

4.5 V 4.4 4.5 4.4 4.4
3 V 2.58 2.48 2.48

4.5 V 3.94 3.8 3.8
2 V 0.1 0.1 0.1
3 V 0.1 0.1 0.1

4.5 V 0.1 0.1 0.1
3 V 0.36 0.5 0.44

4.5 V 0.36 0.5 0.44

TA = 25°C SN54AHC04 SN74AHC04

MIN TYP MAX MIN MAX MIN MAX

V

V

m

A

m

A

switching characteristics over recommended operating free-air temperature range,

= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)

V

CC

FROM TO LOAD

(INPUT) (OUTPUT) CAPACITANCE

t

PLH

t

PHL

t

PLH

t

PHL

** On products compliant to MIL-PRF-38535, this parameter is not production tested.

=

L

= 50

L

p

p

TA = 25°C SN54AHC04 SN74AHC04

MIN TYP MAX MIN MAX MIN MAX

5** 8.9** 1** 10.5** 1 10.5
5** 8.9** 1** 10.5** 1 10.5

7.5 11.4 1 13 1 13

7.5 11.4 1 13 1 13

switching characteristics over recommended operating free-air temperature range,

= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

V

CC

FROM TO LOAD

(INPUT) (OUTPUT) CAPACITANCE

t

PLH

t

PHL

t

PLH

t

PHL

** On products compliant to MIL-PRF-38535, this parameter is not production tested.

= 15

L

= 50

L

p

p

TA = 25°C SN54AHC04 SN74AHC04

MIN TYP MAX MIN MAX MIN MAX

3.8** 5.5** 1** 6.5** 1 6.5

3.8** 5.5** 1** 6.5** 1 6.5

5.3 7.5 1 8.5 1 8.5

5.3 7.5 1 8.5 1 8.5

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SN54AHC04, SN74AHC04

PARAMETER

UNIT

HEX INVERTERS

SCLS231J – OCTOBER 1995 – REVISED JANUARY 2000

noise characteristics, V

V

OL(P)

V

OL(V)

V

OH(V)

V

IH(D)

V

IL(D)

NOTE 4: Characteristics are for surface-mount packages only.

Quiet output, maximum dynamic V
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage 3.5 V
Low-level dynamic input voltage 1.5 V

operating characteristics, V

C

Power dissipation capacitance No load, f = 1 MHz 12 pF

pd

= 5 V, CL = 50 pF, TA = 25°C (see Note 4)

CC

OL
OL
OH

= 5 V, TA = 25°C

CC

PARAMETER TEST CONDITIONS TYP UNIT

SN74AHC04

MIN TYP MAX

0.4 V

–0.4 V

4.8 V

4

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From Output

Under Test

(see Note A)

SN54AHC04, SN74AHC04

HEX INVERTERS

SCLS231J – OCTOBER 1995 – REVISED JANUARY 2000

PARAMETER MEASUREMENT INFORMATION

V

Test
Point

C

L

From Output

Under Test

C

(see Note A)

RL = 1 kΩ

L

S1

CC

Open

GND

TEST S1

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open Drain

Open

V

CC

GND
V

CC

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

Input

VOLTAGE WAVEFORMS

Input

t

PLH

In-Phase

Output

t

PHL

Out-of-Phase

Output

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

t

w

50% V

CC

PULSE DURATION

50% V

CC

50% V

50% V

3-STATE AND OPEN-DRAIN OUTPUTS

50% V

50% V

CC

CC

LOAD CIRCUIT FOR

V

CC

CC

0 V

V

CC

CC

t

PHL

50% V

t

PLH

50% V

CC

CC

0 V

V

V

V

V

OH

OL

OH

OL

Timing Input

Waveform 1

(see Note B)

Waveform 2

(see Note B)

Data Input

Output

Control

Output

S1 at V

CC

Output

S1 at GND

50% V

CC

t

CC

CC

h

50% V

50% V

VOL + 0.3 V

VOH – 0.3 V

CC

t

t

t

su

50% V

CC

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

50% V

CC

t

PZL

50% V

t

PZH

50% V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

CC

PLZ

PHZ

V

CC

0 V

V

CC

0 V

V

CC

0 V

≈V

V

OL

V

OH

≈0 V

CC

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

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5

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Copyright  2000, Texas Instruments Incorporated