Texas Instruments SN74ACT7808-30PM, SN74ACT7808-40FN, SN74ACT7808-40PAG, SN74ACT7808-40PM, SN74ACT7808-20FN Datasheet
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SN74ACT7808
2048 × 9 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS205D – FEBRUARY 1991 – REVISED APRIL 1998
D
Load Clocks and Unload Clocks Can Be
Asynchronous or Coincident
D
2048 Words by 9 Bits
D
Low-Power Advanced CMOS Technology
D
Fast Access Times of 15 ns With a 50-pF
Load
D
Programmable Almost-Full/Almost-Empty
Flag
description
A FIFO memory is a storage device that allows data to be written into and read from its array at independent
data rates. The SN74ACT7808 is a 2048-word by 9-bit FIFO designed for high speed and fast access times.
It processes data at rates up to 50 MHz and access times of 15 ns in a bit-parallel format.
Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a
low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked
in exceeds the number of words clocked out by 2048. When the memory is full, LDCK signals have no effect
on the data residing in memory. When the memory is empty, UNCK signals have no effect.
D
Expansion Logic for Depth Cascading
D
Empty, Full, and Half-Full Flags
D
Fall-Through Time of 20 ns Typical
D
Data Rates up to 50 MHz
D
3-State Outputs
D
Package Options Include 44-Pin Plastic
Leaded Chip Carrier (FN), 64-Pin Thin Quad
Flat (PM), and Reduced-Height 64-Pin Quad
Flat (PAG) Packages
Status of the FIFO memory is monitored by the full (FULL
almost-full/almost-empty (AF/AE) flags. The FULL
memory is not full. The EMPTY
output is high when the FIFO contains 1024 or more words and is low when it contains 1023 or fewer words.
The AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset
can be used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable
(PEN
) is low. The AF/AE flag is high when the FIFO contains X or fewer words or (2048 – Y) or more words.
The AF/AE flag is low when the FIFO contains between (X + 1) and (2047 – Y) words.
A low level on the reset (RESET
low, and EMPTY
The first word loaded into empty memory causes EMPTY
It is important to note that the first word does not have to be unloaded. Data outputs are noninverting with respect
to the data inputs and are in the high-impedance state when the output-enable (OE) input is low. OE does not
affect the output flags.
Cascading is easily accomplished in the word-width and word-depth directions. When not using the FIFO in
depth expansion, cascade enable (CASEN
The FIFO must be reset upon power up.
The SN74ACT7808 is characterized for operation from 0°C to 70°C.
low. The Q outputs are not reset to any specific logic level.
output is low when the memory is empty and high when it is not empty . The HF
) input resets the internal stack pointers and sets FULL high, AF/AE high, HF
) must be tied high.
output is low when the memory is full and high when the
to go high and the data to appear on the Q outputs.
), empty (EMPTY), half-full (HF), and
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1998, Texas Instruments Incorporated
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SN74ACT7808
2048 × 9 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS205D – FEBRUARY 1991 – REVISED APRIL 1998
FN PACKAGE
(TOP VIEW)
NC
Q0
GND
GND
OE
XO
V
CC
V
CC
RESET
PEN
GND
GND
AF/AE
HF
V
CC
V
CC
CC
HF
AF/AE
GND
D0
D1
D2
GND
D3
D4
D5
V
CC
D6
D7
D8
V
6 5 4 3 2 1 44 43 42 41 40
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
XI
DP9
GND
LDCK
PAG OR PM PACKAGE
(TOP VIEW)
CCVCC
V
Q1
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18 19 20 21 22 23 24 25 26 27 2817 29 30 31 32
Q2
GND
GNDQ3Q4
PEN
RESET
FULL
EMPTY
V
VCCV
CC
FL
XOOEGND
UNCK
CASEN
CC
Q5
Q6
Q0
39
38
37
36
35
34
33
32
31
30
29
Q8
GND
GND
Q7
Q1
V
CC
Q2
Q3
GND
Q4
V
CC
Q5
Q6
GND
Q7
NC
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
NC
Q8
V
CC
V
CC
UNCK
CASEN
NC
FL
EMPTY
FULL
XI
DP9
LDCK
GND
GND
NC
D1
NC
NC – No internal connection
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
GND
D2
D0
GND
D3
D4
NC
D5
V
CC
D8
D6
D7
CC
V
NC
SN74ACT7808
2048 × 9 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS205D – FEBRUARY 1991 – REVISED APRIL 1998
logic symbol
†
RESET
LDCK
UNCK
CASEN CASCADE ENABLE
1
19
26
42
OE
2
PEN PROGRAM ENABLE
24
FL FIRST LOAD
25
21
XI
20
DP9
7
D0
8
D1
9
D2
11
D3
12
D4
13
D5
15
D6
16
D7
17
D8
RESET
LDCK
UNCK
EN1
EXPANSION IN
DATA PIN 9
0
8
Φ
FIFO 2048 × 9
SN74ACT7808
ALMOST FULL/EMPTY
EXPANSION OUT
Data
HALF FULL
Data
FULL
EMPTY
1
22
FULL
5
HF
4
AF/AE
23
EMPTY
43
XO
40
0
8
39
37
36
34
32
31
29
28
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the FN package.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN74ACT7808
2048 × 9 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS205D – FEBRUARY 1991 – REVISED APRIL 1998
functional block diagram
OE
D0–D8
UNCK
Read
Pointer
Location 1
Location 2
2048 × 9 RAM
LDCK
DP9
RESET
PEN
FL
CASEN
Write
Pointer
Reset
Logic
Expansion
and
Status-Flag
Logic
XI
Location 2047
Location 2048
Q0–Q8
EMPTY
FULL
HF
AF/AE
XO
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
of one device must be connected to the XI of the next device in the chain. The XO of the last device in the chain is
SN74ACT7808
2048 × 9 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS205D – FEBRUARY 1991 – REVISED APRIL 1998
Terminal Functions
TERMINAL
NAME
AF/AE O
CASEN
D0–D8 I Nine-bit data input port
DP9 I DP9 is used as the most significant bit when programming the AF/AE offset values.
EMPTY O Empty flag. EMPTY is low when the FIFO memory is empty. A FIFO reset also causes EMPTY to go low.
†
FL
FULL O Full flag. FULL is low when the FIFO is full. A FIFO reset causes FULL to go high.
HF O Half-full flag. HF is high when the FIFO memory contains 1024 or more words. HF is low after reset.
LDCK I Load clock. Data is written to the FIFO on the rising edge of LDCK when FULL is high.
OE I Output enable. When OE is low, D0–D8 are in the high-impedance state.
PEN I
Q0–Q8 O Nine-bit data output port
RESET I Reset. A low level on RESET resets the FIFO and drives FULL and AF/AE high and HF and EMPTY low.
UNCK I Unload clock. Data is read from the FIFO on the rising edge of UNCK when EMPTY is high.
†
XI
†
XO
†
See Figures 6 and 7 for application information on FIFO word-width and word-depth expansions, respectively.
I/O DESCRIPTION
Almost-full/almost-empty flag. Depth-offset values can be programmed for AF/AE or the default value of 256 can be
used for both the almost-empty offset (X) and the almost-full offset (Y). AF/AE is high when memory contains X or fewer
words or (2048 – Y) or more words. AF/AE is high after reset.
†
Cascade enable. When multiple SN74ACT7808 devices are depth cascaded, every device must have CASEN tied low.
I
CASEN
must be tied high when a device is not used in depth expansion.
First load. When multiple SN74ACT7808 devices are depth cascaded, the first device in the chain must have its FL
I
input tied low and all other devices must have their FL inputs tied high.
Program enable. After reset and before the first word is written to the FIFO, the binary value on D0–D8 and DP9 is
latched as an AF/AE offset value when PEN
Expansion input (XI) and expansion output (XO). When multiple SN74ACT7808 devices are depth cascaded, the XO
I
O
connected to the XI of the first device in the chain.
is low and LDCK is high.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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