This is the user’s guide for the SN65LVDS387EVM and SN65LVDS386 evaluation modules (EVMs). It contains information on the evaluation modules
(EVMs) for T exas Instruments’ SN65L VDS387 16-channel LVDS driver and for
the SN65L VDS386 16-channel LVDS receiver.
Two separate EVMs are available, allowing each LVDS device to be tested
individually using a single EVM for that device. If both EVMs are used, the
LVDS output signals from the SN65LVDS387EVM 16-channel LVDS driver
can be connected to the L VDS inputs of the 16-channel L VDS receiver on the
SN65LVDS386EVM. This allows users to simulate performance of an LVDS
system. Recommended test equipment and evaluation and interconnect
guidelines are provided for both 16-channel point-to-point and multidrop
configurations. The EVMs are CE compliant for distribution within the
European Community.
How to Use This Manual
This document contains the following chapters:
Chapter 1 – Introduction
Chapter 2 – The Evaluation Boards
Chapter 3 – Equipment Required
Chapter 4 – Operation
Appendix A – Parts List and Schematics
Trademarks
BergStick is a registered trademark of Berg Electronics. All other trademarks
are the property of their respective owners.
This is the user’s guide for the evaluation modules (EVMs) for the Texas Instruments’ SN65LVDS387EVM 16-channel LVDS driver EVM and the
SN65L VDS386EVM 16-channel LVDS receiver EVM. One manual is used for
both EVMs because the boards are similar for both devices. The EVMs are
CE-compliant for distribution within the European Community.
Low-voltage differential signaling (LVDS), as documented in TIA/EIA-644, is
a balanced signaling method used for high-speed transmission of binary data
over copper. It is well recognized that the benefits of balanced-data transmission begin to outweigh the cost advantages of single-ended techniques when
signal-transition times approach 10 nS. This represents signaling rates approaching 30 Megabits per second (Mbps) Presently, LVDS devices operate
with signaling rates in the hundreds of Mbps. This performance is achieved
with reduced power consumption and reduced electromagnetic interference
(EMI) emissions compared to other data transmission standards, such as
TIA/EIA–422 and TIA/EIA–232 (also known as RS–232 and RS–422, respectively), PECL, etc. Project collateral discussed in this user’s guide can be
downloaded from the following URL: http://www.ti.com/lit/zip/SLLU013.
Note: T o Designers
Both EVMs use the same printed-wiring board (PWB). The 387 device is
mounted with the device’s pin 1 facing the top of the PWB, and the 386 is
mounted with the device’s pin 1 facing the bottom of the PWB.
Introduction
1-1
Chapter 2
The Evaluation Boards
Each EVM consists of a six-layer printed-wiring board (PWB). The LVDS
device and BergStick connectors are on the top (connector side) of the
board. All other passive components are installed on the underside
(component side) of the PWB. A simplified input/output (I/O) block diagram of
the EVM is shown in Figure 2–1.
The SN65LVDS387EVM and the SN65LVDS386EVM are discussed in sections 2.1 and 2.2. Use of the schematics in Appendix A will facilitate understanding the detailed discussion that follows.
A4Y
A4Z
D1Y
LVDS Receiver
(1 of 4)
L VDS386EVM
D1B
D1A
2-2
SN65LVDS387 16-Channel LVDS Line Driver
2.1SN65LVDS387 16-Channel LVDS Line Driver
This 16-channel L VDS driver accepts 16 low-voltage TTL (L VTTL) inputs and
generates 16 LVDS differential outputs (please refer to the schematic in
Appendix I). Connectors P1/P2 are the L VTTL I/O connectors. Connectors P3
through P7 are the L VDS I/O connectors. The LVTTL inputs can be provided
by any suitable source. As shipped, the SN65LVDS387EVM has 50-Ω
termination resistors (R33 through R48) installed on each L VTTL input line to
accommodate inputs from a pattern generator or other instrumentation that
has a 50-Ω source impedance. If the LVTTL source and cable being used is
not a 50-Ω source, then these resistors (resistors R33 through R48) need to
be removed. They are required to match the characteristic impedance of the
cable (and the source impedance of most pattern generators). These resistors
are located on the back (under) side of the SN65LVDS386EVM, next to the
P1/P2 connector row.
The other optional components are resistors R1 through R32. Resistors R1
through R16 are left open on the SN65L VDS387EVM. These are used in the
L VDS output circuit and, since L VDS lines are normally terminated at the input
to the receiver, these 100-Ω resistors are not installed on the EVM. If users
want to measure specific performance parameters on the ’387, then they are
responsible for installing 100-ohm resistors in R1 through R16. Zero-ohm
resistors are installed in R17 through R32, which are in series with the L VTTL
inputs to the SN65LVDS387. The remaining components are connectors for
Vcc and Gnd connections, and decoupling capacitors for the LVDS device.
These components are the same for both configurations of the EVM.
There are also four jumpers (JMP1 through JMP4 ) located next to the P1/P2
connector row. These jumpers control the enable and disable for each fourchannel (quad) section of the device. Each of these jumpers consist of three
pins and a jumper short. The center pin is connected to the device and the outer pins (top and bottom) are V
and GND. The jumper short can be moved
CC
so contact is made between VCC and the enable/disable pin, or between GND
and the enable/disable pin. As shipped, the four jumper shorts are installed to
VCC so that all four sections of the device are enabled. A photograph of the
SN65LVDS387EVM is shown is Figure 2–2.
The Evaluation Boards
2-3
Loading...
+ 16 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.