Low-Voltage Differential Signaling With
Typical Output Voltages of 350 mV and a
100-Ω Load
D
Propagation Delay Times, 1.7 ns Typical
D
Power Dissipation at 200 MHz, 25 mW
Typical
D
LVTTL Level is 5-V Tolerant
D
Driver is High Impedance With V
CC
description
The SN65L VDS1 is a single low-voltage dif ferential line driver in the small-outline transistor
package. The outputs comply with the TIA/
EIA-644 standard and provide a minimum
differential output voltage magnitude of 247 mV
into a 100-Ω load at signaling rates up to
630 Mbps.
< 1.5 V
logic diagram
SN65LVDS1
DBV PACKAGE
(TOP VIEW)
1
V
CC
GND
D
Z
5
5
2
3
4
4
Y
3
Z
Function Table
INPUTOUTPUTS
D
H
L
Open
YZ
H
L
L
D
Y
L
H
H
When used with an LVDS receiver (such as the SN65LVDT2) in a point-to-point connection; data or clocking
signals can be transmitted over printed-circuit board traces or cables at very high rates with very low
electromagnetic emissions and power consumption. The packaging, low power, low EMI, high ESD tolerance,
and wide supply voltage range make this device ideal for battery-powered applications.
The SN65LVDS1 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
SN65LVDS1
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
equivalent input and output schematic diagrams
V
CC
V
CC
D Input
50 Ω
7 V
300 kΩ
10 kΩ
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 250°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages are with respect to network ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7.
PACKAGE
DBV385 mW3.1 mW/°C200 mW
†
This is the inverse of the junction-to-ambient thermal resistance when board-mounted (low-K) and with
no air flow.
TA ≤ 25°C
POWER RATING
recommended operating conditions
Supply voltage, V
High-level input voltage, V
Low-level input voltage, V
Operating free–air temperature, T
2
CC
IH
IL
A
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DISSIPATION RATING TABLE
DERATING FACTOR
ABOVE TA = 25°C
†
TA = 85°C
POWER RATING
MINNOMMAXUNIT
2.43.33.6V
2V
0.8V
–4085°C
SN65LVDS1
R
100Ω
ICCSupply current
mA
IOSShort-circuit output current
mA
R
L
100Ω
R
L
100Ω
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYP†MAXUNIT
VODDifferential output voltage magnitude
∆VOD
V
OC(SS)
∆V
OC(SS)
V
OC(PP)
I
IH
I
IL
I
O(OFF)
C
IN
†
All typical values are at 25°C and with a 3.3-V.
Change in differential output voltage magnitude between logic
states
Steady-state common-mode output voltage1.1251.375V
Change in steady-state common-mode output voltage between
logic states
Peak-to-peak common-mode output voltage25100mV
switching characteristics over recommended operating conditions, VCC = 3 V to 3.6 V (unless
otherwise noted)
PARAMETERTEST CONDITIONSMINTYP‡MAXUNIT
t
PLH
t
PHL
t
r
t
f
t
sk(p)
‡
All typical values are at 25°C and with a 3.3-V.
§
t
sk(p)
Propagation delay time, low-to-high-level output1.52.7ns
Propagation delay time, high-to-low-level output
Differential output signal rise time
Differential output signal fall time
Pulse skew (|t
is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
pHL
– t
pLH
§
|)
=
=
CL = 10 pF,
See Figure 3
,
1.82.7ns
0.61ns
0.71ns
0.3ns
switching characteristics over recommended operating conditions, VCC = 2.4 to 2.7 V (unless
otherwise noted)
PARAMETERTEST CONDITIONSMINTYP‡MAXUNIT
t
PLH
t
PHL
t
r
t
f
t
sk(p)
‡
All typical values are at 25°C and with a 3.3-V.
§
t
sk(p)
Propagation delay time, low-to-high-level output1.73.1ns
Propagation delay time, high-to-low-level output
Differential output signal rise time
Differential output signal fall time
Pulse skew (|t
is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
pHL
– t
pLH
§
|)
=
=
CL = 10 pF,
See Figure 3
,
23.1ns
0.61ns
0.71ns
0.3ns
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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