Texas Instruments SN65LVDS1DBVR, SN65LVDS1DBVT Datasheet

SN65LVDS1
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
D
Meets or Exceeds ANSI TIA/EIA-644-1995 Standard
D
D
Operates From a 2.4-V to 3.6-V Supply
D
Package in Small-Outline Transistor Package
D
Bus-T erminal ESD Exceeds 15 kV
D
Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 100- Load
D
Propagation Delay Times, 1.7 ns Typical
D
Power Dissipation at 200 MHz, 25 mW Typical
D
LVTTL Level is 5-V Tolerant
D
Driver is High Impedance With V
CC
description
The SN65L VDS1 is a single low-voltage dif feren­tial line driver in the small-outline transistor package. The outputs comply with the TIA/ EIA-644 standard and provide a minimum differential output voltage magnitude of 247 mV into a 100- load at signaling rates up to 630 Mbps.
< 1.5 V
logic diagram
SN65LVDS1
DBV PACKAGE
(TOP VIEW)
1
V
CC
GND
D
Z
5
5
2
3
4
4
Y
3
Z
Function Table
INPUT OUTPUTS
D H
L
Open
YZ H
L L
D
Y
L H H
When used with an LVDS receiver (such as the SN65LVDT2) in a point-to-point connection; data or clocking signals can be transmitted over printed-circuit board traces or cables at very high rates with very low electromagnetic emissions and power consumption. The packaging, low power, low EMI, high ESD tolerance, and wide supply voltage range make this device ideal for battery-powered applications.
The SN65LVDS1 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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Copyright 1999, Texas Instruments Incorporated
1
SN65LVDS1 HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
equivalent input and output schematic diagrams
V
CC
V
CC
D Input
50
7 V
300 k
10 k
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
5
Y or Z Output
7 V
Supply voltage range, VCC (see Note 1) –0.5 V to 4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range (D) –0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(Y or Z) –0.5 V to 4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic discharge: Y, Z, and GND (see Note 2) CLass 3, A:15 kV, B:600 V. . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 250°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages are with respect to network ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7.
PACKAGE
DBV 385 mW 3.1 mW/°C 200 mW
This is the inverse of the junction-to-ambient thermal resistance when board-mounted (low-K) and with no air flow.
TA 25°C
POWER RATING
recommended operating conditions
Supply voltage, V High-level input voltage, V Low-level input voltage, V Operating free–air temperature, T
2
CC
IH
IL
A
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DISSIPATION RATING TABLE
DERATING FACTOR
ABOVE TA = 25°C
TA = 85°C
POWER RATING
MIN NOM MAX UNIT
2.4 3.3 3.6 V 2 V
0.8 V
–40 85 °C
SN65LVDS1
R
100
ICCSupply current
mA
IOSShort-circuit output current
mA
R
L
100
R
L
100
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VOD Differential output voltage magnitude
VOD V
OC(SS)
V
OC(SS)
V
OC(PP)
I
IH
I
IL
I
O(OFF)
C
IN
All typical values are at 25°C and with a 3.3-V.
Change in differential output voltage magnitude between logic states
Steady-state common-mode output voltage 1.125 1.375 V Change in steady-state common-mode output voltage between
logic states Peak-to-peak common-mode output voltage 25 100 mV
pp
High-level input current VIH = 5 V 2 20 µA Low-level input current VIL = 0.8 V 2 10 µA
p
Power-off output current VCC = 0 V, VO = 3.6 V ±1 µA Input capacitance 3 pF
=
L
See Figure 1
See Figure 2
VI = 0 V or VCC, No load
VI = 0 V or VCC, RL = 100
VOY or VOZ = 0 V 3 10 VOD = 0 V 10
,
247 350 454 –50 50
–50 50 mV
2 4
5.5 8
mV
switching characteristics over recommended operating conditions, VCC = 3 V to 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP‡MAX UNIT
t
PLH
t
PHL
t
r
t
f
t
sk(p)
All typical values are at 25°C and with a 3.3-V.
§
t
sk(p)
Propagation delay time, low-to-high-level output 1.5 2.7 ns Propagation delay time, high-to-low-level output Differential output signal rise time Differential output signal fall time Pulse skew (|t
is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
pHL
– t
pLH
§
|)
=
= CL = 10 pF, See Figure 3
,
1.8 2.7 ns
0.6 1 ns
0.7 1 ns
0.3 ns
switching characteristics over recommended operating conditions, VCC = 2.4 to 2.7 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP‡MAX UNIT
t
PLH
t
PHL
t
r
t
f
t
sk(p)
All typical values are at 25°C and with a 3.3-V.
§
t
sk(p)
Propagation delay time, low-to-high-level output 1.7 3.1 ns Propagation delay time, high-to-low-level output Differential output signal rise time Differential output signal fall time Pulse skew (|t
is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
pHL
– t
pLH
§
|)
=
= CL = 10 pF, See Figure 3
,
2 3.1 ns
0.6 1 ns
0.7 1 ns
0.3 ns
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3
SN65LVDS1 HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
I
I
D
V
I
Figure 1. Driver Voltage and Current Definitions
Y
Z
I
I
OY
OZ
V
OD
V
OY
V
V
OZ
OC
VOY)
V
OZ
2
49.9 , ±1% (2 Places)
Y
Input
Z
NOTE A: All input pulses are supplied by a generator having the following characteristics: tr or tf 1 ns, pulse repetition rate (PRR) = 0.5 Mpps,
pulse width = 500 ± 10 ns . CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T. The measurement of V
is made on test equipment with a –3 dB bandwidth of at least 300 MHz.
OC(PP)
50 pF
V
OC
V
I
V
I
V
OC(PP)
V
OC
1.4 V
1 V
V
OC(SS)
Figure 2. Test Circuit and Definitions for the Driver Common-Mode Output V oltage
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Input
Output
t
PLH
HIGH-SPEED DIFFERENTIAL LINE DRIVER
PARAMETER MEASUREMENT INFORMATION
Y
Input
V
OD(H)
V
OD
Z
CL = 10 pF (2 Places)
t
PHL
100 ±1%
SN65LVDS1
SLLS373B – JULY 1999 – DECEMBER 1999
2 V
1.4 V or 1.2 V (see Note B)
0.8 V
100% 80%
0 V
V
OD(L)
20% 0%
t
f
NOTES: A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps,
pulse width = 10 ± 0.2 ns . CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.
B. This point is 1.4 V with VCC = 3.3 V or 1.2 V with VCC = 2.7 V
t
r
Figure 3. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
SN65LVDS1 HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
TYPICAL CHARACTERISTICS
2.6
2.4
2.2
1.8
1.6
1.4
1.2
– High-to-Low Level Propagation Delay Time – ns
PHL
t
HIGH-TO-LOW LEVEL
PROPAGATION DELAY TIMES
vs
FREE-AIR TEMPERATURE
1.9
VCC = 2.4 V
VCC = 3 V
2
1
–20 0 40–40
TA – Free-Air Temperature – °C
20
VCC = 2.7 V
VCC = 3.3 V
VCC = 3.6 V
60 80 100
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
– Low-to-High Level Propagation Delay Time – ns
1
PLH
t
Figure 4
LOW-TO-HIGH LEVEL
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
VCC = 2.4 V
VCC = 3.6 V
VCC = 3 V
–20 0 40–40
TA – Free-Air Temperature – °C
20 60 80 100
Figure 5
VCC = 2.7 V
VCC = 3.3 V
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SN65LVDS1
HIGH-SPEED DIFFERENTIAL LINE DRIVER
SLLS373B – JULY 1999 – DECEMBER 1999
MECHANICAL INFORMATION
DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE
0,95
1,45 0,95
3,00 2,80
45
31
0,05 MIN
0,50 0,30
1,70 1,50
M
0,20
3,00 2,60
Seating Plane
0,10
0,15 NOM
Gage Plane
0°–8°
0,25
0,55 0,35
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. D. Falls within JEDEC MO-178
4073253-4/E 05/99
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
7
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Copyright 1999, Texas Instruments Incorporated
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