Texas Instruments SN64BCT240DW, SN64BCT240DWR, SN64BCT240N Datasheet

SN64BCT240
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS049A – MAY 1990 – REVISED NOVEMBER 1993
Copyright 1993, Texas Instruments Incorporated
3–1
State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers
ESD Protection Exceeds 2000 V
Per MIL-STD-883C Method 3015
High-Impedance State During Power-Up
and Power-Down
Package Options Include Plastic
Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (N)
description
This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the SN64BCT241 and SN64BCT244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE
) inputs, and complementary OE and OE inputs.
The SN64BCT240 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
The SN64BCT240 is characterized for operation from –40°C to 85°C and 0°C to 70°C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE A
Y
L H L L LH H X Z
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
1OE
1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1
GND
V
CC
2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1
DW OR N PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
SN64BCT240 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCBS049A – MAY 1990 – REVISED NOVEMBER 1993
3–2
logic symbol
logic diagram (positive logic)
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1
2
4
6
8
19
11
13
15
17 3
5
7
9
12
14
16
18
1A1
1A2
1A3
1A4
1Y1
2A1
2A2
2A3
2A4
2Y1
1Y2
1Y3
1Y4
2Y2
2Y3
2Y4
1OE
2OE
2
1A1
4
1A2
6
1A3
8
1A4
EN
1
1Y1
18
1Y2
16
1Y3
14
1Y4
12
11
2A1
13
2A2
15
2A3
17
2A4
EN
19
2Y1
9
2Y2
7
2Y3
5
2Y4
3
1OE
2OE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
– 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) – 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the disabled or power-off state, V
O
– 0.5 V to 5.5 V. . . . . . . . . . . . . . .
Voltage range applied to any output in the high state, V
O
– 0.5 V to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range – 40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range – 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input negative voltage rating may be exceeded if the input clamp current rating is observed.
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