TEXAS INSTRUMENTS SN54AHC138 Technical data
SOIC
D
AHC138
TSSOP
PW
HA138
D
Operating Range 2-V to 5.5-V V
D
Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
D
Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception
SN54AHC138 ...J OR W PACKAGE
SN74AHC138 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
A
1
2
B
3
C
4
G
2A
5
G
2B
6
G1
7
Y7
GND
8
16
15
14
13
12
11
10
V
CC
Y0
Y1
Y2
Y3
Y4
Y5
9
Y6
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
CC
SN74AHC138 . . . RGY PACKAGE
B
C
G
2A
G
2B
G1
Y7
(TOP VIEW)
116
2
3
4
5
6
7
D
D
A
89
GND
SN54AHC138, SN74AHC138
SCLS258L – DECEMBER 1995 – REVISED JUL Y 2003
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
CC
V
Y6
15
14
13
12
11
10
Y0
Y1
Y2
Y3
Y4
Y5
SN54AHC138 . . . FK PACKAGE
C
G
2A
NC
G
2B
G1
NC – No internal connection
(TOP VIEW)
BANC
3212019
4
5
6
7
8
910111213
Y7
NC
GND
CC
V
Y6
Y0
18
17
16
15
14
Y5
Y1
Y2
NC
Y3
Y4
description/ordering information
The ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing
applications that require very short propagation-delay times. In high-performance memory systems, these
decoders can be used to minimize the effects of system decoding. When employed with high-speed memories
utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are
less than the typical access time of the memory . This means that the effective system delay introduced by the
decoders is neg ligible.
ORDERING INFORMA TION
T
A
QFN – RGY Tape and reel SN74AHC138RGYR HA138
PDIP – N Tube SN74AHC138N SN74AHC138N
–40°C to 85°C
–55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
SOP – NS Tape and reel SN74AHC138NSR AHC138
SSOP – DB Tape and reel SN74AHC138DBR HA138
TVSOP – DGV Tape and reel SN74AHC138DGVR HA138
CDIP – J Tube SNJ54AHC138J SNJ54AHC138J
CFP – W Tube SNJ54AHC138W SNJ54AHC138W
LCCC – FK Tube SNJ54AHC138FK SNJ54AHC138FK
PACKAGE
–
–
†
Tube SN74AHC138D
Tape and reel SN74AHC138DR
Tube SN74AHC138PW
Tape and reel SN74AHC138PWR
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L – DECEMBER 1995 – REVISED JULY 2003
description/ordering information (continued)
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
FUNCTION TABLE
ENABLE INPUTS SELECT INPUTS OUTPUTS
G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X H X X X X H H H H H H H H
X XHXXXHHHHHHHH
L XXXXXHHHHHHHH
H LLLLLLHHHHHHH
H LLLLHHLHHHHHH
H LLLHLHHLHHHHH
H LLLHHHHHLHHHH
H LLHLLHHHHLHHH
H LLHLHHHHHHLHH
H LLHHLHHHHHHLH
H L L H H H H H H H H H H L
logic diagram (positive logic)
1
A
Select
Inputs
Enable
Inputs
2
B
3
C
4
2A
G
5
G
2B
6
G1
15
14
13
12
11
10
Y0
Y1
Y2
Y3
Data
Y4
Y5
9
Y6
7
Y7
Outputs
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
mA
mA
∆t/∆v
Input transition rise or fall rate
ns/V
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L – DECEMBER 1995 – REVISED JULY 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Output voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(see Note 1) –0.5 V to V
O
(V
< 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(V
= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
O
or GND ±75 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 2): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
CC
†
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DB package 82°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DGV package 120°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): PW package 108°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): RGY package 39°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions (see Note 4)
SN54AHC138 SN74AHC138
MIN MAX MIN MAX
V
V
V
V
V
I
OH
I
OL
T
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage 2 5.5 2 5.5 V
CC
VCC = 2 V 1.5 1.5
High-level input voltage
IH
Low-level input voltage
IL
Input voltage 0 5.5 0 5.5 V
I
Output voltage 0 V
O
High-level output current
Low-level output current
p
Operating free-air temperature –55 125 –40 85 °C
A
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
VCC = 3 V
VCC = 5.5 V 3.85 3.85
VCC = 2 V 0.5 0.5
VCC = 3 V
VCC = 5.5 V 1.65 1.65
VCC = 2 V –50 –50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V –8 –8
VCC = 2 V 50 50
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V 8 8
VCC = 3.3 V ± 0.3 V 100 100
VCC = 5 V ± 0.5 V 20 20
2.1 2.1
0.9 0.9
CC
–4 –4
4 4
0 V
CC
V
V
V
m
A
m
A
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54AHC138, SN74AHC138
PARAMETER
TEST CONDITIONS
V
UNIT
OH
OL
PARAMETER
UNIT
A, B, C
Any Y
C
15 pF
ns
G1
Any Y
C
15 pF
ns
G2A, G2B
Any Y
C
15 pF
ns
A, B, C
Any Y
C
50 pF
ns
G1
Any Y
C
50 pF
ns
G2A, G2B
Any Y
C
50 pF
ns
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L – DECEMBER 1995 – REVISED JULY 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CC
2 V 1.9 2 1.9 1.9
IOH = –50 mA
V
OH
IOH = –4 mA
IOH = –8 mA
IOL = 50 mA
V
OL
IOL = 4 mA
IOL = 8 mA
I
I
I
CC
C
i
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1
VI = VCC or GND, IO = 0 5.5 V 4 40 40
VI = VCC or GND 5 V 2 10 10 pF
3 V 2.9 3 2.9 2.9
4.5 V 4.4 4.5 4.4 4.4
3 V 2.58 2.48 2.48
4.5 V 3.94 3.8 3.8
2 V 0.1 0.1 0.1
3 V 0.1 0.1 0.1
4.5 V 0.1 0.1 0.1
3 V 0.36 0.5 0.44
4.5 V 0.36 0.5 0.44
TA = 25°C SN54AHC138 SN74AHC138
MIN TYP MAX MIN MAX MIN MAX
V
V
m
A
m
A
switching characteristics over recommended operating free-air temperature range,
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
** On products compliant to MIL-PRF-38535, this parameter is not production tested.
p
=
L
p
=
L
p
=
L
p
=
L
p
=
L
p
=
L
TA = 25°C SN54AHC138 SN74AHC138
MIN TYP MAX MIN MAX MIN MAX
8.2** 11.4** 1** 13** 1 13
8.2** 11.4** 1** 13** 1 13
8.1** 12.8** 1** 15** 1 15
8.1** 12.8** 1** 15** 1 15
8.2** 11.4** 1** 13.5** 1 13.5
8.2** 11.4** 1** 13.5** 1 13.5
10 15.8 1 18 1 18
10 15.8 1 18 1 18
10.6 16.3 1 18.5 1 18.5
10.6 16.3 1 18.5 1 18.5
10.7 14.9 1 17 1 17
10.7 14.9 1 17 1 17
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
UNIT
A, B, C
Any Y
C
15 pF
ns
G1
Any Y
C
15 pF
ns
G2A, G2B
Any Y
C
15 pF
ns
A, B, C
Any Y
C
50 pF
ns
G1
Any Y
C
50 pF
ns
G2A, G2B
Any Y
C
50 pF
ns
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L – DECEMBER 1995 – REVISED JULY 2003
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
*
On products compliant to MIL-PRF-38535, this parameter is not production tested.
p
=
L
p
=
L
p
=
L
p
=
L
p
=
L
p
=
L
TA = 25°C SN54AHC138 SN74AHC138
MIN TYP MAX MIN MAX MIN MAX
5.7* 8.1* 1* 9.5* 1 9.5
5.7* 8.1* 1* 9.5* 1 9.5
5.6* 8.1* 1* 9.5* 1 9.5
5.6* 8.1* 1* 9.5* 1 9.5
5.8* 8.1* 1* 9.5* 1 9.5
5.8* 8.1* 1* 9.5* 1 9.5
7.2 10.1 1 11.5 1 11.5
7.2 10.1 1 11.5 1 11.5
7.1 10.1 1 11.5 1 11.5
7.1 10.1 1 11.5 1 11.5
7.3 10.1 1 11.5 1 11.5
7.3 10.1 1 11.5 1 11.5
operating characteristics, V
C
Power dissipation capacitance No load, f = 1 MHz 13 pF
pd
= 5 V, TA = 25°C
CC
PARAMETER TEST CONDITIONS TYP UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L – DECEMBER 1995 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
(see Note A)
Test
Point
C
L
From Output
Under Test
(see Note A)
C
L
RL = 1 kΩ
S1
V
CC
GND
Open
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open Drain
Open
V
CC
GND
V
CC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Input
Input
t
PLH
In-Phase
Output
t
PHL
Out-of-Phase
Output
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
t
w
50% V
CC
VOLTAGE WAVEFORMS
PULSE DURATION
50% V
CC
50% V
50% V
VOLTAGE WAVEFORMS
50% V
CC
CC
3-STATE AND OPEN-DRAIN OUTPUTS
50% V
LOAD CIRCUIT FOR
V
CC
CC
0 V
V
CC
CC
t
PHL
50% V
t
PLH
50% V
CC
CC
0 V
V
V
V
V
OH
OL
OH
OL
Timing Input
Data Input
Output
Control
Output
Waveform 1
S1 at V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
50% V
t
su
50% V
CC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
50% V
CC
t
PZL
50% V
50% V
CC
CC
CC
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
CC
t
50% V
50% V
h
CC
CC
t
PLZ
VOL + 0.3 V
t
PHZ
VOH – 0.3 V
V
CC
0 V
V
CC
0 V
V
CC
0 V
≈V
V
OL
V
OH
≈0 V
CC
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L – DECEMBER 1995 – REVISED JULY 2003
APPLICATION INFORMATION
SN74AHC138
A0
A1
A2
A3
A4
1
2
3
V
CC
6
4
5
1
2
3
6
4
5
BIN/OCT
1
2
4
&
EN
SN74AHC138
BIN/OCT
1
2
4
&
EN
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
15
14
13
12
11
10
15
14
13
12
11
10
0
1
2
3
4
5
9
6
7
7
8
9
10
11
12
13
9
14
7
15
SN74AHC138
1
2
3
6
4
5
BIN/OCT
1
2
4
&
Figure 2. 24-Bit Decoding Scheme
EN
15
0
1
2
3
4
5
6
7
14
13
12
11
10
16
17
18
19
20
21
9
22
7
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
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