TEXAS INSTRUMENTS SN54ACT374 Technical data

SOIC

DW

ACT374

40°C to 85°C

SN54ACT374, SN74ACT374

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCAS539F – OCTOBER 1995 – REVISED NOVEMBER 2002

D

4.5-V to 5.5-V VCC Operation

D

Inputs Accept Voltages to 5.5 V

D

Max tpd of 10 ns at 5 V

D

Inputs Are TTL-Voltage Compatible

description/ordering information

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the ’ACT374 devices are D-type edge-triggered flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines in bus-organized systems without need for interface or pullup components.

OE

does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while

the outputs are in the high-impedance state.

) input can be used

SN54ACT374 ...J OR W PACKAGE

SN74ACT374 . . . DB, DW, N, NS, OR PW PACKAGE

SN54ACT374 . . . FK PACKAGE

2D 2Q 3Q 3D 4D

OE

1Q 1D 2D 2Q 3Q 3D 4D 4Q

GND

4 5 6 7 8

(TOP VIEW)

1

20

2

19

3

18

4

17

5

16

6

15

7

14

8

13

9

12

10

11

(TOP VIEW)

GND

V

CLK

CC

5Q

1D1QOE

3 2 1 20 19

9 10 11 12 13

4Q

V

CC

8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK

8Q

18 17 16 15 14

5D

8D 7D 7Q 6Q 6D

T o ensure the high-impedance state during power up or power down, OE

should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMA TION

T

A

PDIP – N Tube SN74ACT374N SN74ACT374N

–

–55°C to 125°C

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

SOP – NS Tape and reel SN74ACT374NSR ACT374 SSOP – DB Tape and reel SN74ACT374DBR AD374 TSSOP – PW Tape and reel SN74ACT374PWR AD374 CDIP – J Tube SNJ54ACT374J SNJ54ACT374J CFP – W Tube SNJ54ACT374W SNJ54ACT374W LCCC – FK Tube SNJ54ACT374FK SNJ54ACT374FK

PACKAGE

†

Tube SN74ACT374DW Tape and reel SN74ACT374DWR

ORDERABLE

PART NUMBER

Copyright  2002, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

TOP-SIDE MARKING

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

SN54ACT374, SN74ACT374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

SCAS539F – OCTOBER 1995 – REVISED NOVEMBER 2002

FUNCTION TABLE

(each flip-flop)

INPUTS

OE

CLK D

L ↑ H H L ↑ LL L H or L X Q

H X X Z

logic diagram (positive logic)

1

OE

11

CLK

OUTPUT

Q

0

1D

C1

3

To Seven Other Channels

1D

2

1Q

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V Input voltage range, V Output voltage range, V Input clamp current, I Output clamp current, I Continuous output current, I Continuous current through V Package thermal impedance, θ

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(VI < 0 or VI > V

IK

(VO < 0 or VO > V

OK

(VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC)

±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC)

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

†

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

PARAMETER

TEST CONDITIONS

V

UNIT

I

50 µA

V

I

24 mA

V

I

50 µA

V

I

24 mA

V

SN54ACT374, SN74ACT374

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCAS539F – OCTOBER 1995 – REVISED NOVEMBER 2002

recommended operating conditions (see Note 3)

SN54ACT374 SN74ACT374

MIN MAX MIN MAX

V V V V V I

OH

I

OL

∆t/∆v Input transition rise or fall rate 8 8 ns/V T

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

†

Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.

‡

This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.

Supply voltage 4.5 5.5 4.5 5.5 V

CC

High-level input voltage 2 2 V

IH

Low-level input voltage 0.8 0.8 V

IL

Input voltage 0 V

I

Output voltage 0 V

O

High-level output current –24 –24 mA Low-level output current 24 24 mA

Operating free-air temperature –55 125 –40 85 °C

A

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

TA = 25°C SN54ACT374 SN74ACT374

MIN TYP MAX MIN MAX MIN MAX

I I I

∆I C

OH

OL

OZ I CC

i

CC

= –

OH

= –

OH

IOH = –50 mA IOH = –75 mA

=

OL

=

OL

IOL = 50 mA IOL = 75 mA VO = VCC or GND 5.5 V ±0.25 ±5 ±2.5 µA VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA VI = VCC or GND, IO = 0 5.5 V 4 80 40 µA

‡

One input at 3.4 V , Other inputs at GND or V

VI = VCC or GND 5 V 4.5 pF

† †

CC

4.5 V 4.4 4.49 4.4 4.4

5.5 V 5.4 5.49 5.4 5.4

4.5 V 3.86 3.7 3.76

5.5 V 4.86 4.7 4.76

5.5 V 3.85

4.5 V 0.1 0.1 0.1

5.5 V 0.1 0.1 0.1

4.5 V 0.36 0.44 0.44

5.5 V 0.36 0.5 0.44

5.5 V 1.65

5.5 V 0.6 1.6 1.5 mA

CC CC

0 V 0 V

CC CC

V V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

SN54ACT374, SN74ACT374

UNIT

PARAMETER

UNIT

CLK

Q

ns

OE

Q

ns

OE

Q

ns

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

SCAS539F – OCTOBER 1995 – REVISED NOVEMBER 2002

timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

TA = 25°C SN54ACT374 SN74ACT374 MIN MAX MIN MAX MIN MAX

f

clock

t

w

t

su

t

h

switching characteristics over recommended operating free-air temperature range, V

CC

Clock frequency 100 70 90 MHz Pulse duration, CLK high or low 5 5 5 ns Setup time, data before CLK↑ 5 5.5 5.5 ns Hold time, data after CLK↑ 1.5 1.5 1.5 ns

= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

TA = 25°C SN54ACT374 SN74ACT374

MIN TYP MAX MIN MAX MIN MAX

100 160 70 90 MHz

2 8.5 10 1.5 12 2 11.5 2 8 9.5 1.5 11.5 1.5 11 2 8 9.5 1.5 11.5 1.5 10.5

1.5 8 9 1.5 11.5 1.5 10.5

1.5 8.5 11.5 1.5 13 1 12.5

1.5 7 8.5 1.5 11 1 10

f

max

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

FROM TO

(INPUT) (OUTPUT)

operating characteristics, VCC = 5 V, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT

C

Power dissipation capacitance CL = 50 pF, f = 1 MHz 40 pF

pd

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

From Output

Under Test

CL = 50 pF

(see Note A)

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

SCAS539F – OCTOBER 1995 – REVISED NOVEMBER 2002

PARAMETER MEASUREMENT INFORMATION

2 × V

CC

Open

500 Ω

S1

SN54ACT374, SN74ACT374

WITH 3-STATE OUTPUTS

TEST S1

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open

2 × V

Open

CC

LOAD CIRCUIT

t

w

Input

Output

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement.

1.5 V 1.5 V

VOLTAGE WAVEFORMS

1.5 V 1.5 V

t

PLH

50% V

VOLTAGE WAVEFORMS

CC

t

50% V

PHL

3 V

0 V

V

CC

V

3 V

0 V

OH

OL

Timing Input

Data Input

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2 × V

(see Note B)

Output

Waveform 2

S1 at Open

(see Note B)

CC

1.5 V

t

su

1.5 V 1.5 V

VOLTAGE WAVEFORMS

1.5 V 1.5 V

t

PZL

50% V

t

PZH

50% V

VOLTAGE WAVEFORMS

CC

t

h

VOL + 0.3 V

VOH – 0.3 V

t

PLZ

t

PHZ

3 V

0 V

3 V

0 V

3 V

0 V

≈V

V

OL

V

OH

≈0 V

CC

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

PACKAGE OPTION ADDENDUM

www.ti.com

PACKAGING INFORMATION

Orderable Device Status

5962-87631012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-8763101RA ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type 5962-8763101SA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type

5962-8763101VRA ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type

5962-8763101VSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type

SN74ACT374DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI

SN74ACT374DBR ACTIVE SSOP DB 20 2000 Green (RoHS &

SN74ACT374DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS &

SN74ACT374DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS &

SN74ACT374DW ACTIVE SOIC DW 20 25 Green (RoHS &

SN74ACT374DWE4 ACTIVE SOIC DW 20 25 Green (RoHS &

SN74ACT374DWG4 ACTIVE SOIC DW 20 25 Green (RoHS &

SN74ACT374DWR ACTIVE SOIC DW 20 2000 Green (RoHS &

SN74ACT374DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS &

SN74ACT374DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS&

SN74ACT374N ACTIVE PDIP N 20 20 Pb-Free

SN74ACT374NE4 ACTIVE PDIP N 20 20 Pb-Free

SN74ACT374NSR ACTIVE SO NS 20 2000 Green (RoHS &

SN74ACT374NSRE4 ACTIVE SO NS 20 2000 Green (RoHS &

SN74ACT374NSRG4 ACTIVE SO NS 20 2000 Green (RoHS &

SN74ACT374PW ACTIVE TSSOP PW 20 70 Green (RoHS &

SN74ACT374PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS &

SN74ACT374PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS &

SN74ACT374PWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI

SN74ACT374PWR ACTIVE TSSOP PW 20 2000 Green (RoHS &

SN74ACT374PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS &

SN74ACT374PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS&

SNJ54ACT374FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type

(1)

Package

Type

Package

Drawing

Pins Package

Qty

Eco Plan

no Sb/Br)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU N / A for Pkg Type

CU NIPDAU Level-1-260C-UNLIM

9-Oct-2007

(3)

Addendum-Page 1

TEXAS INSTRUMENTS SN54ACT374 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual