Texas Instruments SN10KHT5574DW, SN10KHT5574DWR, SN10KHT5574NT Datasheet
SN10KHT5574
OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE
EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
SDZS010 – JANUARY 1990 – REVISED OCTOBER 1990
Copyright 1990, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• 10KH Compatible
• ECL Clock and TTL Control Inputs
• Flow-Through Architecture Optimizes PCB
Layout
• Center Pin V
CC
, VEE, and GND
Configurations Minimize High-Speed
Switching Noise
• Package Options Include “Small Outline”
Packages and Standard Plastic DIPs
description
This octal ECL-to-TTL translator is designed to
provide efficient translation between a 10KH ECL
signal environment and a TTL signal environment.
This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented
functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.
The eight flip-flops of the SN10KHT5574 are edge-triggered D-type flip-flops. On the positive transition of the
clock, the Q outputs are set to the logic levels that were set up at the D inputs.
A buffered output-enable input (OE) can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive
bus lines without need for interface or pullup components.
The output-enable input OE
does not affect the internal operations of the flip-flops. Old data can be retained
or new data can be entered while the outputs are off.
The SN10KHT5574 is characterized for operation from 0°C to 75°C.
FUNCTION TABLE
OE CLK D
INPUTS
Q
OUTPUT
(TTL)
L ↑ LL
L↑HH
LLX
Q
o
HXX Z
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
1Q
2Q
3Q
4Q
V
CC
GND
GND
GND
5Q
6Q
7Q
8Q
1D
2D
3D
4D
OE
(TTL)
V
EE
GND
CLK(ECL)
5D
6D
7D
8D
DW OR NT PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN10KHT5574
OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE
EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
SDZS010 – JANUARY 1990 – REVISED OCTOBER 1990
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
logic diagram (positive logic)
1D
CLK
2D
3D
4D
5D
6D
7D
8D
20
17
24
23
22
21
16
15
14
13
12
11
10
9
4
3
2
1
1D
EN
C1
ECL/TTL
ECL/TTL
OE
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
1D
CLK
2D
3D
4D
5D
6D
7D
8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
20
17
24
23
22
21
16
15
14
13
12
11
10
9
4
3
2
1
1D
C1
C1
C1
C1
C1
C1
C1
C1
1D
1D
1D
1D
1D
1D
1D
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
OE
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
ECL/TTL
SN10KHT5574
OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE
EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
SDZS010 – JANUARY 1990 – REVISED OCTOBER 1990
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage range, V
EE
–8 V to 0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range: TTL (see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ECL V
EE
to 0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to any output in the disabled or power-off state –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to any output in the high state –0.5 V to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range, (TTL) –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range 0°C to 75°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The TTL input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
MIN NOM MAX UNIT
V
CC
TTL supply voltage 4.5 5 5.5 V
V
EE
ECL supply voltage –4.94 –5.2 –5.46 V
V
IH
TTL high-level input voltage 2 V
V
IL
TTL low-level input voltage 0.8 V
TA = 0°C –1170 –840
V
IH
ECL high-level input voltage
‡
TA = 25°C –1130 –810 mV
TA = 75°C –1070 –735
TA = 0°C –1950 –1480
V
IL
ECL low-level input voltage
‡
TA = 25°C –1950 –1480 mV
TA = 75°C –1950 –1450
I
IK
TTL input clamp current –18 mA
I
OH
High-level output current –15 mA
I
OL
Low-level output current 48 mA
T
A
Operating free-air temperature range 0 75 °C
‡
The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic levels only.
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