Texas Instruments SimpleLink Ethernet MSP432E401Y User Manual

User's Guide
SLAU748B–October 2017–Revised September 2018
LaunchPad™ Development Kit (MSP-EXP432E401Y)
The SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™ Development Kit is a low-cost evaluation platform for SimpleLink Arm®Cortex®-M4F-based Ethernet microcontrollers. The Ethernet LaunchPad development kit highlights the MSP432E401Y microcontroller with its on-chip 10/100 Ethernet MAC and PHY, USB 2.0, hibernation module, motion control pulse-width modulation, and a multitude of simultaneous serial connectivity.
Contents
1 Board Overview.............................................................................................................. 2
1.1 Kit Contents.......................................................................................................... 3
1.2 Using the Ethernet LaunchPad Development Kit............................................................... 3
1.3 Features.............................................................................................................. 3
1.4 BoosterPack Plug-in Modules..................................................................................... 4
1.5 Specifications........................................................................................................ 4
2 Hardware Description ....................................................................................................... 5
2.1 Functional Description.............................................................................................. 5
2.2 Power Management............................................................................................... 20
2.3 Debug Interface.................................................................................................... 21
3 Software Development .................................................................................................... 21
3.1 Software Description.............................................................................................. 21
3.2 Source Code....................................................................................................... 21
3.3 Tool Options ....................................................................................................... 21
3.4 Programming the Ethernet LaunchPad Development Kit.................................................... 22
4 PCB Schematics ........................................................................................................... 22
1 SimpleLink Ethernet MSP432E401Y LaunchPad Development Kit................................................... 2
2 SimpleLink Ethernet LaunchPad Development Kit Block Diagram ................................................... 5
3 Default Jumper Locations ................................................................................................. 18
4 BSL Header and Resistors................................................................................................ 19
5 Ethernet LaunchPad Development Kit Schematics (1 of 5) .......................................................... 23
6 Ethernet LaunchPad Development Kit Schematics (2 of 5) .......................................................... 24
7 Ethernet LaunchPad Development Kit Schematics (3 of 5) .......................................................... 25
8 Ethernet LaunchPad Development Kit Schematics (4 of 5) .......................................................... 26
9 Ethernet LaunchPad Development Kit Schematics (5 of 5) .......................................................... 27
1 MSP-EXP432E401Y Specifications ....................................................................................... 4
2 BoosterPack Plug-in Module Interface 1 GPIO and Signal Muxing................................................... 8
3 BoosterPack 2 GPIO and Signal Muxing ............................................................................... 11
4 X11 Breadboard Adapter Odd-Numbered Pad GPIO and Signal Muxing.......................................... 14
5 X11 Breadboard Adapter Even-Numbered Pad GPIO and Signal Muxing......................................... 15
6 Resistors for Serial Bootloader Protocols............................................................................... 19
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List of Figures
List of Tables
SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™
Copyright © 2017–2018, Texas Instruments Incorporated
Development Kit (MSP-EXP432E401Y)
1
Board Overview
Trademarks
SimpleLink, LaunchPad, BoosterPack, Code Composer Studio are trademarks of Texas Instruments. Arm, Cortex, Keil, RealView are registered trademarks of Arm Limited. IAR Embedded Workbench is a registered trademark of IAR Systems. All other trademarks are the property of their respective owners.
1 Board Overview
The SimpleLink Ethernet MSP432E401Y Microcontroller LaunchPad Development Kit is a low-cost evaluation platform for SimpleLink Arm Cortex-M4F-based Ethernet microcontrollers. The Ethernet LaunchPad development kit design highlights the MSP432E401Y microcontroller with its on-chip 10/100 Ethernet MAC and PHY, USB 2.0, hibernation module, motion control pulse-width modulation, and a multitude of simultaneous serial connectivity. The Ethernet LaunchPad development kit also features two user switches, four user LEDs, dedicated reset and wake switches, a breadboard expansion option and two independent BoosterPack™ XL expansion connectors. The preprogrammed quick start application on the Ethernet LaunchPad development kit also enables remote monitoring and control of the evaluation board from an internet browser anywhere in the world. The web interface is provided by a third party,
Exosite. Each Ethernet LaunchPad development kit is enabled on the Exosite platform allowing users to
create and customize their own Internet-of-Things applications.
Figure 1 shows the Ethernet LaunchPad development kit with key features highlighted.
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Figure 1. SimpleLink Ethernet MSP432E401Y LaunchPad Development Kit
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1.1 Kit Contents
The Ethernet LaunchPad development kit contains the following items:
SimpleLink Ethernet MSP432E401Y LaunchPad Development Board (MSP-EXP432E401Y)
USB Micro-B plug to USB-A plug cable
Quick Start Guide
1.2 Using the Ethernet LaunchPad Development Kit
The recommended steps for using the Ethernet LaunchPad development kit are:
1. Run the Out of Box demo software. For detailed instruction on how to run the out of box demo, visit this SimpleLink Academy tutorial.
2. Take the first step towards developing your own applications. The Ethernet LaunchPad development kit is supported by the SimpleLink MSP432E4 SDK. After installing the SDK, look in the following installation directories for bare metal and rtos based examples
a. examples\nortos\MSP_EXP432E401Y\ b. examples\rtos\MSP_EXP432E401Y\
See Section 3 for more details about software development.
3. Experiment with BoosterPack plug-in modules. This development kit conforms to the latest revision of the BoosterPack plug-in module pinout standard. It has two independent BoosterPack plug-in module connections to enable a multitude of expansion opportunities.
4. Customize and integrate the hardware to suit your end application. This development kit can be used as a reference for building your own custom circuits based on SimpleLink microcontrollers or as a foundation for expansion with your custom BoosterPack plug-in module or other circuit. This manual can serve as a starting point for this endeavor.
5. More Resources. See the TI MCU LaunchPad web page for more information and available BoosterPack modules.
Board Overview
1.3 Features
The Ethernet LaunchPad development kit includes the following features:
SimpleLink MSP432E401Y microcontroller
Ethernet connectivity with fully integrated 10/100 Ethernet MAC and PHY
Motion Control PWM
USB 2.0 Micro A/B connector
4 user LEDs
2 user switches
1 independent hibernate wake switch
1 independent microcontroller reset switch
Jumper for selecting power source: – XDS-110 USB – USB Device – BoosterPack
Preloaded Internet-of-Things application
I/O brought to board edge for breadboard expansion
Two independent BoosterPack XL standard connectors featuring stackable headers to maximize expansion through BoosterPack plug-in module ecosystem
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1.4 BoosterPack Plug-in Modules
The Ethernet LaunchPad development kit provides an easy and inexpensive way to develop applications with the MSP432E401YPDT microcontroller. BoosterPack plug-in modules are add-on boards that follow a pinout standard created by TI. The TI and third-party ecosystem of BoosterPack plug-in modules greatly expands the peripherals and potential applications that you can easily explore with the Ethernet LaunchPad development kit.
You can also build your own BoosterPack plug-in module by following the design guidelines on the TI
website. TI even helps you promote your BoosterPack plug-in module to other members of the
community. TI offers a variety of avenues for you to reach potential customers with your solutions.
1.5 Specifications
Table 1 summarizes the specifications for the Ethernet LaunchPad.
Table 1. MSP-EXP432E401Y Specifications
Parameter Value
4.75 VDC to 5.25 VDC from one of the following sources:
• XDS-110 USB Micro-B cable connected to PC or other compatible power source
Board Supply Voltage
Dimensions 6.85 in × 2.5 in × .425 in (17.4 cm × 6.35 cm × 10.8 mm) (L × W × H)
Break-out Power Output
RoHS Status Compliant
• Target USB (U7) USB Micro-B cable connected to PC or other compatible power source
• BoosterPack 1 Interface (J3-21)
• BoosterPack 2 Interface (J7-21)
• 5-V Power header (J13-1)
• Breadboard expansion header (J10-2 or J10-97). See schematic symbol JP1 for power input selection.
• 5 VDC to BoosterPack modules, current limited by TPS2052B. Nominal rating is 1 A. Board input power supply limitations may also apply.
• 3.3 VDC to BoosterPack modules, limited by output of TPS79601 LDO. This 3.3-V plane is shared with onboard components. Total output power limit of TPS79601 is 1 A.
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2 Hardware Description
The Ethernet LaunchPad development kit includes an MSP432E401YPDT microcontroller with an integrated 10/100 Ethernet MAC and PHY. This advanced Arm Cortex-M4F MCU has a wide range of peripherals that are made available to users through the onboard accessories and the BoosterPack plug­in module connectors. This chapter explains how those peripherals operate and interface to the microcontroller.
Figure 2 shows a high-level block diagram of the Ethernet LaunchPad development kit.
Hardware Description
Figure 2. SimpleLink Ethernet LaunchPad Development Kit Block Diagram
2.1 Functional Description
2.1.1 Microcontroller
The MSP432E401Y is a 32-bit Arm Cortex-M4F based microcontroller with 1024KB of flash memory, 256KB of SRAM, 6KB of EEPROM, and 120-MHz operation, integrated 10/100 Ethernet MAC and PHY, integrated USB 2.0 connectivity with external high-speed USB 3.0 PHY capability, a hibernation module, a multitude of serial connectivity and motion control PWM, as well as a wide range of other peripherals. See the MSP432E401Y microcontroller data sheet for more complete details.
Most of the microcontroller signals are routed to 0.1-in (2.54-mm) pitch headers or through-hole solder pads. An internal multiplexor allows different peripheral functions to be assigned to each of these GPIO pads. When adding external circuitry, consider the additional load on the evaluation board power rails.
The MSP432E401Y microcontroller is factory-programmed with a quick start demo program. The quick start program resides in on-chip Flash memory and runs each time power is applied, unless the quick start application has been replaced with a user program. The quick start application automatically connects to
http://ti.exosite.com when an internet connection is provided through the RJ45 Ethernet jack on the
evaluation board.
2.1.2 Ethernet Connectivity
The Ethernet LaunchPad development kit is designed to connect directly to an Ethernet network using RJ45 style connectors. The microcontroller contains a fully integrated Ethernet MAC and PHY. This integration creates a simple, elegant and cost-saving Ethernet circuit design. Example code is available for LwIP TCP/IP protocol stack. The embedded Ethernet on this device can be programmed to act as an HTTP server, client or both. The design and integration of the circuit and microcontroller also enable users to synchronize events over the network using the IEEE1588 precision time protocol.
When configured for Ethernet operation, it is recommended that the user configure LED D3 and D4 to be controlled by the Ethernet PHY to indicate connection and transmit or receive status.
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2.1.2.1 RJ-45 Connections
To improve EMI performance, use a metal-shielded RJ-45 connector with the shield connected to chassis ground.
Bob Smith termination to the RJ-45 connector involves 75-Ω termination resistors connected to the unused differential pair connections on the RJ-45 connector. Bob Smith termination is used to reduce noise that results from common-mode current flows and to reduce susceptibility to noise from unused wire pairs on the RJ-45.
NOTE: Power Over Ethernet (PoE) applications require a modified Bob Smith termination, which
consists of DC-blocking capacitors in series with the 75-Ω termination resistors.
2.1.3 USB Connectivity
The Ethernet LaunchPad development kit is designed to be USB 2.0 ready. A TPS2052B load switch is connected to and controlled by the microcontroller USB peripheral, which manages power to the USB micro A/B connector when functioning in a USB host. When functioning as a USB device, the entire Ethernet LaunchPad development kit can be powered directly from the USB micro A/B connector. Use JP1 to select the desired power source.
USB 2.0 functionality is provided and supported directly out of the box with the target USB micro A/B connector. High-speed USB 3.0 functionality can be enabled by adding an external USB PHY. The USB external PHY control and data signals are provided on the breadboard expansion header J10.
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2.1.4 Motion Control
The Ethernet LaunchPad development kit includes motion control functionality through the use of a PWM module capable of generating eight PWM outputs. The PWM module provides a great deal of flexibility and can generate simple PWM signals – for example, those required by a simple charge pump – as well as paired PWM signals with dead-band delays, such as those required by a half-H bridge driver. Three generator blocks can also generate the full six channels of gate controls required by a 3-phase inverter bridge.
A quadrature encoder interface (QEI) is also available to provide motion control feedback. See Section 2.1.6 for details about the availability of these signals on the BoosterPack interfaces.
2.1.5 User Switches and LEDs
Two user switches are provided for input and control of the MSP432E401Y software. The switches are connected to GPIO pins PJ0 and PJ1.
A reset switch and a wake switch are also provided. The reset switch initiates a system reset of the microcontroller whenever it is pressed and released. Pressing the reset switch also asserts the reset signal to the BoosterPack plug-in module and Breadboard headers. The wake switch is one way to bring the device out of hibernate mode.
Four user LEDs are provided on the board. D1 and D2 are connected to GPIOs PN1 and PN0. These LEDs are dedicated for use by the software application. D3 and D4 are connected to GPIOs PF4 and PF0, which can be controlled by user’s software or the integrated Ethernet module of the microcontroller.
A power LED is also provided to indicate that 3.3-V power is present on the board.
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2.1.6 BoosterPack Plug-in Modules and Headers
2.1.6.1 BoosterPack Plug-in Module Interface 1
The Ethernet LaunchPad development kit features two fully independent BoosterPack XL connectors. BoosterPack Plug-in Module Interface 1, located near the XDS110 emulator, is fully compliant with the BoosterPack plug-in module standard.
I2C is provided in both the original BoosterPack plug-in module standard configuration as well as the updated standard location. Use of I2C on the bottom left of the BoosterPack plug-in module connections per the updated standard is highly encouraged whenever possible.
Motion control advanced PWM connections are provided on the inner right connector for motion control applications.
Table 2 lists the BoosterPack plug-in module pins and the GPIO alternate functions available on each pin.
The MSP432E401Y GPIO register GPIOPCTL values are shown for each configuration. The headers in this table are labeled from left to right in ten pin columns. J1 and J2 make up the outer BoosterPack plug­in module standard pins, and J3 and J4 make up the inner BoosterPack XL standard pins.
Hardware Description
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Table 2. BoosterPack Plug-in Module Interface 1 GPIO and Signal Muxing
Header Pin
Standard Function
GPIO MCU Pin Analog
Digital Function (GPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
J1 1 3.3 V 3.3 V J1 2 Analog PE4 123 AIN9 U1RI SSI1XDAT0 J1 3 UART RX PC4 25 C1- U7Rx EPI0S7 J1 4 UART TX PC5 24 C1+ U7Tx RTCCLK EPI0S6 J1 5 GPIO PC6 23 C0+ U5Rx EPI0S5 J1 6 Analog PE5 124 AIN8 SSIXDAT1 J1 7 SPI CLK PD3 4 AIN12 I2C8SDA T1CCP1 SSI2CLk J1 8 GPIO PC7 22 C0- U5Tx EPI0S4 J1 9 I2C SCL PB2 91 I2C0SCL T5CCP0 USB0STP EPI0S27 J1 10 I2C SDA PB3 92 I2C0SDA T5CCP1 USB0CLK EPI0S28 J3 21 5 V 5 V J3 22 ground GND J3 23 Analog PE0 15 AIN3 U1RTS – J3 24 Analog PE1 14 AIN2 U1DSR – J3 25 Analog PE2 13 AIN1 U1DCD – J3 26 Analog PE3 12 AIN0 U1DTR – J3 27 Analog PD7 128 AIN4 U2CTS T4CCP1 USB0PFLT NMI SSI2XDAT2 J3 28 Analog PD6 127 AIN5 U2RTS T4CCP0 USB0EPEN SSI2XDAT3 J3 29 A out PM4 74 TMPR3 U0CTS T4CCP0 – J3 30 A out PM5 73 TMPR2 U0DCD T4CCP1 – J4 40 PWM PF1 43 EN0LED2 M0PWM1 SSI3XDAT0 TRD1 J4 39 PWM PF2 44 M0PWM2 SSI3Fss TRD0 J4 38 PWM PF3 45 M0PWM3 SSI3Clk TRCLK J4 37 PWM PG0 49 I2C1SCL EN0PPS M0PWM4 EPI0S11 J4 36 Capture PL4 85 T0CCP0 USB0D4 EPI0S26 J4 35 Capture PL5 86 T0CCP1 USB0D5 EPI0S33 J4 34 GPIO PL0 81 I2C2SDA M0FAULT3 USB0D0 EPI0S16 J4 33 GPIO PL1 82 I2C2SCL PhA0 USB0D1 EPI0S17 J4 32 GPIO PL2 83 C0o PhB0 USB0D2 EPI0S18 J4 31 GPIO PL3 84 C1o IDX0 USB0D3 EPI0S19 J2 11 ground GND J2 12 PWM PM3 75 T3CCP1 EPI0S12 J2 13 GPIO PH2 31 U0DCD EPI0S2 J2 14 GPIO PH3 32 U0DSR EPI0S3 J2 15 reset RESET J2 16 SPI MOSI PD1 2 AIN14 I2C7SDA T0CCP1 C1o SSI2XDAT0 J2 17 SPI MISO PD0 1 AIN15 I2C7SCL T0CCP0 C0o SSI2XDAT1 J2 18 GPIO PN2 109 U1DCD U2RTS EPI0S29 J2 19 GPIO PN3 110 U1DSR U2CTS EPI0S30
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Hardware Description
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Table 2. BoosterPack Plug-in Module Interface 1 GPIO and Signal Muxing (continued)
Header Pin
Standard Function
GPIO MCU Pin Analog
Digital Function (GPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
J2 20 GPIO PP2 103 U0DTR USB0NXT EPI0S29
Hardware Description
2.1.6.2 BoosterPack Plug-in Module Interface 2
The second BoosterPack XL interface is located near the bottom of the board. This interface is fully compliant with the BoosterPack plug-in module standard, and adds features not covered by the BoosterPack plug-in module standard that enable operation with additional BoosterPack plug-in modules.
Using the jumpers JP4 and JP5, Controller Area Network (CAN) digital receive and transmit signals can be optionally routed to the BoosterPack Plug-in Module Interface 2 connector. In the default configuration, UART0 is used for the XDS-110 backchannel UART and CAN is not present on the BoosterPack plug-in module headers. In this configuration, the ROM serial bootloader can be used over the XDS-110 backchannel UART. When the jumpers are configured for CAN on the BoosterPack plug-in module interface, then UART2 must be used for the XDS-110 backchannel UART.
To comply with both the original and the new BoosterPack plug-in module standard, I2C is provided on both sides of the BoosterPack plug-in module connection. Use of I2C on the bottom left of the BoosterPack plug-in module connection is highly encouraged where possible, to be in compliance with the new BoosterPack plug-in module standard. To provide I2C capability on the right side of the connector, per the original standard, two 0-Ω resistors (R19 and R20) are used to combine the SPI and I2C signals. These signals are not shared with any other pins on the LaunchPad development kit and therefore removal of these zero-ohm resistors should not be required. Software should be certain that unused GPIO signals are configured as inputs.
Table 3 lists the BoosterPack plug-in module pins and the GPIO alternate functions available at each pin.
The MSP432E401Y GPIO register GPIOPCTL values are shown for each configuration. The headers in this table are labeled from left to right in ten pin columns. J5 and J6 make up the outer BoosterPack standard pins, J7 and J8 make up the inner BoosterPack XL standard pins.
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Table 3. BoosterPack 2 GPIO and Signal Muxing
Header Pin
Standard Function
GPIO MCU Pin Analog
Digital Function (FPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
J5 1 3.3 V J5 2 Analog PD2 3 AIN13 I2C8SCL T1CCP0 C2o SSI2Fss J5 3 UART RX PP0 118 C2+ U6Rx SSI3XDAT2 J5 4 UART TX PP1 119 C2- U6Tx SSI3XDAT3
J5 5
GPIO (See
JP4)
PD4 125 AIN7 U2Rx T3CCP0 SSI1XDAT2 PA0 33 U0Rx I2C9SCL T0CCP0 CANORx
J5 6
Analog (See
JP5)
PD5 126 AIN6 U2Tx T3CCP1 SSI1XDAT3
PA1 34 U0Tx I2C9SDA T0CCP1 CAN0Tx – J5 7 SPI CLK PQ0 5 SSI3Clk EPI0S20 J5 8 GPIO PP4 105 U3RTS U0DSR USB0D7 – J5 9 I2C SCL PN5 112 U1RI U3CTS I2C2SCL EPIO0S35 J5 10 I2C SDA PN4 111 U1DTR U3RTS I2C2SDA EPIO0S34 J7 21 5 V J7 22 GND J7 23 Analog PB4 121 AIN10 U0CTS I2C5SCL SSI1Fss J7 24 Analog PB5 120 AIN11 U0RTS I2C5SDA SSI1Clk J7 25 Analog PK0 18 AIN16 U4Rx EPI0S0 J7 26 Analog PK1 19 AIN17 U4Tx EPI0S1 J7 27 Analog PK2 20 AIN18 U4RTS EPI0S2 J7 28 Analog PK3 21 AIN19 u4CTS EPI0S3 J7 29 A out PA4 37 U3Rx I2C7SCL T2CCP0 SSI0XDAT0 J7 30 A out PA5 38 U3Tx I2C7SDA T2CCP1 SSI0XDAT1 J8 40 PWM PG1 50 I2C1SDA M0PWM5 EPI0S10 J8 39 PWM PK4 63 I2C3SCL EN0LED0 M0PWM6 EPI0S32 J8 38 PWM PK5 62 I2C3SDA EN0LED2 M0PWM7 EPI0S31 J8 37 PWM PM0 78 T2CCP0 EPI0S15 J8 36 Capture PM1 77 T2CCP1 EPI0S14 J8 35 Capture PM2 76 T3CCP0 EPI0S13 J8 34 GPIO PH0 29 U0RTS EPI0S0 J8 33 GPIO PH1 30 U0CTS EPI0S1 J8 32 GPIO PK6 61 I2C4SCL EN0LED1 M0FAULT1 EPI0S25 J8 31 GPIO PK7 60 U0RI I2C4SDA RTCCLK M0FAULT2 EPI0S24 J6 11 GND J6 12 PWM PM7 71 TMPR0 U0RI T5CCP1 – J6 13 GPIO PP5 106 U3CTS I2C2SDL USB0D6 – J6 14 GPIO PA7 41 U2Tx I2C6SDA T3CCP1 USB0PFLT USB0EPEN SSI0XDAT3 EPI0S9 J6 15 RESET J6 16 SPI MOSI PQ2 11 SSI3XDAT0 EPI0S22
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Table 3. BoosterPack 2 GPIO and Signal Muxing (continued)
Header Pin
Standard Function
GPIO MCU Pin Analog
Digital Function (FPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
I2C PA3 36 U4Tx I2C8SDA T1CCP1 SSI0Fss
J6 17 SPI MISO PQ3 27 SSI3XDAT1 EPI0S23
I2C PA2 35 U4Rx I2C8SCL T1CCP0 SSI0Clk J6 18 GPIO PP3 104 U1CTS U0DCD USB0DIR EPI0S30 J6 19 GPIO PQ1 6 SSI3Fss EPI0S21 J6 20 GPIO PM6 72 TMPR1 U0DSR T5CCP0
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2.1.6.3 Breadboard Connection
The breadboard adapter section of the board is a set of 98 holes on a 0.1-inch grid. Properly combined with a pair of right angle headers, the entire Ethernet LaunchPad development kit can be plugged directly into a standard 300-mil (0.3-in) wide solderless breadboard. The right angle headers and breadboard are not provided with this kit. Suggested part numbers are Samtec TSW-149-09-L-S-RE and TSW-149-08-L­S-RA right angle pin headers and Twin industries TW-E40-1020 solderless breadboard. Samtec TSW­149-09- F-S-RE and TSW-149-09-F-S-RA may be substituted.
Most microcontroller signals are made available at the breadboard adapter holes (J10). These signals are grouped by function where possible. For example, all EPI signals are grouped on one side of the connector. Many of the analog signals are grouped near VREF, and UART, SSI, and I2C signals are grouped by peripheral to make expansion and customization simpler.
Table 4 and Table 5 list the GPIO pin and signal muxing for the X11 breadboard adapter pads.
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Table 4. X11 Breadboard Adapter Odd-Numbered Pad GPIO and Signal Muxing
Pin Port MCU Pin Analog
Digital Function (GPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
1 3V3 3 GND 5 PB4 121 AIN10 U0CTS I2C5SCL SSI1Fss 7 PB5 120 AIN11 U0RTS I2C5SDA SSI1Clk 9 PH0 29 U0RTS EPI0S0
11 PH1 30 U0CTS EPI0S1 13 PH2 31 U0DCD EPI0S2 15 PH3 32 U0DSR EPI0S3 17 PC7 22 C0- U5Tx EPI0S4 19 PC6 23 C0+ U5Rx EPI0S5 21 PC5 24 C1+ U7Tx RTCCLK EPI0S6 23 PC4 25 C1- U7Rx EPI0S7 25 PA6 40 U2Rx I2C6SCL T3CCP0 USB0EPEN SSI0XDAT2 EPI0S8 27 PA7 41 U2Tx I2C6SDA T3CCP1 USB0PFLT USB0EPEN SSI0XDAT3 EPI0S9 29 PG1 50 I2C1SDA M0PWM5 EPI0S10 31 PG0 49 I2C1SCL EN0PPS M0PWM4 EPI0S11 33 PM3 75 T3CCP1 EPI0S12 35 GND 37 PM2 76 T3CCP0 EPI0S13 39 PM1 77 T2CCP1 EPI0S14 41 PM0 78 T2CCP0 EPI0S15 43 PL0 81 I2C2SDA M0FAULT3 USB0D0 EPI0S16 45 PL1 82 I2C2SCL PhA0 USB0D1 EPI0S17 47 PL2 83 C0o PhB0 USB0D2 EPI0S18 49 PL3 84 C1o IDX0 USB0D3 EPI0S19 51 PQ0 5 SSI3Clk EPI0S20 53 PQ1 6 SSI3Fss EPI0S21 55 PQ2 11 SSI3XDAT0 EPI0S22 57 PQ3 27 SSI3XDAT1 EPI0S23 59 PK7 60 U0RI I2C4SDA EPI0S24 61 GND 63 PK6 61 I2C4SCL EN0LED1 M0FAULT1 EPI0S25 65 PL4 85 T0CCP0 USB0D4 EPI0S26 67 PB2 91 I2C0SCL T5CCP0 USB0STP EPI0S27 69 PB3 92 I2C0SDA T5CCP1 USB0CLK EPI0S28 71 PP2 103 U0DTR USB0NXT EPI0S29 73 PP3 104 U1CTS U0DCD RTCCLK USB0DIR EPI0S30 75 PK5 62 I2C3SDA EN0LED2 M0PWM7 EPI0S31 77 PK4 63 I2C3SCL EN0LED0 M0PWM6 EPI0S32
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Hardware Description
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Table 4. X11 Breadboard Adapter Odd-Numbered Pad GPIO and Signal Muxing (continued)
Pin Port MCU Pin Analog
Digital Function (GPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
79 PL5 86 T0CCP1 USB0D5 EPI0S33 81 PN4 111 U1DTR U3RTS I2C2SDA EPI0S34 83 PN5 112 U1RI U3CTS I2C2SCL EPI0S35 85 PN0 107 U1RTS – 87 PN1 108 U1CTS – 89 PN2 109 U1DCD U2RTS EPI0S29 91 PN3 110 U1DSR U2CTS EPI0S30 93 PQ4 102 U1Rx DIVSCLK – 95 WAKE 97 5V
Table 5. X11 Breadboard Adapter Even-Numbered Pad GPIO and Signal Muxing
Pin Port MCU Pin Analog
Digital Function (GPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
2 5 V 4 GND 6 PA2 35 U4Rx I2C8SCL T1CCP0 SSI0Clk 8 PA3 36 U4Tx I2C8SDA T1CCP1 SSI0Fss
10 PA4 37 U3Rx I2C7SCL T2CCP0 SSI0XDAT0 12 PA5 38 U3Tx I2C7SDA T2CCP1 SSI0XDAT1 14 PE0 15 AIN3 U1RTS – 16 PE1 14 AIN2 U1DSR – 18 PE2 13 AIN1 U1DCD – 20 PE3 12 AIN0 U1DTR – 22 PE4 123 AIN9 U1RI SSI1XDAT0 24 PE5 124 AIN8 SSI1XDAT1 26 PK0 18 AIN16 U4Rx EPI0S0 28 PK1 19 AIN17 U4Tx EPI0S1 30 PK2 20 AIN18 U4RTS EPI0S2 32 PK3 21 AIN19 U4CTS EPI0S3 34 VREF 36 GND 38 PD5 126 AIN6 U2Tx T3CCP1 SSI1XDAT3 40 PD4 125 AIN7 U2Rx T3CCP0 SSI1XDAT2 42 PD7 128 AIN4 U2CTS T4CCP1 USB0PFLT NMI SSI2XDAT2 44 PD6 127 AIN5 U2RTS T4CCP0 USB0EPEN SSI2XDAT3 46 PD3 4 AIN12 I2C8SDA T1CCP1 SSI2Clk 48 PD1 2 AIN14 I2C7SDA T0CCP1 C1o SSI2XDAT0
Hardware Description
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Table 5. X11 Breadboard Adapter Even-Numbered Pad GPIO and Signal Muxing (continued)
Pin Port MCU Pin Analog
Digital Function (GPIOPCTL Bit Encoding)
1 2 3 5 6 7 8 11 13 14 15
50 PD0 1 AIN15 I2C7SCL T0CCP0 C0o SSI2XDAT1 52 PD2 3 AIN13 I2C8SCL T1CCP0 C2o SSI2Fss 54 PP0 118 C2+ U6Rx SSI3XDAT2 56 PP1 119 C2- U6Tx SSI3XDAT3 58 PB0 95 USB0ID U1Rx I2C5SCL T4CCP0 CAN1Rx – 60 PB1 96 USB0VBUS U1Tx I2C5SDA T4CCP1 CAN1Tx – 62 GND 64 PF4 46 EN0LED1 M0FAULT0 SSI3XDAT2 TRD3 66 PF0 42 EN0LED0 M0PWM0 SSI3XDAT1 TRD2 68 PF1 43 EN0LED2 M0PWM1 SSI3XDAT0 TRD1 70 PF2 44 M0PWM2 SSI3Fss TRD0 72 PF3 45 M0PWM3 SSI3Clk TRCLK 74 PA0 33 U0Rx I2C9SCL T0CCP0 CAN0Rx – 76 PA1 34 U0Tx I2C9SDA T0CCP1 CAN0Tx – 78 PP4 105 U3RTS U0DSR USB0D7 – 80 PP5 106 U3CTS I2C2SCL USB0D6 – 82 PJ0 116 U3Rx – 84 PJ1 117 U3Tx – 86 PM7 71 TMPR0 U0RI T5CCP1 – 88 PM6 72 TMPR1 U0DSR T5CCP0 – 90 PM5 73 TMPR2 U0DCD T4CCP1 – 92 PM4 74 TMPR3 U0CTS T4CCP0 – 94 RESET 96 GND 98 3V3
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2.1.6.4 Other Headers and Jumpers
JP1 is provided to select the 5-V power input source for the Ethernet LaunchPad development kit. The left position is for BoosterPack plug-in module power; this position also disconnects both USB voltages from the board’s primary 5-V input. In the left position, the TPS2052B does not limit current so additional care should be exercised. The middle position draws power from the USB connector on the bottom of the board near the Ethernet jack. The right position is the default, in which power is drawn from the XDS-110 USB connection through J101. If JP1 is in the left or middle position, which selects the BoosterPack headers or the USB OTG connector, respectively, externally provide 3.3 V to the board, and remove the 3V3 jumper on J101.
JP2 separates the MCU 3.3-V power domain from the rest of the 3.3-V power on the board allowing an ammeter to be used to obtain more accurate measurements of microcontroller power consumption. JP4 and JP5 are used to configure CAN signals to the BoosterPack Plug-in Module Interface 2 connector. In the default vertical configuration, CAN is not present on the BoosterPack plug-in module connector. UART2 goes to the BoosterPack plug-in module connector and UART 0 goes to the XDS-110 backchannel serial port and can also be used for the ROM serial bootloader. In the horizontal CAN­enabled configuration, UART2 goes to the XDS-110 backchannel serial port and CAN signals are available on the BoosterPack Plug-in Module Interface 2 connector. The ROM serial bootloader is not available to the XDS-110 backchannel serial port while the jumpers are in the CAN position.
Figure 3 shows the default configuration and relative location of the jumpers on the board.
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Hardware Description
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SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™ Development Kit (MSP-EXP432E401Y)
Figure 3. Default Jumper Locations
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2.1.7 Serial Bootloader
The Ethernet LaunchPad development kit enables the serial boot loader on the MSP432E401Y through the BSL header for connecting to an external BSL host interface, such as the BSL Rocket. The BSL header supports three communication protocols to the serial boot loader: SPI, UART, and I2C. To use the serial bootloader, a shrouded 100mil header (such as the AWHW-10G-0202-T from Assman WSW) should be soldered into the top side of the PCB, paying careful attention to make sure pin 1 of the connector lines up to pin one of the PCB (denoted by a square pad).
Because several of the pins for different communication protocols are shared on the header, the Ethernet LaunchPad development kit enables support for all three protocols by using 0-Ω resistor bridges for each of the signals. See Figure 4 for the location of the header and resistors on the PCB. To connect a specific protocol, populate the designated resistors with 0-Ω resistors and remove the resistors for the others protocols (see Table 6). When using I2C, populate R13 and R14 with the pullup resistors if no I2C pullups are on the external host. Typically the I2C pullup resistors should be 3.3 kΩ.
Hardware Description
Figure 4. BSL Header and Resistors
Table 6. Resistors for Serial Bootloader Protocols
Serial Bootloader
Protocol
I2C
UART
SPI
Resistors Populated
With 0-Ω Resistors
R7 R8
R5 R6
R9 R10 R11 R12
Resistors Left
Unpopulated
R5 R6
R9 R10 R11 R12
R7
R8
R9 R10 R11 R12
R5
R6
R7
R8
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Hardware Description
2.2 Power Management
2.2.1 Power Supplies
The Ethernet LaunchPad development kit can be powered from three different input options:
Onboard XDS-110 USB cable (Debug, Default)
Target USB cable
BoosterPack plug-in module or Breadboard adapter connections The JP1 power-select jumper is used to select one of the power sources. In addition, the 3V3 Jumper on J101 power jumper can be used to isolate the 3.3-V output of the
TPS79601 in the XDS-110 emulator from the 3.3-V rail of the target side. A TPS2052B load switch is used to regulate and control power to the Target USB connector when the
microcontroller is acting in USB host mode. This load switch also limits current to the BoosterPack plug-in module and Breadboard adapter headers when the JP1 jumper is in the XDS-110 position.
2.2.2 Low Power Modes
The Ethernet LaunchPad development kit demonstrates several low power microcontroller modes. In run mode, the microcontroller can be clocked from several sources such as the internal precision oscillator or an external crystal oscillator. Either of these sources can then optionally drive an internal PLL to increase the effective frequency of the system up to 120 MHz. In this way, the run mode clock speed can be used to manage run mode current consumption.
The microcontroller also provides sleep and deep sleep modes and internal voltage adjustments to the flash and SRAM to further refine power consumption when the processor is not in use but peripherals must remain active. Each peripheral can be individually clock gated in these modes so that current consumption by unused peripherals is minimized. A wide variety of conditions from internal and external sources can trigger a return to run mode.
The lowest power setting of the microcontroller is hibernation, which requires a small amount of supporting external circuitry available on the Ethernet LaunchPad development kit. The Ethernet LaunchPad development kit can achieve microcontroller current consumption modes under 2 µA using hibernate VDD3ON mode. Hibernation with VDD3ON mode is not supported on this board. The Ethernet LaunchPad can be woken from hibernate by several triggers including the dedicated wake button, the reset button, an internal RTC timer and a subset of the device GPIO pins. The hibernation module provides a small area of internal battery backed register bank that can preserve data through a hibernate cycle.
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2.2.3 Clocking
The Ethernet LaunchPad uses a 25-MHz crystal (Y1) to drive the main MSP432E401Y internal clock circuit. Most software examples use the internal PLL to multiply this clock to higher frequencies up to 120 MHz for core and peripheral timing. The 25-MHz crystal is required when using the integrated Ethernet MAC and PHY.
The Hibernation module is clocked from an external 32.768-kHz crystal (Y3).
2.2.4 Reset
The RESET signal to the MSP432E401Y microcontroller connects to the RESET switch, BoosterPack plug-in module connectors, breadboard adapter, and the XDS-110 target reset line.
External reset is asserted (active low) under the following conditions:
Power-on reset (filtered by an RC network)
RESET switch held down
By the XDS-110 circuit when instructed by the debugger (this capability is optional, and may not be supported by all debuggers)
By an external circuit attached to the BoosterPack plug-in module or breadboard connectors
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2.3 Debug Interface
2.3.1 XDS-110 Debug Interface
The Ethernet LaunchPad development kit comes with an onboard XDS-110. The XDS-110 allows for the programming and debugging of the MSP432E401Y using Code Composer Studio™ IDE or any of the supported tool chains. Note that XDS-110 only supports JTAG debugging at this time.
Debugging external boards using the XDS-110 is possible by removing the TDI, TDO, TCK, TMS, and RST jumpers from JP101 on the Ethernet LaunchPad development kit and using the XDS-110 to drive JTAG signals out on J102. To restore the connection to the onboard MSP432E401Y microcontroller, reinstall the jumpers on JP101.
2.3.2 External Debugger
The connector J11 is provided for the attachment of an external debug adapter such as the IAR I-Jet, Segger J-Link or Keil®ULINK. This connector follows the Arm 10-pin mini JTAG pinout. To use an external debugger, make sure the TDI, TDO, TCK, TMS, RST, and 3V3 jumpers are disconnected from J101. Many external debuggers do not provide a 3.3-V power rail through this adapter and require an external 3.3-V source to power the LaunchPad development kit.
2.3.3 Virtual COM Port
When plugged into a USB host, the XDS-110 enumerates as both a debugger and a virtual COM port referred to as the backchannel UART. JP4 and JP5 control the selection of which UART from the MSP432E401Y is connected to the backchannel UART virtual COM port. In the default configuration, UART0 maps to the backchannel UART of the XDS-110. In the CAN jumper configuration, UART2 maps to the backchannel UART of the XDS-110.
Hardware Description
3 Software Development
This chapter provides general information on software development as well as instructions for flash memory programming.
3.1 Software Description
The SimpleLink MSP432E4 Software Development Kit (SDK) provides drivers for all of the peripheral devices supplied in the design. The Peripheral Driver Library is required to operate the on-chip peripherals as part of SDK.
The SDK includes a set of example applications that use the Peripheral Driver Library. These applications demonstrate the capabilities of the MSP432E401Y microcontroller, as well as provide a starting point for the development of the final application for use on the Ethernet LaunchPad development kit.
3.2 Source Code
The source code is provided as part of the SimpleLink MSP432E4 SDK.
3.3 Tool Options
The source code installation includes directories containing projects, makefiles, and binaries for the following tool-chains:
Keil Arm RealView®Microcontroller Development System
IAR Embedded Workbench®for Arm
TI Code Composer Studio IDE for Arm and GCC compilers.
For detailed information on using the tools, see the documentation included in the tool chain installation or visit the website of the tools supplier.
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Software Development
3.4 Programming the Ethernet LaunchPad Development Kit
The SimpleLink MSP432E4 SDK includes projects for each of the example applications for the different supported tool chains. If you installed the SimpleLink MSP432E4 SDK to the default installation path of
C:\ti\, you can find the example applications in C:\ti\
simplelink_msp432e4_sdk_<version>\examples\. The onboard XDS-110 is used with the
supported toolchain to program applications on the MSP-EXP432E401Y LaunchPad development kit. Follow these steps to program example applications into the Ethernet LaunchPad development kit using
the XDS-110:
1. Install a toolchain on a PC running Microsoft Windows.
2. Connect the USB-A cable plug in to an available USB port on the PC and plug the Micro-B plug to the XDS-110 USB port at the top of the MSP-EXP432E401Y LaunchPad development kit.
3. Verify the RED LED on the left side of the XDS-110 is illuminated.
4. Run the toolchain and import the project. Build the project to generate the toolchain specific output file.
5. Press on the download and debug button for the toolchain to download the code.
6. After the code has been downloaded to the MSP-EXP432E401Y LaunchPad development kit, run the code.
4 PCB Schematics
The following figures show the schematics of the Ethernet LaunchPad development kit.
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SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™ Development Kit (MSP-EXP432E401Y)
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1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
1 6
10/12/2017
MCU023_MSP432E_GPIO_USB.SchDoc
Sheet Title:
Size:
Mod. Date:
File:
Sheet: of
B
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Contact:
http://www.ti.com/support
MSP-EXP432E401YProject Title:
Designed for:Public Release
AssemblyVariant: 001
©TexasInstruments 2017
Drawn By: Engineer:
Mike Pridgen
Texas Instrumentsand/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. TexasInst ruments and/or its licensors do not warrant that this designwill meet the specificatio ns, will be suitable foryour application or fit fo r any particular purpose,or will operate in an imp lementation. Texas Instrumentsand/or its licensors donot warrant that the design is product ion worthy.You should completely validate and testyour design implementation to confirm the system functionality for your application.
Version controldisabledSVN Rev:
MCU023Number: Rev: 1.1
TID #: N/A
Orderable: MSP-EXP432E401Y
PD0
1
PD1
2
PD2
3
PD3
4
PE3
12
PE2
13
PE1
14
PE0
15
PK0
18
PK1
19
PK2
20
PK3
21
PC7
22
PC6
23
PC5
24
PC4
25
PH0
29
PH1
30
PH2
31
PH3
32
PA0
33
PA1
34
PA2
35
PA3
36
PA4
37
PA5
38
PA6
40
PA7
41
PF0
42
PF1
43
PF2
44
PF3
45
PF4
46
PG0
49
PG1
50
PK7
60
PK6
61
PK5
62
PK4
63
PB2
91
PB3
92
PB0
95
PB1
96
PC3/TDO/SWO
97
PC2/TDI
98
PC1/TMS/SWDIO
99
PC0/TCK/SWCLK
100
PJ0
116
PJ1
117
PB5
120
PB4
121
PE4
123
PE5
124
PD4
125
PD5
126
PD6
127
PD7
128
U1A
MSP432E401YTPDTR
PQ0
5
PQ1
6
PQ2
11
PQ3
27
PM7
71
PM6
72
PM5
73
PM4
74
PM3
75
PM2
76
PM1
77
PM0
78
PL0
81
PL1
82
PL2
83
PL3
84
PL4
85
PL5
86
PL7
93
PL6
94
PQ4
102
PP2
103
PP3
104
PP4
105
PP5
106
PN0
107
PN1
108
PN2
109
PN3
110
PN4
111
PN5
112
PP0
118
PP1
119
U1B
MSP432E401YTPDTR
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7
PB0
PB2 PB3 PB4 PB5
PC4 PC5 PC6 PC7
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
PE0 PE1 PE2 PE3 PE4 PE5
PF1 PF2 PF3 PF4
PF0
PG0 PG1
PH0 PH1 PH2 PH3
PK0 PK1 PK2 PK3 PK4 PK5 PK6 PK7
PJ0 PJ1
PL0 PL1 PL2 PL3 PL4 PL5 USBD_P USBD_N
PM0 PM1 PM2 PM3 PM4 PM5 PM6 PM7
PN0 PN1 PN2 PN3 PN4 PN5
PP0 PP1 PP2 PP3 PP4 PP5
PQ0 PQ1 PQ2 PQ3 PQ4
1.0M
R52
3300pF
C32
100
R18
D+
1
D-
2
ID
3
GND4NC
5
VBUS
6
U2
TPD4S012DRYR
34
12
USR_SW1
34
12
USR_SW2
Green
1
2
D1
Green
1
2
D2
390
R33
GND
GND
GND
USBD_N
USBD_P
TARGET_ID
TARGET_ID
PB0
USBD_N USBD_P
GND
NOTE: TPD4S012 all protection circuits are identical
Connections chosenfor simple routing.
GND GND
PN0 PN1
See PF0 andPF4 for additional LED's used for
Ethernet anduser application
PJ0
PJ1
GND GND
GNDGND
+3.3V
1
Analog_In
2
LP_UART_RX
3
LP_UART_TX
4
GPIO!
5
AnalogIn
6
SPI_CLK
7
GPIO!
8
I2C_SCL
9
I2C_SDA
10
+5V
21
GND
22
Analog_In
23
Analog_In
24
Analog_In
25
Analog_In
26
Analog_In/I2S_WS
27
Analog_In/I2S_SCLK
28
Analog_Out/I2S_SDout
29
Analog_Out/I2S_SDin
30
J1/J3
+3.3V
1
Analog_In
2
LP_UART_RX
3
LP_UART_TX
4
GPIO!
5
AnalogIn
6
SPI_CLK
7
GPIO!
8
I2C_SCL
9
I2C_SDA
10
+5V
21
GND
22
Analog_In
23
Analog_In
24
Analog_In
25
Analog_In
26
Analog_In/I2S_WS
27
Analog_In/I2S_SCLK
28
Analog_Out/I2S_SDout
29
Analog_Out/I2S_SDin
30
J5/J7
GPIO!
31
GPIO!
32
GPIO!
33
GPIO!
34
Timer_Cap/GPIO!
35
Timer_Cap/GPIO!
36
PWM/GPIO!
37
PWM/GPIO!
38
PWM/GPIO!
39
PWM/GPIO!
40
GPIO!
11
SPI_CS/GPIO!
12
SPI_CS/GPIO!
13
SPI_MISO
14
SPI_MOSI
15
RST
16
GPIO
17
GPIO!
18
PWM/GPIO!
19
GND
20
J2/J4
GPIO!
31
GPIO!
32
GPIO!
33
GPIO!
34
Timer_Cap/GPIO!
35
Timer_Cap/GPIO!
36
PWM/GPIO!
37
PWM/GPIO!
38
PWM/GPIO!
39
PWM/GPIO!
40
GPIO!
11
SPI_CS/GPIO!
12
SPI_CS/GPIO!
13
SPI_MISO
14
SPI_MOSI
15
RST
16
GPIO
17
GPIO!
18
PWM/GPIO!
19
GND
20
J6/J8
GND
GND
GND
GND
+3V3
+3V3
+5V
+5V
BoosterPack1 Interface
BoosterPack2 Interface
PE4 PC4 PC5 PC6 PE5 PD3 PC7 PB2 PB3
PE0 PE1 PE2 PE3 PD7 PD6 PM4 PM5
PF1 PF2 PF3 PG0 PL4 PL5 PL0 PL1 PL2 PL3
PM3 PH2 PH3 TARGET_RESET PD1 PD0 PN2 PN3 PP2
PD2 PP0 PP1
PQ0 PP4 PN5 PN4
PB4 PB5 PK0 PK1 PK2 PK3 PA4 PA5
PG1 PK4 PK5 PM0 PM1 PM2 PH0 PH1 PK6 PK7
PM7 PP5 PA7
PP3 PQ1 PM6
PQ2 PQ3
0
R19
DNP
0
R20
DNP
PA3
PA2
0.1µF
C23
0.1µF
C25
GND
GND
R19 and R20can be populated to enable I2c on
Right side of BP2 interface. This is for legacy
supportand the Sensor Hub BoosterPack
I2C and SSI areavailable on the corresponding
BoosterPack 1interface pins without modificaiton t o
the board.
PA6and PA7 are also used by the onboard radio. Configure the radio to tri-state these GPIO beofre
using themon the boosterpack interface
1 2 3 4
JP4
1 2 3 4
JP5
TARGET_RXD
TARGET_TXD
PD4
PD5
PA0
PA1
BP2_5
BP2_6
BP2_5 BP2_6
JP4 andJP5 CAN and Backchannel UART Selection:
Populate Jumpersfrom 1-2 and 3-4 for default Mode
This enablesROM UART bootloader. UART0 toXDS
Populate from 1-3 and2-4 for controller area netwo rk on the boosterpack. UART2 is then available to XDS
PF4
PF0
TARGET_VBUS TARGET_VBUS
TARGET_VBUS
TGT_RST
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98
J10
DNP
PQ4
PD6
PB4 PB5 PH0 PH1 PH2 PH3
PC4
PC5
PC6
PC7
PA6 PA7
PG0
PG1
PM0
PM1
PM2
PM3
PL0 PL1 PL2 PL3 PQ0 PQ1 PQ2 PQ3
PK6
PK7
PL4 PB2 PB3 PP2
PK4
PK5
PP3
PL5 PN4 PN5 PN0 PN1 PN2 PN3 PQ4
PF0 PF1 PF2 PF3
PF4
PA0 PA1 PP4 PP5 PJ0 PJ1
PM4
PM5
PM6
PM7
TARGET_RESET
PB0
PD4
PD5
PD6
PD7
PD0
PD1
PD2
PD3
PP0 PP1
PA2 PA3 PA4 PA5 PE0 PE1 PE2 PE3 PE4 PE5 PK0 PK1 PK2 PK3 VREF+
VREF+
TARGET_VBUS
GND
GND GND
GND
GNDGND
0.1µF
C28
0.1µF
C27
+5V+3V3
GND
Wake
Wake
GND
0.1µF
C30
0.1µF
C29
+5V +3V3
GND
NOTE: PB0 and PB1 are used in some
configurationswith 5V signals especially in USB
Host or OTG mode. Be aware the 5V may be
present onthese pins depending on system jumper
configuration.
These pinsare only 5V tolerant when configured for
USB modeapplications
This isthe breadboard connection header.
SamtecTSW-149-08-F-S-RA and TSW-149-F-S-RE
can be usedtogether to create a breadboard
connector.
See the Users Manual for more information
TP14
DNP
TP15
DNP
TP16
DNP
TP17
DNP
GND
TP4
DNP
TP5
DNP
TP6
DNP
TP7
DNP
TARGET_RESET
390
R27
TDO_SWO
TDI
TARGET_RXD
TARGET_TXD
VBUS
1
D-
2
D+
3
ID
4
GND
5
6781110
9
U7 ZX62D-AB-5P8
TMS_SWDIO
10kR110k
R2
TCK_SWDCLK
TMS_SWDIO
MCU_3V3
1 2
3 4
5 6
7 8
9 10
BSL
DNP
BSL_P9 BSL_P10
BSL_P1
BSL_P3
DNP
R3
DNP
0
R4
DNP
R5
DNP
DNP
R6
DNP
DNP
R7
DNP
DNP
R8
DNP
DNP
R9
DNP
DNP
R10
DNP
DNP
R11
DNP
DNP
R12
DNP
GND
UARTI2C
SPI
BSL_P1BSL_P1
BSL_P1
PA1
PA0PB2
PB3
PA2
PA3
PA4
PA5
TX
RXSCL
MISO
MOSI
SCL
CS
BSL_P3
BSL_P3BSL_P9
BSL_P10
BSL_P9
TGT_RST
+3V3 +3V3
DNP
R14
DNP
DNP
R13
DNP
+3V3 +3V3
0.1µF
C26
0.1µF
C24
TCK_SWDCLK
TMS_SWDIO
SDA
TCK_SWDCLK
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PCB Schematics
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2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
2 6
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MSP-EXP432E401YProject Title:
Designed for:Public Release
AssemblyVariant: 001
©TexasInstruments 2017
Drawn By: Engineer:
Mike Pridgen
Texas Instrumentsand/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. TexasInst ruments and/or its licensors do not warrant that this designwill meet the specificatio ns, will be suitable foryour application or fit fo r any particular purpose,or will operate in an imp lementation. Texas Instrumentsand/or its licensors donot warrant that the design is product ion worthy.You should completely validate and testyour design implementation to confirm the system functionality for your application.
Version controldisabledSVN Rev:
MCU023Number: Rev: 1.1
TID #: N/A
Orderable: MSP-EXP432E401Y
0.1µF
C16
0.1µF
C17
49.9
R21
49.9
R22
49.9
R23
49.9
R24
75
R32
75
R43
75
R4575R46
2
1
3
5
6
4
7
8
2.8V
U13
SLVU2.8-4.TBT
2 3 4
1
5 6 7 8
9 10 11 12
U14
1-406541-1
EN0RXIN
53
EN0RXIP
54
EN0TXON
56
EN0TXOP
57
RBIAS
59
WAKE64HIB
65
XOSC0
66
XOSC1
67
RST
70
OSC0
88
OSC1
89
U1C
MSP432E401YTPDTR
Green
1
2
D4
Green
1
2
D3
390
R31
390
R30
GND GND
PF4 PF0
PF4 PF0
1000pF
C1
4700pF
C31
1.0M
R47
GND
0.1µF
C18
0.1µF
C22
MCU_3V3
MCU_3V3
GNDGND
MCU_3V3
Place pull up resistorsand C16, C17 near MCU
EN0TXO_N
EN0RXI_P
EN0RXI_N
EN0TXO_P
EN0TXO_N
EN0RXI_P
EN0RXI_N
341
2
RESET_SW1
100
R51
GND
10k
R44
MCU_3V3
EN0RXI_P
EN0RXI_N
EN0TXO_N
EN0TXO_P
VDD
7
VDDA
8
VREFA+
9
GNDA
10
VDD
16
GND
17
VDD
26
VDD
28
VDD
39
VDD
47
GND
48
VDD
51
VDD
52
GND
55
GND
58
VBAT
68
VDD
69
VDD
79
GND
80
VDDC
87
VDD
90
VDD
101
VDD
113
GND
114
VDDC
115
VDD
122
U1D
MSP432E401YTPDTR
341
2
Wake_SW4
GND
WAKE
1.0M
R42
0
R39
0.1µF
C3
51
R38
GND
0
R41
0.1µF
C43
0.1µF
C42
0.1µF
C41
0.1µF
C40
MCU_3V3
GND
0.1µF
C4
1µF
C14
2.2µF
C15
GND
GND
2.0k
R49
1
3 4
2
G
G
25 MHz
Y1
12pF
C44
12pF
C45
12pF
C47
12pF
C48
GND GND
GND
GND
4.87k
R25
GND
1
IN
2
EN1
3
EN2
4
OC2
5
OUT2
6
OUT1
7
OC1
8
PAD
9
U4
TPS2052BDRBR
10k
R35
100k
R36
VBUS
100k
R26
GND
JP6
PQ4
PQ4
+5V
TARGET_VBUS
GND
TPS2052B providescurrent limit for main 5V power
Also providespower switching for USB host/OTG mode s
For Host/OTG:
PD6 configuredas USB0EPEN peripheral function
PQ4 configureas individual pin interrupt. Indicates power faulton the USB bus. USB0PFLT peripheral pin not availabledue to pin mux and use on BoosterPack s
USB Hostmode does not supply power to devices
when powered from aBoosterPack
ForApplications that do not use USB: Configure PD6 as inputwith internal pull-down enabled. Turns of power to TARGET_VBUS
1 2 3 4 5 6
JP1
DEBUG_VBUS
TARGET_VBUS
VBUS
VREF+
Wake
Place C18 andC22 near pin 2 and pin 7 of U10
For Ethernetexample Applications:
LED4 is defaultconfigured as Ethernet Link OK
LED3 is defaultconfigured as Ethernet TX/RX activi ty
User may re-configure thesepins / LED's for any
applicationusage
Power Control Jumper:
1) To power from Debug install jumper on pins 5-6
2) To power fromTarget USB installjumper on pins 3-4
3) To powerfrom BoosterPack 5V install jumper on pins1-2 This is also theoff position if BoosterPack does n ot
supplypower
When poweredfrom BoosterPack TPS2052B does not
provide current limit protection
When poweredby BoosterPack, USB host mode does not
supplypower to connected devices
TP9
DNP
TP10
DNP
TP11
DNP
TP13
DNP
JP2 +3V3
TP8
DNP
JP7
10k
R50
PD6
PD6
GND
EN0TXO_P
1 2
GND
3
32.768 kHz
Y3
VDDC
TP12
DNP
0.1µF
C46
TARGET_RESET
TGT_RST
1
2
3
5.0V
GND
GND
J13
1
2
3
3.3V
GND
GND
J12
GND
GND
+3V3
+5V
EPHYRX_P
EPHYTX_P
EPHYTX_N
EPHYRX_N
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
U10
HX1198FNLT
GND
GND
GND
PCB Schematics
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Figure 6. Ethernet LaunchPad Development Kit Schematics (2 of 5)
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
3 6
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MCU023_XDS110_USB_Power.SchDoc
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Mod. Date:
File:
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MSP-EXP432E401YProject Title:
Designed for:Public Release
AssemblyVariant: 001
©TexasInstruments 2017
Drawn By: Engineer:
Mike Pridgen
Texas Instrumentsand/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. TexasInst ruments and/or its licensors do not warrant that this designwill meet the specificatio ns, will be suitable foryour application or fit fo r any particular purpose,or will operate in an imp lementation. Texas Instrumentsand/or its licensors donot warrant that the design is product ion worthy.You should completely validate and testyour design implementation to confirm the system functionality for your application.
Version controldisabledSVN Rev:
MCU023Number: Rev: 1.1
TID #: N/A
Orderable: MSP-EXP432E401Y
IO1
1
IO2
2
GND
3
IO3
4
IO4
5
VCC
6
IC102
TPD4E004DRYR
VBUS
1
D-
2
D+
3
ID
4
GND
5
678
11
10
9
USB101
XDS_VCC
XDS_ID
XDS_DP
XDS_DM
XDS_VBUS
XDS_ID
XDS_VBUS
XDS_DP XDS_DM
XDS_VBUS VBUS_DETECT
IN
1
IN
2
OUT
3
OUT
4
FB
5
6
NC
7
EN
8
9
GND
IC101
TPS79601DRBR
2.2µF
C148
2.2µF
C149
15pF
C147
220k
R124
51k
R133
30k
R134
1.00M
R132
3300pF
C102
XDS_GND
XDS_GND
XDS_GND XDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
330k
R122
0
R101
0
R102
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PCB Schematics
25
SLAU748B– October 2017–Revised September 2018
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Figure 7. Ethernet LaunchPad Development Kit Schematics (3 of 5)
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
4 6
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Sheet: of
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MSP-EXP432E401YProject Title:
Designed for:Public Release
AssemblyVariant: 001
©TexasInstruments 2017
Drawn By: Engineer:
Mike Pridgen
Texas Instrumentsand/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. TexasInst ruments and/or its licensors do not warrant that this designwill meet the specificatio ns, will be suitable foryour application or fit fo r any particular purpose,or will operate in an imp lementation. Texas Instrumentsand/or its licensors donot warrant that the design is product ion worthy.You should completely validate and testyour design implementation to confirm the system functionality for your application.
Version controldisabledSVN Rev:
MCU023Number: Rev: 1.1
TID #: N/A
Orderable: MSP-EXP432E401Y
1 2 3 4 5 6 7 8 9 10
J102
1 2 3 4 5 6 7 8 9 10
J11
XDS_VBUS XDS_VCC XDS_TXD XDS_RXD
XDS_TMS_SWDIO
XDS_RESET_OUT
XDS_TCK_SWDCLK XDS_TDO_SWO XDS_TDI
GND
DEBUG_VBUS +3V3
IO1
1
IO2
2
IO3
3
GND
4
IO4
5
IO5
6
IO6
7
VCC
8
U108
TPD6E004RSER
IO1
1
IO2
2
IO3
3
GND
4
IO4
5
IO5
6
IO6
7
VCC
8
U8
TPD6E004RSER
GND
GND
XDS_VCC
+3V3XDS_VCC
3.3k
R158
XDS_GND
XDS_GND
XDS_GND
RXD TXD
TMS_SWDIO TCK_SWDCLK TDO_SWO TDI
TMS_SWDIO TCK_SWDCLK TDO_SWO TDI
TARGET_RXD TARGET_TXD TGT_RST
12 34 56 78 910 1112 1314 15 17 19
16 18 20
J101
PCB Schematics
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Figure 8. Ethernet LaunchPad Development Kit Schematics (4 of 5)
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
5 6
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MSP-EXP432E401YProject Title:
Designed for:Public Release
AssemblyVariant: 001
©TexasInstruments 2017
Drawn By: Engineer:
Mike Pridgen
Texas Instrumentsand/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. TexasInst ruments and/or its licensors do not warrant that this designwill meet the specificatio ns, will be suitable foryour application or fit fo r any particular purpose,or will operate in an imp lementation. Texas Instrumentsand/or its licensors donot warrant that the design is product ion worthy.You should completely validate and testyour design implementation to confirm the system functionality for your application.
Version controldisabledSVN Rev:
MCU023Number: Rev: 1.1
TID #: N/A
Orderable: MSP-EXP432E401Y
PD0
1
PD1
2
PD2
3
PD3
4
PE3
12
PE2
13
PE1
14
PE0
15
PK0
18
PK1
19
PK2
20
PK3
21
PC7
22
PC6
23
PC5
24
PC4
25
PH0
29
PH1
30
PH2
31
PH3
32
PA0
33
PA1
34
PA2
35
PA3
36
PA4
37
PA5
38
PA6
40
PA7
41
PF0
42
PF1
43
PF2
44
PF3
45
PF4
46
PG0
49
PG1
50
PK7
60
PK6
61
PK5
62
PK4
63
PB2
91
PB3
92
PB0
95
PB1
96
PC3/TDO/SWO
97
PC2/TDI
98
PC1/TMS/SWDIO
99
PC0/TCK/SWCLK
100
PJ0
116
PJ1
117
PB5
120
PB4
121
PE4
123
PE5
124
PD4
125
PD5
126
PD6
127
PD7
128
IC106A
TM4C129ENCPDTI3R
PQ0
5
PQ1
6
PQ2
11
PQ3
27
PM7
71
PM6
72
PM5
73
PM4
74
PM3
75
PM2
76
PM1
77
PM0
78
PL0
81
PL1
82
PL2
83
PL3
84
PL4
85
PL5
86
PL7
93
PL6
94
PQ4
102
PP2
103
PP3
104
PP4
105
PP5
106
PN0
107
PN1
108
PN2
109
PN3
110
PN4
111
PN5
112
PP0
118
PP1
119
IC106B
TM4C129ENCPDTI3R
EN0RXIN
53
EN0RXIP
54
EN0TXON
56
EN0TXOP
57
RBIAS
59
WAKE64HIB
65
XOSC0
66
XOSC1
67
RST
70
OSC0
88
OSC1
89
IC106C
TM4C129ENCPDTI3R
VDD
7
VDDA
8
VREFA+
9
GNDA
10
VDD
16
GND
17
VDD
26
VDD
28
VDD
39
VDD
47
GND
48
VDD
51
VDD
52
GND
55
GND
58
VBAT
68
VDD
69
VDD
79
GND
80
VDDC
87
VDD
90
VDD
101
VDD
113
GND
114
VDDC
115
VDD
122
IC106D
TM4C129ENCPDTI3R
XDS_RXD XDS_TXD XDS_TCK_SWDCLK XDS_TMS_SWDIO XDS_TDO_SWO XDS_TDI XDS_RESET_OUT
ITCK ITMS ITDI ITDO
XDS_ID
XDS_VBUS
VBUS_DETECT
XDS_VCC
XDS_VCC
IC6A
2.5V
XDS_VCC
XDS_VCC
XDS_DP XDS_DM
1 2 3 4 5 6
7
8
9
10
J108
TC2050-IDC-NL-FP
XDS_VCC
XDS_VCC
0.1µF
C139
0.1µF
C138
0.1µF
C132
0.1µF
C143
0.1µF
C146
12pF
C133
12pF
C134
1µF
C140
1µF
C142
1µF
C144
0.01µF
C135
0.01µF
C136
0.01µF
C137
0.01µF
C141
0.01µF
C150
0.01µF
C159
2.2µF
C145
10k
R117
DNP
R121
DNP
100
R120
100
R166
4.87k
R128
51
R131
470
R123
470
R125
XDS_GND
XDS_GND XDS_GND
XDS_GNDXDS_GND
XDS_GNDXDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
XDS_GND
Red
1
2
LED102
Green
1
2
LED101
1.0k
R118
1.0k
R108
1.0k
R109
1.0k
R110
1.0k
R111
XDS_VCC
1 3 4
2
G G
16 MHz
Q101
XDS_GND
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PCB Schematics
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Figure 9. Ethernet LaunchPad Development Kit Schematics (5 of 5)
Revision History
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Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from July 20, 2018 to September 11, 2018 ...................................................................................................... Page
Clarified function of JP1 in the first paragraph of Section 2.1.6.4, Other Headers and Jumpers ............................. 17
Added the last sentence in Section 2.3.2, External Debugger .................................................................... 21
28
Revision History
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1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system.
2 Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM. User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10) business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period.
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3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs (which for the avoidance of doubt are stated strictly for convenience and should be verified by User):
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18328日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
3.4 European Union
3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a
low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures.
4 EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free.
6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8. Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS OR THE USE OF THE EVMS , REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE (12) MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY USE OF AN EVM PROVIDED HEREUNDER, INCLUDING FROM ANY WARRANTY, INDEMITY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS, , EXCEED THE TOTAL AMOUNT PAID TO TI BY USER FOR THE PARTICULAR EVM(S) AT ISSUE DURING THE PRIOR TWELVE (12) MONTHS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2018, Texas Instruments Incorporated
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These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.
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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
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