Texas Instruments NE555PSLE, NE555D, NE555DR, NE555Y, NE555PSR Datasheet

...
CHIP FORM
NE555Y
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
D
Timing From Microseconds to Hours
D
D
Adjustable Duty Cycle
D
TTL-Compatible Output Can Sink or Source up to 200 mA
D
Functionally Interchangeable With the
D, JG, OR P PACKAGE
(TOP VIEW)
GND
TRIG
RESET
OUT
1 2 3 4
8 7 6 5
V
CC
DISCH THRES CONT
Signetics NE555, SA555, SE555, SE555C; Have Same Pinout
FK PACKAGE
(TOP VIEW)
SE555C FROM TI IS NOT RECOMMENDED FOR NEW DESIGNS
description
These devices are precision monolithic timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor
NC
TRIG
NC
OUT
NC
NC
GND
NC
32120 19
4 5 6 7 8
910111213
VCC
NC
18 17 16 15 14
NC DISCH NC THRES NC
network. In the astable mode of operation, the
NC
NC
CONT
. These levels can
CC
frequency and duty cycle may be independently controlled with two external resistors and a single external capacitor.
NC–No internal connection
NC
RESET
The threshold and trigger levels are normally two-thirds and one-third, respectively , of V be altered by use of the control voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. RESET can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset and the output goes low. Whenever the output is low, a low-impedance path is provided between DISCH and ground.
The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of 5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.
The NE555 is characterized for operation from 0°C to 70°C. The SA555 is characterized for operation from –40°C to 85°C. The SE555 and SE555C are characterized for operation over the full military range of –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGE
T
A
0°C to 70°C 11.2 V NE555D NE555P
–40°C to 85°C 11.2 V SA555D SA555P
–55°C to 125°C
The D package is available taped and reeled. Add the suffix R to the device type (e.g., NE555DR).
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
V
THRES
VCC = 15 V
10.6 V
11.2 V
max
SMALL OUTLINE
(D)
SE555D SE555CD
CHIP CARRIER
(FK)
SE555FK SE555CFK
CERAMIC DIP
(J)
SE555JG SE555CJG
PLASTIC DIP
(P)
SE555P SE555CP
Copyright 1992, Texas Instruments Incorporated
(Y)
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1
NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
RESET
Low Irrelevant Irrelevant Low On High < 1/3 V High > 1/3 V High > 1/3 V
Voltage levels shown are nominal.
functional block diagram
TRIGGER VOLTAGE†THRESHOLD VOLTAGE
DD DD DD
FUNCTION TABLE
OUTPUT DISCHARGE SWITCH
Irrelevant High Off > 2/3 V < 2/3 V
DD DD
Low On
As previously established
V
CC
8
CONT
5
R
TRIG
6
R
2
R
1
GND
THRES
RESET can override TRIG, which can override THRES. Pin numbers shown are for the D, JG, and P packages only.
RESET 4
R1
R
S
1
3
7
OUT
DISCH
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
chip information
These chips, properly assembled, display characteristics similar to the NE555 (see electrical table for NE555Y). Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
41
(5)
(6)
BONDING PAD ASSIGNMENTS
(3)
(4)
42
(7)
(1)
(8)
(2)
THRES
TRIG
CONT
V
CC
(8)
R
(6)
R
(2)
R
(1)
GND
CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJ max = 150° C TOLERANCES ARE ± 10% ALL DIMENSIONS ARE IN MILS PIN (1) INTERNALLY CONNECTED
TO BACKSIDE OF CHIP
(5)
RESET
(4)
R1 R S
1
(3)
(7)
OUT
DISCH
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
NE555, NE555Y, SA555, SE555, SE555C
UNIT
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (See Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (CONT, RESET, THRES, and TRIG) V
Output current ±225 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: NE555 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SA555 –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SE555, SE555C –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package 260°C. . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
D 725 mW 5.8 mW/°C 464 mW 377 mW N/A
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW JG (SE555, SE555C) 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW JG (SA555, NE555C) 825 mW 6.6 mW/°C 528 mW 429 mW N/A
P 1000 mW 8.0 mW/°C 640 mW 520 mW N/A
TA 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
CC
recommended operating conditions
NE555 SA555 SE555 SE555C
MIN MAX MIN MAX MIN MAX MIN MAX
Supply voltage, V Input voltage (CONT, RESET , THRES, and TRIG) V Output current ±200 ±200 ±200 ±200 mA Operating free-air temperature, T
CC
A
4.5 16 4.5 16 4.5 18 4.5 16 V CC
0 70 –40 85 –55 125 –55 125 °C
V
CC
V
CC
V
CC
V
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
THRES voltage level
V
TRIG voltage level
V
RESET current
mA
CONT voltage (open circuit)
V
V
V
Low-level output voltage
V
V
5 V
V
15 V
Output lo
No load
Supply current
mA
Output high
load
CONDITIONS
Initial error of timing interval‡
T
25°C
T
MIN to MAX
ppm/°C
yg y
T
25°C
%/V
L
,
ns
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
electrical characteristics, VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS
VCC = 15 V 9.4 10 10.6 8.8 10 11.2 VCC = 5 V 2.7 3.3 4 2.4 3.3 4.2
THRES current (see Note 2) 30 250 30 250 nA
VCC = 15 V 4.8 5 5.2 4.5 5 5.6
VCC = 5 V 1.45 1.67 1.9 1.1 1.67 2.2 TRIG current TRIG at 0 V 0.5 0.9 0.5 2 µA RESET voltage level 0.3 0.7 1 0.3 0.7 1 V
RESET at V
RESET at 0 V –0.4 –1 –0.4 –1.5 DISCH switch off-state current 20 100 20 100 nA
p
p
High-level output voltage
pp
NOTE 2: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when
VCC = 5 V, the maximum value is R = RA + RB 3.4 M, and for VCC = 15 V, the maximum value is 10 MΩ.
VCC = 15 V 9.6 10 10.4 9 10 11
VCC = 5 V 2.9 3.3 3.8 2.6 3.3 4
CC
CC
CC
VCC = 5 V IOH = –100 mA 3 3.3 2.75 3.3
p
p
= 15
=
=
w,
CC
,No
IOL = 10 mA 0.1 0.15 0.1 0.25 IOL = 50 mA 0.4 0.5 0.4 0.75 IOL = 100 mA 2 2.2 2 2.5 IOL = 200 mA 2.5 2.5 IOL = 5 mA 0.1 0.2 0.1 0.35 IOL = 8 mA 0.15 0.25 0.15 0.4 IOH = –100 mA 13 13.3 12.75 13.3 IOH = –200 mA 12.5 12.5
VCC = 15 V 10 12 10 15 VCC = 5 V 3 5 3 6 VCC = 15 V 9 10 9 13 VCC = 5 V 2 4 2 5
SE555
MIN TYP MAX MIN TYP MAX
0.1 0.4 0.1 0.4
NE555, SA555,
SE555C
UNIT
V
operating characteristics, VCC = 5 V and 15 V
Temperature coefficient of timing interval
Supply voltage sensitivity of timing interval
Output pulse rise time Output pulse fall time
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run.
§
Values specified are for a device in a monostable circuit similar to Figure 9, with component values as follow: RA = 2 kto 100 k, C = 0.1 µF.
Values specified are for a device in an astable circuit similar to Figure 12, with component values as follow: RA = 1 kto 100 kΩ, C = 0.1 µF.
PARAMETER
Each timer, monostable§ Each timer, astable¶ Each timer, monostable§ Each timer, astable¶ Each timer, monostable§ Each timer, astable¶
TEST
MIN TYP MAX MIN TYP MAX
°
=
A
=
A
°
=
A
C
= 15 pF,
TA = 25°C
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SE555
0.5% 1.5% 1% 3%
1.5% 2.25% 30 100 50 90 150
0.05 0.2 0.1 0.5
0.15 0.3 100 200 100 300 100 200 100 300
NE555, SA555,
SE555C
UNIT
pp
°
5
NE555, NE555Y, SA555, SE555, SE555C
THRES voltage level
V
TRIG voltage level
V
RESET current
mA
CONT voltage (open circuit)
V
V
V
Low-level output voltage
V
V
V
V
V
Output lo
load
Supply current
mA
Output high, No load
Initial
l
Suppl
oltage sensitivity of timing interval
%/V
C
15 pF
ns
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
electrical characteristics, VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC = 15 V 8.8 10 11.2 VCC = 5 V 2.4 3.3 4.2
THRES current (see Note 2) 30 250 nA
VCC = 15 V 4.5 5 5.6
VCC = 5 V 1.1 1.67 2.2 TRIG current TRIG at 0 V 0.5 2 µA RESET voltage level 0.3 0.7 1 V
RESET at V
RESET at 0 V –0.4 –1.5 DISCH switch off-state current 20 100 nA
p
p
High-level output voltage
pp
NOTE 2: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when
VCC = 5 V, the maximum value is R = RA + RB 3.4 M, and for VCC = 15 V, the maximum value is 10 M
VCC = 15 V 9 10 11
VCC = 5 V 2.6 3.3 4
CC
CC
CC
VCC = 5 V IOH = –100 mA 2.75 3.3
p
p
= 15
= 5
= 15
CC
w, No
IOL = 10 mA 0.1 0.25 IOL = 50 mA 0.4 0.75 IOL = 100 mA 2 2.5 IOL = 200 mA 2.5 IOL = 5 mA 0.1 0.35 IOL = 8 mA 0.15 0.4 IOH = –100 mA 12.75 13.3 IOH = –200 mA 12.5
VCC = 15 V 10 15 VCC = 5 V 3 6 VCC = 15 V 9 13 VCC = 5 V 2 5
0.1 0.4
V
operating characteristics, VCC = 5 V and 15 V, TA = 25°C (unless otherwise noted)
error of timing interva
pp
y v
Output pulse rise time Output pulse fall time
Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run.
Values specified are for a device in a monostable circuit similar to Figure 9, with component values as follow: RA = 2 kto 100 k, C = 0.1 µF.
§
Values specified are for a device in an astable circuit similar to Figure 12, with component values as follow: RA = 1 kto 100 kΩ, C = 0.1 µF.
6
PARAMETER
Each timer, monostable Each timer, astable Each timer, monostable Each timer, astable
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§
§
TEST
CONDITIONS
=
L
MIN TYP MAX UNIT
1% 3%
2.25%
0.1 0.5
0.3
p
100 300 100 300
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
10
7
VCC = 5 V
4
2
TA = – 55°C
1
0.7
0.4
0.2
0.1
0.07
– Low-Level Output Voltage – VV
OL
0.04
0.02
0.01 1 2 4 7 10 20 40 70 100
TA = 25°C
TA = 125°C
IOL – Low-Level Output Current – mA
Figure 1
– Low-Level Output Voltage – VV
OL
10
7 4
2
1
0.7
0.4
0.2
0.1
0.07
0.04
0.02
0.01
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VCC = 10 V
TA = 25°C
TA= – 55°C
TA = 125°C
1 2 4 7 10 20 40 70 100
IOL – Low-Level Output Current – mA
Figure 2
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
10
7
VCC = 15 V
4
2
1
0.7
0.4
0.2 TA = 125°C
0.1
0.07
– Low-Level Output Voltage – VV
0.04
OL
0.02
0.01 1 2 4 7 10 20 40 70 100
IOL – Low-Level Output Current – mA
TA = 25
TA = – 55
°C
Figure 3
°C
DROP BETWEEN SUPPLY VOLTAGE AND OUTPUT
vs
HIGH-LEVEL OUTPUT CURRENT
2.0
1.8
1.6
1.4
1.2
1
– Voltage Drop – V
0.8
OH
V –
0.6
CC
V
0.4
0.2 0
TA = – 55°C
TA = 25°C
TA = 125°C
VCC = 5 V to 15 V
IOH – High-Level Output Current – mA
Figure 4
100704020107421
Data for temperatures below 0°C and above 70°C are applicable for SE555 circuits only .
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
7
NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
SUPPLY CURRENT
SUPPLY VOLTAGE
10
Output Low,
9
No Load
8
7
6 5
4
3
– Supply Current – mA
CC
I
2 1 0
TA = 25°C
567891011
VCC – Supply Voltage – V
TYPICAL CHARACTERISTICS
vs
TA = –55°C
TA = 125°C
12 13 14 15
NORMALIZED OUTPUT PULSE DURATION
(MONOSTABLE OPERATION)
SUPPLY VOLTAGE
1.015
1.010
CC
VPulse Duration Relative to Value at = 10 V
1.005
1
0.995
0.990
0.985 0510
VCC – Supply Voltage – V
vs
15 20
NORMALIZED OUTPUT PULSE DURATION
(MONOSTABLE OPERATION)
1.015
C
°
1.010
A
T
1.005
0.995
0.990
Pulse Duration Relative to Value at = 25
0.985
VCC = 10 V
1
–75 –25 25
–50 0 50 100
TA – Free-Air Temperature – °C
Figure 5
vs
FREE-AIR TEMPERATURE
75 125
Figure 7
300
250
200
150
100
– Propagation Delay Time – ns
PD
t
50
0
Figure 6
PROPAGATION DELAY TIME
vs
LOWEST VOLTAGE LEVEL
OF TRIGGER PULSE
TA = –55°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 125°C
0 0.1 x V
Lowest Voltage Level of Trigger Pulse
0.2 x VCC0.3 x V
CC
Figure 8
CC
0.4 x V
CC
Data for temperatures below 0°C and above 70°C are applicable for SE555 circuits only.
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
APPLICATION INFORMATION
monostable operation
For monostable operation, any of these timers may be connected as shown in Figure 9. If the output is low, application of a negative-going pulse to TRIG sets the flip-flop (Q goes low), drives the output high, and turns off Q1. Capacitor C is then charged through RA until the voltage across the capacitor reaches the threshold voltage of THRES input. If TRIG has returned to a high level, the output of the threshold comparator will reset the flip-flop (Q
R
A
goes high), drive the output low, and discharge C through Q1.
RA = 9.1 k CL = 0.01 µF RL = 1 k See Figure 9
Voltage – 2 V/div
4 7
6 2
CONT
RESET DISCH
THRES TRIGInput
(5 V to 15 V)
5
V
V
GND
1
CC
8
CC
OUT
R
L
3
Output
Input Voltage
Output Voltage
Capacitor Voltage
Pin numbers shown are for the D, JG, and P packages.
Figure 9. Circuit for Monostable Operation
Monostable operation is initiated when TRIG voltage falls below the trigger threshold. Once initiated, the sequence ends only if TRIG is high at the end of the timing interval. Because of the threshold level and saturation voltage of Q1, the output pulse duration is approximately t
= 1.1RAC. Figure 11 is a plot of the time
w
constant for various values of R
and C. The
A
threshold levels and charge rates are both directly proportional to the supply voltage, V
The timing
CC.
interval is therefore independent of the supply voltage, so long as the supply voltage is constant during the time interval.
Applying a negative-going trigger pulse simulta­neously to RESET and TRIG during the timing interval discharges C and re-initiates the cycle, commencing on the positive edge of the reset pulse. The output is held low as long as the reset pulse is low. To prevent false triggering, when RESET is not used, it should be connected to V
CC
Time – 0.1 ms/div
Figure 10. Typical Monostable Waveforms
10
RA = 10 M
1
RA = 1 M
–1
10
–2
10
–3
10
– Output Pulse Duration – s
–4
10
w
t
–5
10
0.001
C – Capacitance – µF
RA = 10 k
RA = 1 k
.
Figure 11. Output Pulse Duration vs Capacitance
RA = 100 k
1001010.10.01
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9
NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
APPLICATION INFORMATION
astable operation
As shown in Figure 12, adding a second resistor, RB, to the circuit of Figure 9 and connecting the trigger input to the threshold input causes the timer to self-trigger and run as a multivibrator. The capacitor C will charge through R values of R
This astable connection results in capacitor C charging and discharging between the threshold-voltage level (0.67V times (and therefore the frequency and duty cycle) are independent of the supply voltage.
R
A
R
B
C
and RB and then discharge through RB only. The duty cycle may be controlled, therefore, by the
A
and R
A
) and the trigger-voltage level (≈0.33•VCC). As in the monostable circuit, charge and discharge
CC
(see Note A)
4 7
6 2
B.
V
CC
(5 V to 15 V)
µF
0.01
Open
58
1
V
OUT
GND
CC
CONT
RESET DISCH
THRES TRIG
RA = 5 k RL = 1 k RB = 3 k C = 0.15 µF
R
L
3
Output
Voltage – 1 V/div
t
H
t
L
See Figure 12
Output Voltage
Pin numbrs shown are for the D, JG, and P packages.
NOTE A: Decoupling CONT voltage to ground with a
capacitor may improve operation. This should be evaluated for individual applications.
Figure 12. Circuit for Astable Operation
Capacitor Voltage
Time – 0.5 ms/div
Figure 13. Typical Astable Waveforms
10
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NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
APPLICATION INFORMATION
Figure 13 shows typical waveforms generated during astable operation. The output high-level duration tH and low-level duration tL may be calculated as follows:
tH+
0.693 (RA)
tL+
0.693 (RB)C
100 k
RB)C
10 k
RA + 2 RB = 1 k
RA + 2 RB = 10 k
RA + 2 RB = 100 k
Other useful relationships are shown below.
period+tH) frequency
Output driver duty cycle
[
tL+
(RA)
0.693 (RA)
1.44 2RB)C
t
L
+
tH)
+
t
L
Output waveform duty cycle
Low t high ratio
-o-
+
+
t
H
tH)
t
L
t
H
+
t
L
+
RA)
1– R
RA)
B
R
B
R
2RB)C
R
B
RA)
2R
B
2R
B
B
1 k
100
10
f – Free-Running Frequency – Hz
1
RA + 2 RB = 1 M
RA + 2 RB = 10 M
0.1
0.001
C – Capacitance – µF
Figure 14. Free-Running Frequency
missing-pulse detector
The circuit shown in Figure 15 may be used to detect a missing pulse or abnormally long spacing between consecutive pulses in a train of pulses. The timing interval of the monostable circuit is continuously retriggered by the input pulse train as long as the pulse spacing is less than the timing interval. A longer pulse spacing, missing pulse, or terminated pulse train permits the timing interval to be completed, thereby generating an output pulse as illustrated in Figure 16.
VCC (5 V to 15 V)
VCC = 5 V RA = 1 k C = 0.1 µF See Figure 15
Input Voltage
Input
48
RESET
2
TRIG
V
CC
DISCH
OUT
R
L
3
7
R
A
Output
1001010.10.01
5
CONT
0.01 µF
Pin numbers shown are shown for the D, JG, and P packages.
THRES GND 1
6
A5T3644
Figure 15. Circuit for Missing Pulse Detector
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Voltage – 2 V/div
C
Output Voltage
Capacitor Voltage
Time – 0.1 ms/div
Figure 16. Circuit for Missing Pulse Detector
11
NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
APPLICATION INFORMATION
frequency divider
By adjusting the length of the timing cycle, the basic circuit of Figure 9 can be made to operate as a frequency divider. Figure 17 illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle.
VCC = 5 V RA = 1250 C = 0.02 µF See Figure 9
Input Voltage
Voltage – 2 V/div
Output Voltage
Capacitor Voltage
Time – 0.1 ms/div
Figure 17. Divide-By-Three Circuit Waveforms
pulse-width modulation
The operation of the timer may be modified by modulating the internal threshold and trigger voltages, which is accomplished by applying an external voltage (or current) to CONT. Figure 18 shows a circuit for pulse-width modulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates the threshold voltage. Figure 19 illustrates the resulting output pulse-width modulation. While a sine-wave modulation signal is illustrated, any wave shape could be used.
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
t
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
APPLICATION INFORMATION
VCC (5 V to 15 V)
R
48
GND
1
V
CC
DISCH
THRES
OUT
RESET
Clock
Modulation
Input
(see Note A)
Pin numbers shown are for the D, JG, and P packages only.
NOTE A: The modulating signal may be direct or capacitively
2
Input
TRIG
5
CONT
coupled to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer should be considered.
L
3
7
6
R
A
Outpu
C
Figure 18. Circuit for Pulse-Width Modulation
pulse-position modulation
RA = 3 k C = 0.02 µF
RL = 1 k See Figure 18
Modulation Input Voltage
Clock Input Voltage
Voltage – 2 V/div
Output Voltage
Capacitor Voltage
Time – 0.5 ms/div
Figure 19. Pulse-Width Modulation Waveforms
As shown in Figure 20, any of these timers may be used as a pulse-position modulator. This application modulates the threshold voltage, and thereby the time delay, of a free-running oscillator. Figure 21 illustrates a triangular-wave modulation signal for such a circuit; however, any wave shape could be used.
VCC (5 V to 15 V)
CC
OUT
DISCH
R
L 3
7
6
48 RESET V
2
TRIG
Modulation
(see Note A)
Pin numbers shown are for the D, JG, and P packages only.
NOTE A: The modulating signal may be direct or capacitively
5
Input
CONT
coupled to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer should be considered.
THRES
GND
R
A
Output
R
B
C
Figure 20. Circuit for Pulse-Position Modulation
Voltage – 2 V/div
Capacitor Voltage
Figure 21. Pulse-Position-Modulation Waveforms
RA = 3 k RB = 500 RL = 1 k See Figure 20
Modulation Input Voltage
Output Voltage
Time – 0.1 ms/div
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
13
NE555, NE555Y, SA555, SE555, SE555C PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
APPLICATION INFORMATION
sequential timer
V
CC
84
GND
V
CC
OUT
DISCH
THRES
1
3
7
6
C
A
RESET
2
TRIG
S
5
CONT
0.01
µF
CA = 10 µF RA = 100 k
S closes momentarily at t = 0. Pin numbers shown are for the D, JG, and P packages only.
RA
33 k
0.001
µF
0.01
µF
4 8
RESET V
2
TRIG
5
CONT
CB = 4.7 µF RB = 100 k
GND
CC
OUT
DISCH
THRES
1
33 k
R
B
3
7
6
C
B
0.001
µF
0.01
µF
Output BOutput A
48
2
5
TRIG
CONT
RESET V
CC = 14.7 µF RC = 100 k
CC
OUT
DISCH
THRES
GND
1
C
C
Figure 22. Sequential Timer Circuit
Many applications, such as computers, require signals for initializing conditions during start-up. Other applications, such as test equipment, require activation of test signals in sequence. These timing circuits may be connected to provide such sequential control. The timers may be used in various combinations of astable or monostable circuit connections, with or without modulation, for extremely flexible waveform control. Figure 22 illustrates a sequencer circuit with possible applications in many systems, and Figure 23 shows the output waveforms.
R
3
7
6
Output C
C
See Figure 22
Output A
Output B
Voltage – 5 V/div
Output C
Figure 23. Sequential Timer Waveforms
twA
twA = 1.1 RAC
twB
twB = 1.1 RBC
twC
t = 0
t – Time – 1 s/div
A
B
twC = 1.1 RCC
C
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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