Texas Instruments LMG3411EVM-029, LMG34XXBB-EVM User Manual
User's Guide
SNVU637–October 2018
Using the LMG3411EVM-029 Half-Bridge and LMG34XX-
BB-EVM Breakout Board EVM
The LMG3411EVM-029 features two LMG3411R070 600V/12A GaN power transistors with integrated
drivers that are configured in a half bridge with all the required bias circuit and logic/power level shifting.
Essential power stage and gate driving high frequency current loops are fully enclosed on the board to
minimize parasitic inductances, reducing voltage overshoots and improving performance. The
LMG3411EVM-029 is configured to have a socket style external connection for easy interface with
external power stages to run the LMG3411R070 in various applications.
Contents
1 LMG3411EVM-029 User's Guide General TI High Voltage Evaluation User Safety Guidelines.................. 2
2 Description.................................................................................................................... 4
3 Schematic..................................................................................................................... 8
4 Test Setup................................................................................................................... 11
5 Test Procedure ............................................................................................................. 14
6 Typical Characteristics..................................................................................................... 15
7 EVM Assembly Drawing and PCB Layout .............................................................................. 17
8 Bill of Materials ............................................................................................................. 18
List of Figures
1 Simplified LMG3411EVM-029 Schematic ................................................................................ 5
2 Front and Back Side Photos of LMG3411EVM-029 .................................................................... 6
3 LMG3411EVM-029 Schematic............................................................................................. 8
4 Recommended Footprint for LMG3411EVM-029........................................................................ 9
5 LMG34XX-BB-EVM Schematic .......................................................................................... 10
6 LMG3411EVM-029 Connected with LMG34XX-BB-EVM ............................................................ 11
7 Recommended Connection Points....................................................................................... 12
8 Recommended Probe Connection for Logic Signals .................................................................. 15
9 Recommended Probe Connection for High Voltage Switch Node................................................... 15
10 Recommended Configuration for Heat Sink and Fan ................................................................. 15
11 Switching Waveforms with 480V input, 100kHz, 30% duty cycle, 6A output....................................... 15
12 Low to High Transition Waveform with 480V input, 100kHz, 30% duty cycle, 6A output ........................ 15
13 High to Low Transition Waveform with 480V input, 100kHz, 30% duty cycle, 6A output ........................ 15
14 LMG3411EVM-029 Top Layer and Components ...................................................................... 17
15 LMG3411EVM-029 Inner Copper Layer 1 .............................................................................. 17
16 LMG3411EVM-029 Inner Copper Layer 2 .............................................................................. 17
17 LMG3411EVM-029 Bottom Layer and Components .................................................................. 17
18 LMG34XX-BB-EVM Top Layer and Components...................................................................... 17
19 LMG34XX-BB-EVM Bottom Layer and Components.................................................................. 17
List of Tables
1 Logic Pin Function Description............................................................................................. 4
2 Power Pin Function Description ........................................................................................... 4
3 Test Point Functional Description........................................................................................ 13
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Board EVM
1
WARNING
LMG3411EVM-029 User's Guide General TI High Voltage Evaluation User Safety Guidelines
4 List of Terminals............................................................................................................ 13
5 LMG3411EVM-029 List of Materials..................................................................................... 18
6 LMG34XX-BB-EVM List of Materials .................................................................................... 20
Trademarks
All trademarks are the property of their respective owners.
1 LMG3411EVM-029 User's Guide
General TI High Voltage Evaluation User Safety Guidelines
Always follow TI’s set-up and application instructions, including use of all interface components within their
recommended electrical rated voltage and power limits. Always use electrical safety precautions to help
ensure your personal safety and the safety of those working around you. Contact TI’s Product Information
Center http://support/ti./com for further information.
Save all warnings and instructions for future reference.
Failure to follow warnings and instructions may result in personal injury, property damage, or
death due to electrical shock and/or burn hazards.
The term TI HV EVM refers to an electronic device typically provided as an open framed, unenclosed
printed circuit board assembly. It is intended strictly for use in development laboratory environments,
solely for qualified professional users having training, expertise, and knowledge of electrical safety risks in
development and application of high-voltage electrical circuits. Any other use and/or application are strictly
prohibited by Texas Instruments. If you are not suitably qualified, you should immediately stop from further
use of the HV EVM.
• Work Area Safety:
– Maintain a clean and orderly work area .
– Qualified observer(s) must be present anytime circuits are energized.
– Effective barriers and signage must be present in the area where the TI HV EVM and its interface
electronics are energized, indicating operation of accessible high voltages may be present, for the
purpose of protecting inadvertent access.
– All interface circuits, power supplies, evaluation modules, instruments, meters, scopes and other
related apparatus used in a development environment exceeding 50 V
electrically located within a protected Emergency Power Off (EPO) protected power strip.
– Use a stable and non-conductive work surface.
– Use adequately insulated clamps and wires to attach measurement probes and instruments. No
freehand testing whenever possible.
• Electrical Safety:
As a precautionary measure, it is always a good engineering practice to assume that the entire
EVM may have fully accessible and active high voltages.
– De-energize the TI HV EVM and all its inputs, outputs, and electrical loads before performing any
electrical or other diagnostic measurements. Confirm that TI HV EVM power has been safely deenergized.
– With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring,
measurement equipment hook-ups and other application needs, while still assuming the EVM circuit
and measuring instruments are electrically live.
– When EVM readiness is complete, energize the EVM as intended.
/75 VDC must be
RMS
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WARNING: While the EVM is energized, never touch the EVM or its electrical circuits as they
could be at high voltages capable of causing electrical shock hazard.
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!
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• Personal Safety:
• Limitation for Safe Use:
Safety and Precautions
The EVM is designed for professionals who have received the appropriate technical training, and is
designed to operate from an AC power supply or a high-voltage DC supply. Please read this user guide
and the safety-related documents that come with the EVM package before operating this EVM.
LMG3411EVM-029 User's Guide General TI High Voltage Evaluation User Safety Guidelines
– Wear personal protective equipment, for example, latex gloves and/or safety glasses with side
shields or protect EVM in an adequate lucent plastic box with interlocks from accidental touch.
– EVMs are not to be used as all or part of a production unit.
CAUTION
Do not leave the EVM powered when unattended.
WARNING
Hot surface! Contact may cause burns. Do not touch!
WARNING
High Voltage! Electric shock is possible when connecting board to
live wire. Board should be handled with care by a professional.
For safety, use of isolated test equipment with overvoltage and
overcurrent protection is highly recommended.
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Description
2 Description
The LMG3411EVM-029 operates as a daughter card as part of a larger custom designed system or with
the LMG34XX-BB-EVM breakout motherboard.
2.1 LMG3411EVM-029
The LMG3411EVM-029 configures two LMG3411R070 GaN FETs in a half bridge. All the bias and level
shifting components are included, allowing low side referenced signals to control both FETs. High
frequency bypass capacitors are included on the power stage in an optimized layout to minimize parasitic
inductance and reduce voltage overshoot.
There are 6 logic pins on the FET card.
Pin Description
AGND Logic and bias power ground return pin. Functionally isolated from PGND.
12V Auxiliary power input for when the LMG3410-HB-EVM is configured in bootstrap mode. Pin is not used
5V Auxiliary power input for the LMG3410-HB-EVM. Used to power logic isolators. Used as input bias power
FAULT Logic AND output from FAULT signal from LMG3410. Pin is either pulled to AGND or 5V.
Q2 Gate AGND referenced logic gate signal input for bottom LMG3410. Compatible with both 3.3V and 5V logic.
Q1 Gate AGND referenced logic gate signal input for top LMG3410. Compatible with both 3.3V and 5V logic.
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Table 1. Logic Pin Function Description
when configured in isolated power mode.
of LMG3410 devices when configured in isolated power mode.
There are 3 power pins on the FET card.
Table 2. Power Pin Function Description
PIN DESCRIPTION
VSW Switch node of the half bridge
VDC Input DC voltage of the half bridge
PGND Power ground of the half bridge. Functionally isolated from
AGND.
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VDC
PGND
VSW
Q1 Gate
Q2 Gate
FAULT
IN
FAULT
IN
FAULT
D
S
D
S
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Description
Figure 1. Simplified LMG3411EVM-029 Schematic
2.1.1 FAULT
2.1.2 Power Pins
CAUTION
High-voltage levels are present on the evaluation module whenever it is
energized. Proper precautions must be taken when working with the EVM.
The FAULT pin of LMG3411EVM-029 is active low when an under voltage lockout on an auxiliary voltage
rail, over temperature or overcurrent event occurs on the LMG3411R070. The FAULT signal for both
LMG3411R070 devices are level shifted to AGND, where they are logic AND connected to the FAULT pin.
CAUTION
Please do NOT ignore FAULT signal when using LMG3411EVM-029. Turn off
both top and bottom devices, if any device is generating FAULT signal. The
device under fault condition may operate in undesired 3rd-quadrant mode and
may be over heated and damaged due to the high source-drain voltage drop if
the other device is still switching.
While there are some power stage bypass capacitors on the LMG3411EVM-029 from VDC to PGND to
minimize voltage overshoot during switching, more bulk capacitance is required to hold up the DC voltage
during operation. It is highly recommended to minimize, and ideally prevent, any overlap and parasitic
capacitance from VSW to VDC, PGND and any logic pins. The two grounds PGND and AGND are
functionally isolated from each other on the LMG3411EVM-029.
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Description
2.1.3 Bootstrap Mode
The LMG3411EVM-029 card can be modified to operate in bootstrap mode, where the 12V bias voltage is
used to power both LMG3411R070 devices. This can be achieved by removing U4, U5 and R1, and
placing a 20 Ω resistor on R2, a 0 Ω resistor on R7 and a 600V SOD-123 diode on D1, such as Micro
Commercial Components UFM15PL-TP. Do NOT power up the LMG3411EVM-029 when R1, R2, R7, D1,
U4 and U5 are all populated.
2.1.4 Heat Sink
Heat sink is installed to help with heat dissipation of the LMG3411R070. Exposed copper pads that are
attached to the die attach pad (DAP) of both the high and low side devices are provided for a low thermal
impedance point to a heat sink. The two copper pads have high voltage potential difference between them
so an electrically isolative thermal interface material (TIM) is required. Bergquist BP100-0.005-00-1112
double sided adhesive tape TIM and Cool Innovations 3-101004U heat sink are recommended.
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Figure 2. Front and Back Side Photos of LMG3411EVM-029
2.2 LMG34XX-BB-EVM
To allow for quick operation the LMG34XX-BB-EVM is available to interface with the LMG3411EVM-029.
This mother board is designed to operate the LMG3411R070 as a synchronous open loop buck converter.
Easy probe locations are provided for measurement of logic and power stage voltages.
2.2.1 Bias Supply
The motherboard requires one 12V bias supply. A linear drop off regulator steps the voltage down to a
tightly regulated 5V for logic and auxiliary power of the LMG3411R070 when the LMG3410-HB-EVM is
configured in isolated power mode. When the LMG3411EVM-029 is configured in bootstrap mode the 12V
input is used to power the two LMG3411R070 devices.
2.2.2 Logic PWM Input
The LMG34XX-BB-EVM supports a single PWM, with complimentary signal and corresponding dead time
generated on board. A 0 V to 5 V magnitude input square wave is required. The complementary PWM
generation circuit creates 50 ns of dead time between both transitions of the PWM signals.
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2.2.3 Fault Protection
There is an option to disable PWM input to the FET card in the event of a fault signal from the
LMG3411EVM-029. When the FAULT Protect jumper is placed in the EN mode, PWM is disabled when
either LMG3411R070 has an active fault. This disable is not latching, so when the fault clears PWM
immediately resumes. If FAULT Protect mode is not desired it can be disabled by placing the jumper in
the DIS position. Besides, it is noted that to correctly observe the cycle-by-cycle overcurrent protection
with LMG34XX-BB-EVM, the jumper needs to be configured at DIS position. For the details of the over
current protection, please refer datasheet of LMG3411R070. The FAULT LED will still illuminate when
either LMG3410 has an active fault, regardless of the position of FAULT Protect jumper.
2.3 Typical Applications
The LMG3411EVM-029 is designed for use in AC/DC, DC/DC and DC/AC applications
• Totem-Pole PFC converters
• Phase-Shifted Full Bridge or LLC Converter
• Buck converter such as the LMG34XX-BB-EVM
2.4 Features
The LMG3411EVM-029 has the following features and specifications:
• Two options to bias the LMG3411R070, isolated power or from bootstrap diode
• Over temperature, cycle-by-cycle overcurrent, and under voltage lockout protection with FAULT
indication that is level shifted to an AGND referenced signal
• Gate logic input support of either 3.3V or 5V logic
• Maximum recommended operating voltage of 480V and absolute maximum voltage of 600V
The LMG34XX-BB-EVM has the following features and specifications:
• Requires only a single 12V bias supply
• Requires only a single 0V to 5V PWM input to generate gate drive signal
• PWM disable in the event of a fault from the LMG3411EVM-029
• Maximum recommended operating voltage of 480V and absolute maximum voltage of 600V
• Maximum recommended operating inductor current of 8A
Description
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Schematic
3 Schematic
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Figure 3. LMG3411EVM-029 Schematic
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