Texas Instruments CD74HCT4066M96, CD74HCT4066M, CD74HCT4066E, CD74HC4066M96, CD74HC4066M Datasheet

...
CD74HC4066,
/
[ /Title (CD74H C4066, CD74H CT4066 )
Subject (High­Speed CMOS Logic Quad
Data sheet acquired from Harris Semiconductor SCHS208
February 1998
Features
• Wide Analog-Input-Voltage Range . . . . . . . . . . 0V - 10V
• Low “ON” Resistance
-V
CC
-V
CC
• Fast Switching and Propagation Delay Times
• Low “OFF” Leakage Current
o
• Wide Operating Temperature Range . . . -55
• HC Types
- 2V to 10V Operation
- High Noise Immunity: N at VCC = 5V and 10V
• HCT Types
- Direct LSTTL Input Logic Compatibility, V
= 0.8V (Max), VIH = 2V (Min)
IL
- CMOS Input Compatibility, I
= 30%, NIH = 30% of V
IL
1µA at VOL, V
l
C to 125oC
OH
CD74HCT4066
High-Speed CMOS Logic
Quad Bilateral Switch
Description
The Harris CD74HC4066 and CD74HCT4066 contains four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.
These switches feature the characteristic linear “ON” resistance of the metal-gate CD4066B. Each switch is turned on by a high-level voltage on its control input.
Ordering Information
TEMP. RANGE
CC
PART NUMBER
CD74HC4066E -55 to 125 14 Ld PDIP E14.3 CD74HCT4066E -55 to 125 14 Ld PDIP E14.3 CD74HC4066M -55 to 125 14 Ld SOIC M14.15 CD74HCT4066M -55 to 125 14 Ld SOIC M14.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96to obtain the variant in the tape and reel.
2. Wafer and die is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information.
(oC) PACKAGE
PKG.
NO.
Pinout
CD74HC4066, CD74HCT4066
(PDIP, SOIC)
TOP VIEW
1Y
1 2
1Z 2Z
3
2Y
4
2E
5
3E
6
GND
7
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
© Harris Corporation 1998
1
V
14
CC
1E
13
4E
12
4Y
11
4Z
10
3Z
9
3Y
8
File Number 1777.1
Functional Diagram
CD74HC4066, CD74HCT4066
13
1E
5
2E
6
3E
12
4E
INPUT
nE SWITCH
L Off
H
NOTE: H = High Level L = Low Level
TRUTH TABLE
1
2
4
3
8
9
11
10
GND = 7 V
= 14
CC
On
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
Logic Diagram
nE
nY
p
p
n
nZ
n
2
CD74HC4066, CD74HCT4066
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, V
CC
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 10.5V
DC Input Diode Current, I
IK
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Switch Current, IO (Note 3)
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA
DC Output Diode Current, I
OK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I
O
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 10V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. Incertain applications,the external load-resistorcurrent mayinclude bothVCCandsignal-line components.To avoid drawingVCCcurrent when switch current flows into the transmission gate inputs, (terminals 1, 4, 8 and 11) the voltage drop across the bidirectional switch must not exceed 0.6V (calculated from RONvalues shown in the DC Electrical Specifications Table). No VCCcurrent will flow through RLif the switch current flows into terminals 2, 3, 9 and 10.
4. θJA is measured with the component mounted on an evaluation PC board in free air.
CC
Thermal Resistance (Typical, Note 4) θJA (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Maximum Junction Temperature (Hermetic Pac kage or Die) . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CC
DC Electrical Specifications
PARAMETER SYMBOL
HC TYPES
High Level Input Voltage
Low Level Input Voltage
Input Leakage Current (Any Control)
Off-Switch Leakage Current
V
IH
V
IL
I
IL
I
Z
TEST
CONDITIONS
(V) VIS (V) MIN TYP MAX MIN MAX MIN MAX
I
VCC (V)
o
25
C -40oC TO 85oC -55oC TO 125oC
- - 2 1.5 - - 1.5 - 1.5 - V
4.5 3.15 - - 3.15 - 3.15 - V 9 6.3 - - 6.3 - 6.3 - V
- - 2 - - 0.5 - 0.5 - 0.5 V
4.5 - - 1.35 - 1.35 - 1.35 V 9 - - 2.7 - 2.7 - 2.7 V
VCC or
-10--±0.1 - ±1-±1µA
GND
V
VCC or
IL
10 - - ±0.1 - ±1-±1µA
GND
UNITSV
3
CD74HC4066, CD74HCT4066
DC Electrical Specifications (Continued)
TEST
CONDITIONS
PARAMETER SYMBOL
“ON” Resistance IO = 1mA
R
ON
(V) VIS (V) MIN TYP MAX MIN MAX MIN MAX
I
V
CC
VCC or
GND
(Figure 1)
V
GND
“ON” Resistance
R
ON
V
CC
Between Any Two Switches
Quiescent Device Current
I
CC
VCC or
GND
HCT TYPES
High Level Input Voltage
Low Level Input
V
IH
V
IL
- - 4.5 to
- - 4.5 to
Voltage Input Leakage
Current
I
VCC or
IL
GND
(Any Control)
V
Off-Switch Leakage Current
“ON” Resistance
= 1mA
I
O
(Figure 1)
I
Z
R
ON
V
IL
CC
VCC or
GND
VCC or
GND
V
GND
“ON” Resistance
R
ON
V
CC
Between Any Two Switches
CC
VCC or
GND
V
CC
- 2.1
Quiescent Device Current
Additional Quiescent Device Current Per
I
CC
I
Input Pin: 1 Unit Load (Note 5)
NOTE:
5. For dual-supply systems theoretical worst case (V
o
25
C -40oC TO 85oC -55oC TO 125oC
V
CC
(V)
UNITSV
4.5 - 25 80 - 106 - 128 6 - 20 75 - 94 - 113 9 - 15 60 - 78 - 95
to
CC
4.5 - 35 95 - 118 - 142 6 - 24 84 - 105 - 126 9 - 16 70 - 88 - 105
-4.5-1----- 6 - 0.75 - ---- 9-0.5-----
- 6 - - 2 - 20 - 40 µA
10 - - 16 - 160 - 320 µA
2-- 2 - 2 - V
5.5
- - 0.8 - 0.8 - 0.8 V
5.5
- 5.5 - - ±0.1 - ±1-±1µA
5.5 - - ±0.1 - ±1-±1µA
4.5 - 25 80 - 106 - 128
to
CC
4.5 - 35 95 - 118 - 142
-4.5-1-----
- 5.5 - - 2 - 20 - 40 µA
- 4.5 to
- 100 360 - 450 - 490 µA
5.5
= 2.4V, VCC = 5.5V) specification is 1.8mA.
I
HCT Input Loading Table
INPUT UNIT LOADS
All 1
NOTE: Unit Load is ICClimit specified in DC Electrical Specifica­tions table, e.g., 360µA max at 25oC.
4
CD74HC4066, CD74HCT4066
Switching Specifications Input t
PARAMETER SYMBOL
HC TYPES
Propagation Delay Time Switch In to Out
Propagation Delay Time Switch Turn On Delay
Propagation Delay Time Switch Turn Off Delay
Input (Control) Capacitance C Power Dissipation Capacitance
(Notes 6, 7)
HCT TYPES
Propagation Delay Time Switch In to Out
Propagation Delay Time Switch Turn On Delay
Propagation Delay Time Switch Turn Off Delay
Input (Control) Capacitance C Power Dissipation Capacitance
(Notes 6, 7)
NOTES:
is used to determine the dynamic power consumption, per package.
6. C
PD
7. PD=CPDV
2
fi+ Σ (CL+CS)V
CC
capacitance, VCC = supply voltage.
t
PLH
t
PZH
t
PHZ
t
PLH
t
PZH
t
PHZ
, tf = 6ns
r
o
C -40oC TO 85oC -55oCTO125oC
TEST
CONDITIONS
, t
CL= 50pF 2 - - 60 - 75 - 90 ns
PHL
V
CC
(V)
25
4.5 - - 12 - 15 - 18 ns 9--8 - 11 - 13 ns
= 15pF 5 - 4 - ----ns
C
L
, t
CL= 50pF 2 - - 100 - 125 - 150 ns
PZL
4.5 - - 20 - 25 - 30 ns 9 - - 12 - 15 - 18 ns
= 15pF 5 - 8 - ----ns
C
L
, t
CL= 50pF 2 - - 150 - 190 - 225 ns
PLZ
4.5 - - 30 - 38 - 45 ns 9 - - 24 - 30 - 36 ns
= 15pF 5 - 12 - ----ns
C
L
I
C
PD
, t
PHL
, t
PZL
, t
PLZ
I
C
PD
2
fowhere fi= input frequency, fo= output frequency, CL= output load capacitance, CS= switch
CC
- - - - 10 - 10 - 10 pF
- 5-25-----pF
CL= 50pF 4.5 - - 12 - 15 - 18 ns
= 15pF 5 - 4 - ----ns
C
L
CL= 50pF 4.5 - - 24 - 30 - 36 ns C
= 15pF 5 - 9 - ----ns
L
CL= 50pF 4.5 - - 35 - 44 - 53 ns
= 15pF 5 - 14 - ----ns
C
L
- - - - 10 - 10 - 10 pF
- 5-38-----pF
UNITSMIN TYP MAX MIN MAX MIN MAX
Analog Channel Specifications T
PARAMETER TEST CONDITIONS V
Switch Frequency Response Bandwidth at -3dB
= 25oC
A
(V) CD74HC4066 CD74HCT4066 UNITS
CC
Figure 5, Notes 8, 9 4.5 200 200 MHz
Figure 2 Cross Talk Between Any Two Switches Figure 3 Figure 4, Notes 9, 10 4.5 -72 -72 dB Total Harmonic Distortion Figure 6, 1kHz,
VIS = 4V
P-P
Figure 6, 1kHz, VIS = 8V
P-P
4.5 0.022 0.023 %
9 0.008 N/A %
5
CD74HC4066, CD74HCT4066
Analog Channel Specifications T
PARAMETER TEST CONDITIONS V
= 25oC (Continued)
A
(V) CD74HC4066 CD74HCT4066 UNITS
CC
Control to Switch Feedthrough Noise Figure 7 4.5 200 130 mV
9 550 N/A mV Switch “OFF” Signal Feedthrough Figure 3 Figure 8, Notes 9, 10 4.5 -72 -72 dB Switch Input Capacitance, C
S
-5 5 pF
NOTES:
8. Adjust input level for 0dBm at output, f = 1MHz.
9. VIS is centered at VCC/2.
10. Adjust input for 0dBm at VIS.
Typical Performance Curves
TA = 25oC, GND = 0V
50
()
40
ON
VCC = 4.5V, PIN 1 TO 2
30
20
“ON” RESISTANCE, R
10
0
0123454.5 6 7 8 9 10 INPUT SIGNAL VOLTAGE, V
VCC = 9V, PIN 1 TO 3
(V)
IS
0
-1
-2
-3
CHANNEL-ON BANDWIDTH, dB
-4
4
10
5
10
FREQUENCY, f (Hz)
CL = 10pF V
CC
R
= 50
L
= 25oC
T
A
PIN 4 TO 3
6
10
7
10
= 4.5V
10
8
FIGURE 1. TYPICAL “ON” RESISTANCE vs INPUT SIGNAL
VOLTAGE
0
CL = 10pF V
= 4.5V
CC
= 50
R
L
-20
= 25oC
T
A
PIN 4 TO 3
-40
-60
CROSSTALK, dB
-80
SWITCH-OFF SIGNAL FEEDTHROUGH, dB
-100
4
10
5
10
FIGURE 3. SWITCH-OFF SIGNAL FEEDTHROUGH AND CROSSTALK vs FREQUENCY, VCC = 4.5V
FIGURE 2. SWITCH FREQUENCY RESPONSE, VCC = 4.5V
6
10
FREQUENCY, f (Hz)
7
10
8
10
6
Analog Test Circuits
V
V
CC
IS
0.1µF
V
IS
SWITCH
R
ON
CD74HC4066, CD74HCT4066
V
CC
VCC/2
R
SWITCH
OFF
RC
/2
V
CC
V
OS1
RC
/2
V
CC
fIS = 1MHz SINEWAVE R = 50 C = 10pF
FIGURE 4. CROSSTALK BETWEEN TWO SWITCHES TEST CIRCUIT
V
OS2
dB
METER
V
CC
SINE
0.1µF
V
IS
SWITCH
ON
V
OS
WAVE
V
IS
10µF
50 10pF
dB
V
/2
CC
METER
V
CC
SWITCH
ON
VI = V
10k 50pF
V
/2
CC
V
IH
IS
V
OS
DISTORTION
fIS = 1kHz TO 10kHz
FIGURE 5. FREQUENCY RESPONSE TEST CIRCUIT FIGURE 6. TOTAL HARMONIC DISTORTION TEST CIRCUIT
fIS≥ 1MHz SINEWAVE R = 50
IL
C = 10pF
V
OS
RC
/2
METER
600
/2
E
V
50pF
OS
V
P-P
V
OS
SCOPE
V
CC
600
/2
V
CC
SWITCH
ALTERNATING
ON AND OFF
, tf≤ 6ns
t
r
f
= 1MHz
CONT
50% DUTY
CYCLE
V
CC
FIGURE 7. CONTROL-TO-SWITCH FEEDTHROUGH NOISE
V
CC
VC = V
0.1µF
V
IS
SWITCH
OFF
R
/2
V
CC
V
CC
FIGURE 8. SWITCH OFF SIGNAL FEEDTHROUGH
TEST CIRCUIT
Test Circuits and Waveforms
METER
dB
tr = 6ns tf = 6ns
V
t
CC
GND
TLH
INPUT
t
90% 50% 10%
THL
90%
t
50%
10%
PLH
INVERTING
OUTPUT
t
PHL
FIGURE 9. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
= 6ns
tr = 6ns
INPUT
t
2.7V
1.3V
0.3V
THL
t
f
3V
GND
t
TLH
90%
t
PLH
1.3V
10%
INVERTING
OUTPUT
t
PHL
FIGURE 10. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
7
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