Texas Instruments CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF Datasheet

CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A FEBRUARY 2020 REVISED MAY 2020 SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
CC3235MODx and CC3235MODAx SimpleLink™ Wi-Fi CERTIFIED™ Dual-Band
Wireless MCU Modules

1 Features

Fully integrated and green and RoHS modules include all required clocks, SPI flash, and passives
802.11a/b/g/n: 2.4 GHz and 5 GHz
FCC, IC/ISED, ETSI/CE, MIC, and SRRC 1certified
FIPS 140-2 Level 1 validated IC inside
Multilayered security features help developers protect identities, data, and software IP
Low-power modes for battery-powered applications
Coexistence with 2.4-GHz radios
Industrial temperature: –40°C to +85°C
CC3235MODx multiple-core architecture, system­on-chip (SoC)
CC3235MODAx modules include an integrated PCB antenna for easy integration into the host system
1.27-mm pitch QFM package for easy assembly and low-cost PCB design
Transferrable Wi-Fi Alliance® certification
Application microcontroller subsystem: – Arm® Cortex®-M4 core at 80 MHz – User-dedicated memory
256KB of RAM
Optional 1MB of executable flash
– Rich set of peripherals and timers
McASP supports two I2S channels
SD, SPI, I2C, UART
8-bit synchronous imager interface
4-channel 12-bit ADCs
4 general-purpose timers (GPT) with 16-bit PWM mode
Watchdog timer
Up to 27 GPIO pins
Debug interfaces: JTAG, cJTAG, SWD
Wi-Fi network processor subsystem: – Wi-Fi® core:
802.11 a/b/g/n 2.4 GHz and 5 GHz
Modes: – Access point (AP) – Station (STA) – Wi-Fi Direct® (only supported on 2.4
GHz)
Security: – WEP – WPA™/ WPA2™ PSK – WPA2 Enterprise – WPA3™ Personal
– Internet and application protocols:
HTTPs server, mDNS, DNS-SD, DHCP
IPv4 and IPv6 TCP/IP stack
16 BSD sockets (fully secured TLS v1.2 and SSL 3.0)
– Built-in power management subsystem:
Configurable low-power profiles (always on, intermittently connected, tag)
Advanced low-power modes
Integrated DC/DC regulators
Multilayered security features: – Separate execution environments – Networking security – Device identity and key – Hardware accelerator cryptographic engines
(AES, DES, SHA/MD5, CRC)
– File system security (encryption, authentication,
access control) – Initial secure programming – Software tamper detection – Secure boot – Certificate signing request (CSR) – Unique per device key pair
Application throughput – UDP: 16 Mbps – TCP: 13 Mbps
Power-Management Subsystem: – Integrated DC/DC converters support a wide
range of supply voltage:
Single wide-voltage supply, VBAT: 2.3 V to
3.6 V
– Advanced low-power modes:
Shutdown: 1 µA, Hibernate: 5.5 µA
Low-power deep sleep (LPDS): 120 µA
Idle connected (MCU in LPDS): 710 µA
RX traffic (MCU active): 59 mA
TX traffic (MCU active): 223 mA
1
Contact TI for more information on using SRRC ID Certification: www.ti.com/tool/SIMPLELINK-CC3XXX-
CERTIFICATION
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
Copyright © 2020 Texas Instruments Incorporated
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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– Wi-Fi TX power
2.4 GHz: 16 dBm at 1 DSSS
5 GHz: 15.1 dBm at 6 OFDM
– Wi-Fi RX sensitivity
2.4 GHz: –94.5 dBm at 1 DSSS
5 GHz: –89 dBm at 6 OFDM
Additional integrated components – 40.0-MHz crystal – 32.768-kHz crystal (RTC) – 32Mbit SPI serial flash – RF filters, diplexer and passive components
Footprint-compatible QFM package – CC3235MODx: 1.27-mm pitch,
63-pin, 20.5-mm × 17.5-mm
– CC3235MODAx: 1.27-mm pitch,
63-pin, 20.5-mm × 25.0-mm
Module supports the SimpleLink Developer's

2 Applications

For Internet of Things applications, such as: – Medical and Healthcare
Multiparameter Patient Monitor
Electrocardiogram (ECG)
Electronic Hospital Bed & Bed Control
Telehealth Systems
Building and Home Automation:
HVAC Systems & Thermostat
Video Surveillance, Video Doorbells, and
Low-Power Camera
Building Security Systems and E-locks
AppliancesAsset TrackingFactory AutomationGrid Infrastructure
Ecosystem

3 Description

Start your design with the fully programmable FCC, IC/ISED, ETSI/CE, MIC, and SRRC certified wireless microcontroller (MCU) module with built-in dual-band Wi-Fi connectivity. The modules integrate the 40-MHz crystal, 32.768-kHz RTC clock, 32Mb SPI serial flash, RF filters, diplexer, and passive components.
The SimpleLink™ CC3235MODx module is available in two variants:
CC3235MODS includes 256KB of RAM, IoT networking security, device identity and keys, and MCU-level security features such as file system encryption, user IP (MCU image) encryption, secure boot, and debug security.
CC3235MODSF builds on the CC3235MODS and integrates a user-dedicated 1MB of executable flash in addition to the 256KB of RAM.
The SimpleLink™ CC3235MODAx module is available in two variants:
CC3235MODAS includes 256KB of RAM, IoT networking security, device identity and keys, and MCU-level security features such as file system encryption, user IP (MCU image) encryption, secure boot, and debug security.
CC3235MODASF builds on the CC3235MODAS and integrates a user-dedicated 1MB of executable flash in addition to the 256KB of RAM.
Created for IoT, the SimpleLink™ Wi-Fi® CC3235MODx and CC3235MODAx module family from Texas Instruments is a wireless module that integrates two physically separated on-chip MCUs.
Application processor— Arm® Cortex®-M4 MCU with a user-dedicated 256KB of RAM and an optional 1MB of executable flash.
Network processor to run all Wi-Fi and Internet logical layers. This ROM-based subsystem completely offloads the host MCU and includes an 802.11 a/b/g/n dual-band 2.4-GHz and 5-GHz radio, baseband, and MAC with a powerful hardware cryptography engine.
This generation introduces new capabilities that further simplify the connectivity of things to the Internet. The main new features include:
802.11a/b/g/n: 2.4-GHz and 5-GHz support
2.4-GHz coexistence with Bluetooth ® low energy radio
Antenna diversity
Enhanced security with FIPS 140-2 Level 1 validated IC inside: certification.
More concurrent secure sockets (up to 16)
Certificate signing request (CSR)
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Online certificate status protocol (OCSP)
Wi-Fi Alliance® certified for IoT applications with low-power capabilities and more
Hostless mode for offloading template packet transmissions
Improved fast scan
The CC3235MODx and CC3235MODAx device family is part of the SimpleLink MCU platform—a common, easy-to-use development environment based on a single-core software development kit (SDK) with a rich tool set and reference designs. The E2E™ support forums support Wi-Fi, Bluetooth low energy, Sub-1 GHz, and host MCUs. For more information, visit www.ti.com/simplelink or www.ti.com/simplelinkwifi.
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
CC3235MODSM2MOB QFM (63) 20.5 mm × 17.5 mm
CC3235MODSF12MOB QFM (63) 20.5 mm × 17.5 mm
CC3235MODASM2MON QFM (63) 20.5 mm × 25 mm
CC3235MODASF12MON QFM (63) 20.5 mm × 25 mm
(1) For more information, see Section 13.
(1)
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CC3235
MAC/PHY
WRF_BGN F
BGN
RF_ABG
32-Mbit
SFlash
External SPI
Programming
40 MHz
32.768 kHz
UART
SPI
nReset
PM
2.3 V to 3.6 V VBAT
User GPIOx
Aband
F
D
5 GHz SPDT
WRF_A
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020

4 Functional Block Diagrams

Figure 4-1 shows the functional block diagram of the CC3235MODx module.
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Figure 4-1. CC3235MODx Functional Block Diagram
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CC3235
MAC/PHY
WRF_BGN F
BGN
RF_ABG
32-Mbit
SFlash
External SPI
Programming
40 MHz
32.768 kHz
UART
SPI
nReset
PM
2.3 V to 3.6 V VBAT
User GPIOx
Aband
F
D
5 GHz SPDT
WRF_A
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Figure 4-2 shows the functional block diagram of the CC3235MODAx module.
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Figure 4-2. CC3235MODAx Functional Block Diagram
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CC32xx ± Single-Chip Wireless MCU
ARM
Cortex-M4
80 MHz
1-MB Flash (optional)
256-KB RAM
ROM
Peripherals
1x SPI
2x UART
1x I2C
1x I2S/PCM
1x SD/MMC
8-bit Camera
4x ADC
System
DMA
Timers
GPIOs
Network Processor
Application
Protocols
RAM
ROM
Crypto Engine
Wi-Fi Driver
TCP/IP Stack
(ARM Cortex)
Power
Management
Oscillators
DC-DC
RTC
Baseband
MAC
Processor
Radio
Synthesizer
Dual Band
Wi-Fi
COEX I/Os
Antenna Selection
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
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Figure 4-3 shows the an overview of the CC3235x hardware.
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Figure 4-3. CC3235x Hardware Overview
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Customer Application
Peripherals
Driver
SimpleLink Driver APIs
NetApp
BSD
Socket
Wi-Fi
Host Interface
Network Applications
WLAN Security
and
Management
TCP/IP Stack
WLAN MAC and PHY
Applications MCU
Network Processor
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Figure 4-4 shows the an overview of the CC3235x embedded software.
Figure 4-4. CC3235x Embedded Software Overview
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
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Table of Contents

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1 Features............................................................................1
2 Applications..................................................................... 2
3 Description.......................................................................2
4 Functional Block Diagrams............................................ 4
5 Revision History.............................................................. 8
6 Device Comparison......................................................... 9
6.1 Related Products...................................................... 12
7 Terminal Configuration and Functions........................13
7.1 CC3235MODx and CC3235MODAx Pin Diagram.... 13
7.2 Pin Attributes and Pin Multiplexing........................... 14
7.3 Signal Descriptions................................................... 31
7.4 Drive Strength and Reset States for Analog-
Digital Multiplexed Pins............................................... 36
7.5 Pad State After Application of Power to Chip, but
Before Reset Release................................................. 36
7.6 Connections for Unused Pins................................... 36
8 Specifications................................................................ 37
8.1 Absolute Maximum Ratings...................................... 37
8.2 ESD Ratings............................................................. 37
8.3 Recommended Operating Conditions.......................37
8.4 Current Consumption (CC3235MODS and
CC3235MODAS).........................................................38
8.5 Current Consumption (CC3235MODSF and
CC3235MODASF).......................................................40
8.6 TX Power Control for 2.4 GHz Band.........................42
8.7 TX Power Control for 5 GHz..................................... 44
8.8 Brownout and Blackout Conditions........................... 44
8.9 Electrical Characteristics for GPIO Pins................... 46
8.10 CC3235MODAx Antenna Characteristics............... 48
8.11 WLAN Receiver Characteristics..............................48
8.12 WLAN Transmitter Characteristics..........................49
8.13 BLE and WLAN Coexistence Requirements...........50
8.14 Reset Requirement................................................. 50
8.15 Thermal Resistance Characteristics for MOB
and MON Packages.................................................... 50
8.16 Timing and Switching Characteristics..................... 51
9 Detailed Description......................................................64
9.1 Overview................................................................... 64
9.2 Functional Block Diagram......................................... 64
9.3 Arm Cortex-M4 Processor Core Subsystem.............65
9.4 Wi-Fi Network Processor Subsystem....................... 66
9.5 Security..................................................................... 68
9.6 FIPS 140-2 Level 1 Certification............................... 70
9.7 Power-Management Subsystem...............................70
9.8 Low-Power Operating Mode..................................... 70
9.9 Memory..................................................................... 73
9.10 Restoring Factory Default Configuration.................75
9.11 Boot Modes.............................................................75
9.12 Hostless Mode........................................................ 76
9.13 Device Certification and Qualification..................... 77
9.14 Module Markings.....................................................79
9.15 End Product Labeling..............................................80
9.16 Manual Information to the End User....................... 80
10 Applications, Implementation, and Layout............... 81
10.1 Typical Application.................................................. 81
10.2 Device Connection and Layout Fundamentals....... 88
10.3 PCB Layout Guidelines...........................................88
11 Environmental Requirements and SMT
Specifications................................................................95
11.1 PCB Bending...........................................................95
11.2 Handling Environment.............................................95
11.3 Storage Condition................................................... 95
11.4 PCB Assembly Guide..............................................95
11.5 Baking Conditions................................................... 96
11.6 Soldering and Reflow Condition..............................97
12 Device and Documentation Support..........................98
12.1 Development Tools and Software........................... 98
12.2 Firmware Updates...................................................99
12.3 Device Nomenclature..............................................99
12.4 Documentation Support........................................ 100
12.5 Related Links........................................................ 101
12.6 Support Resources............................................... 102
12.7 Trademarks...........................................................102
13 Mechanical, Packaging, and Orderable
Information.................................................................. 103
13.1 Mechanical, Land, and Solder Paste Drawings.... 103
13.2 Package Option Addendum.................................. 103

5 Revision History

Changes from February 1, 2020 to August 20, 2020 (from Revision * (Feb 2020) to Revision A (Aug 2020)) Page
Added pins 20, 33, 39, 41, and 45 to Section 7.2.1 .........................................................................................15
Added Pin 39 to list of No Connect pins in Table 7-4 .......................................................................................36
Updated Coexistence Solution with Wi-Fi Antenna Selection and Dedicated BLE Antenna image. ............... 82
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6 Device Comparison

Table 6-2 shows the features supported across different CC3x35 modules.
Table 6-1. Device Features Comparison
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
FEATURE
On-board chip CC3135 CC3235S CC3235SF
On-board ANT No No No
sFlash 32-Mbit 32-Mbit 32-Mbit
Regulatory certifications FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC
Wi-Fi Alliance® Certification Yes Yes Yes
Input voltage 2.3 V to 3.6 V 2.3 V to 3.6 V 2.3 V to 3.6 V
Package 17.5 mm × 20.5 mm QFM 17.5 mm × 20.5 mm QFM 17.5 mm × 20.5 mm QFM
Operating temperature range –40°C to +85°C –40°C to +85°C –40°C to +85°C
Classification Wi-Fi Network Processor Wireless Microcontroller Wireless Microcontroller
Standard 802.11 a/b/g/n 802.11 a/b/g/n 802.11 a/b/g/n
Frequency 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz
TCP/IP Stack IPv4, IPv6 IPv4, IPv6 IPv4, IPv6
Secured sockets 16 16 16
Integrated MCU Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz
RAM 256KB 256KB
Flash 1MB
Universal Asynchronous Receiver/Transmitter (UART)
Serial Port Interface (SPI) 1 1 1
Multichannel Audio Serial Port (McASP)- I2S or PCM 2-ch 2-ch
Inter-Integrated Circuit (I2C) 1 1
Analog-to-digital converter (ADC) 4-ch, 12-bit 4-ch, 12-bit
Parallel interface (8-bit PI) 1 1
General-purpose timers 4 4
Multimedia card (MMC / SD) 1 1
CC3135MOD CC3235MODS CC3235MODSF
ON-CHIP APPLICATION MEMORY
PERIPHERALS AND INTERFACES
1 2 2
SECURITY FEATURES
DEVICE
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Table 6-1. Device Features Comparison (continued)
FEATURE
Additional networking security
Hardware acceleration Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines
Secure boot Yes Yes
Enhanced Application Level Security
FIPS 140-2 Level 1 Certification Yes Yes Yes
CC3135MOD CC3235MODS CC3235MODSF
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
File system security Secure key storage Software tamper detection Cloning protection Initial secure programming
DEVICE
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
File system security Secure key storage Software tamper detection Cloning protection Initial secure programming
Table 6-2. Device Features Comparison
FEATURE
On-board chip CC3135 CC3235S CC3235SF CC3235S CC3235SF
On-board ANT No No No Yes Yes
sFlash 32-Mbit 32-Mbit 32-Mbit 32-Mbit 32-Mbit
Regulatory certifications FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC
Wi-Fi Alliance® Certification Yes Yes Yes Yes Yes
Input voltage 2.3 V to 3.6 V 2.3 V to 3.6 V 2.3 V to 3.6 V 2.3 V to 3.6 V 2.3 V to 3.6 V
Package 17.5 mm × 20.5 mm QFM 17.5 mm × 20.5 mm QFM 17.5 mm × 20.5 mm QFM 25.0 mm × 20.5 mm QFM 25.0 mm × 20.5 mm QFM
Operating temperature range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C
Classification Wi-Fi Network Processor Wireless Microcontroller Wireless Microcontroller Wireless Microcontroller Wireless Microcontroller
Standard 802.11 a/b/g/n 802.11 a/b/g/n 802.11 a/b/g/n 802.11 a/b/g/n 802.11 a/b/g/n
Frequency 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz
TCP/IP Stack IPv4, IPv6 IPv4, IPv6 IPv4, IPv6 IPv4, IPv6 IPv4, IPv6
Secured Sockets 16 16 16 16 16
Integrated MCU Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz
RAM 256KB 256KB 256KB 256KB
Flash 1MB 1MB
Universal Asynchronous Receiver/Transmitter (UART)
Serial Port Interface (SPI) 1 1 1 1 1
CC3135MOD CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
ON-CHIP APPLICATION MEMORY
PERIPHERALS AND INTERFACES
1 2 2 2 2
DEVICE
FCC, IC/ISED, ETSI/CE, MIC,
(1)
SRRC
FCC, IC/ISED, ETSI/CE, MIC,
(1)
SRRC
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Table 6-2. Device Features Comparison (continued)
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
FEATURE
Multichannel Audio Serial Port (McASP)- I2S or PCM
Inter-Integrated Circuit (I2C) 1 1 1 1
Analog-to-digital converter (ADC) 4-ch, 12-bit 4-ch, 12-bit 4-ch, 12-bit 4-ch, 12-bit
Parallel interface (8-bit PI) 1 1 1 1
General-purpose timers 4 4 4 4
Multimedia card (MMC / SD) 1 1 1 1
Additional networking security
Hardware acceleration Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines
Secure boot Yes Yes Yes Yes
Enhanced Application Level Security
FIPS 140-2 Level 1 Certification Yes Yes Yes Yes Yes
CC3135MOD CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
2-ch 2-ch 2-ch 2-ch
SECURITY FEATURES
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
File system security Secure key storage Software tamper detection Cloning protection Initial secure programming
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
File system security Secure key storage Software tamper detection Cloning protection Initial secure programming
(1) Contact TI for more information on using SRRC ID Certification: www.ti.com/tool/SIMPLELINK-CC3XXX-CERTIFICATION
DEVICE
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
File system security Secure key storage Software tamper detection Cloning protection Initial secure programming
Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key
File system security Secure key storage Software tamper detection Cloning protection Initial secure programming
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6.1 Related Products

For information about other devices in this family of products or related products see the links below.
www.ti.com
The SimpleLink™ MCU Portfolio
SimpleLink™ Wi-Fi
®
Family
BoosterPack™ Plug-In Modules
Reference Designs for CC3200, CC3220, and CC3235 Modules
SimpleLink™ Wi-Fi
®
CC3235 SDK
offers a single development environment that delivers flexible hardware, software and tool options for customers developing wired and wireless applications. With 100 percent code reuse across host MCUs, Wi-Fi®, Bluetooth® low energy, Sub-1GHz devices and more, choose the MCU or connectivity standard that fits your design. A one-time investment with the SimpleLink software development kit (SDK) allows you to reuse often, opening the door to create unlimited applications.
The SimpleLink Wi-Fi Family offers several Internet-on-a chip solutions, which address the need of battery operated, security enabled products. Texas instruments offers a single chip wireless microcontroller and a wireless network processor which can be paired with any MCU, to allow developers to design new wi-fi products, or upgrade existing products with wi-fi capabilities.
BoosterPack™ Plug-In Modules extend the functionality of TI LaunchPad Kit. Application specific BoosterPack Plug in modules allow you to explore a broad range of applications, including capacitive touch, wireless sensing, LED Lighting control, and more. Stack multiple BoosterPack modules onto a single LaunchPad kit to further enhance the functionality of your design.
TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor and connectivity. Created by TI experts to help you jump start your system design, all TI Designs include schematic or block diagrams, BOMs and design files to speed your time to market.
The SDK contains drivers for the CC3235 programmable MCU, sample applications, and documentation required to start development with CC3235x solutions.
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CC3235MODx
63
59
62 61
60
57
56
58
55
FLASH_SPI_nCS_IN
FLASH_SPI_MOSI
12
11
10
9
8
7
6
5
4
3
2
1
13
15
16
14
GND
FLASH_SPI_CLK
FLASH_SPI_MISO
JTAG_TDI
GPIO22
GPIO13
GPIO12
GPIO17
GPIO16
GPIO15
GPIO14
GPIO11
GPIO10
GND
GND
2623
22
21 27252420
1918
17
GND
GND
GND
SOP1
SOP2
JTAG_TMS
JTAG_TCK
NC
GPIO28
JTAG_TDO
32
33
34
35
36
37
38
39
40
41
42
43
31
29
28
30
GPIO0
NC
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
4548
49
50 44464751
5253
54
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF

7 Terminal Configuration and Functions

7.1 CC3235MODx and CC3235MODAx Pin Diagram

Figure 7-1 shows the pin diagram for the CC3235MODx module.
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Figure 7-1 shows the approximate location of pins on the module.
Figure 7-1. CC3235MODx Pin Diagram Bottom View
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CC3235MODAx
63
59
62 61
60
57
56
58
55
FLASH_SPI_nCS_IN
FLASH_SPI_MOSI
12
11
10
9
8
7
6
5
4
3
2
1
13
15
16
14
GND
FLASH_SPI_CLK
FLASH_SPI_MISO
JTAG_TDI
GPIO22
GPIO13
GPIO12
GPIO17
GPIO16
GPIO15
GPIO14
GPIO11
GPIO10
GND
GND
2623
22
21 27252420
1918
17
GND
GND
GND
SOP1
SOP2
JTAG_TMS
JTAG_TCK
NC
GPIO28
JTAG_TDO
32
33
34
35
36
37
38
39
40
41
42
43
31
29
28
30
GPIO0
NC
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
4548
49
50 44464751
5253
54
2.4/5 GHz dual-band PCB Antenna
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Figure 7-2 shows the pin diagram for the CC3235MODAx module.
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7.2 Pin Attributes and Pin Multiplexing

Section 7.2.1 lists the pin descriptions of the CC3235MODx and CC3235MODAx module.
Figure 7-2. CC3235MODAx Pin Diagram Bottom View
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7.2.1 Module Pin Descriptions

CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
MODULE PIN
NO. NAME
TYPE
(1)
CC3235 DEVICE PIN
NO.
MODULE PIN DESCRIPTION
1 GND Ground
2 GND Ground
(2)
3 GPIO10 I/O 1 GPIO
4 GPIO11 I/O 2 GPIO
5 GPIO14 I/O 5 GPIO
6 GPIO15 I/O 6 GPIO
7 GPIO16 I/O 7 GPIO
8 GPIO17 I/O 8 GPIO
9 GPIO12 I/O 3 GPIO
10 GPIO13 I/O 4 GPIO
11 GPIO22 I/O 15 GPIO
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
12 JTAG_TDI I/O 16 JTAG TDI input. Leave unconnected if not used on product
13 FLASH_SPI_MISO I External serial flash programming: SPI data in
14 FLASH_SPI_nCS_IN I External serial flash programming: SPI chip select (active low)
15 FLASH_SPI_CLK I External serial flash programming: SPI clock
16 GND Ground
17 FLASH_SPI_MOSI O External serial flash programming: SPI data out
18 JTAG_TDO I/O 17 JTAG TDO output. Leave unconnected if not used on product
(2)
19 GPIO28 I/O 18 GPIO
20 NC No Connect
21 JTAG_TCK I/O 19
JTAG TCK input. Leave unconnected if not used on product. pulldown resistor is tied to this pin.
22 JTAG_TMS I/O 20 JTAG TMS input. Leave unconnected if not used on product.
23 SOP2 21
24 SOP1 34
An internal 100-kΩ pulldown resistor is tied to this SOP pin. An external 10-kΩ resistor is required to pull this pin high. See Section 9.11.1 for SOP[2:0] configuration modes.
An internal 100-kΩ pulldown resistor is tied to this SOP pin. An external 10-kΩ resistor is required to pull this pin high. See Section 9.11.1 for SOP[2:0] configuration modes.
25 GND Ground
26 GND Ground
27 GND Ground
28 GND Ground
29 GND Ground
(2)
(1)
(2)
An internal 100-kΩ
(2)
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
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MODULE PIN
NO. NAME
TYPE
(1)
CC3235 DEVICE PIN
NO.
MODULE PIN DESCRIPTION
30 GND Ground
31
CC3235MODx: RF ABG band CC3235MODAx: NC
I/O 31 2.4 GHz and 5 GHz RF input/output
32 GND Ground
33 NC No Connect
34 SOP0 35
An internal 100-kΩ pulldown resistor is tied to this SOP pin. An external 10-kΩ resistor is required to pull this pin high. See Section 9.11.1 for SOP[2:0] configuration modes.
35 nRESET I 32 There is an internal, 100-kΩ pullup resistor option from the nRESET pin to
VBAT_RESET. Note: VBAT_RESET is not connected to VBAT1 or VBAT2 within the module. The following connection schemes are recommended:
Connect nRESET to a switch, external controller, or host, only if nRESET will be in a defined state under all operating conditions. Leave VBAT_RESET unconnected to
36 VBAT_RESET 37
save power.
If nRESET cannot be in a defined state under all operating conditions, connect VBAT_RESET to the main module power supply (VBAT1 and VBAT2). Due to the internal pullup resistor a leakage current of 3.3 V / 100 kΩ is expected.
37 VBAT1 Power 39 Power supply for the module, must be connected to battery (2.3 V to 3.6 V)
38 GND Ground
39 NC 47 No Connect
40 VBAT2 Power 10, 44, 54 Power supply for the module, must be connected to battery (2.3 V to 3.6 V)
41 NC No Connect
(2)
42 GPIO30 I/O 53 GPIO
43 GND Ground
(2)
44 GPIO0 I/O 50 GPIO
45 NC No Connect
(2)
46 GPIO1 I/O 55 GPIO
47 GPIO2 I/O 57 GPIO
48 GPIO3 I/O 58 GPIO
49 GPIO4 I/O 59 GPIO
50 GPIO5 I/O 60 GPIO
51 GPIO6 I/O 61 GPIO
52 GPIO7 I/O 62 GPIO
53 GPIO8 I/O 63 GPIO
54 GPIO9 I/O 64 GPIO
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
55 GND Thermal ground
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
MODULE PIN
NO. NAME
56 GND Thermal ground
57 GND Thermal ground
58 GND Thermal ground
59 GND Thermal ground
60 GND Thermal ground
61 GND Thermal ground
62 GND Thermal ground
63 GND Thermal ground
(1) I = input; O = output; I/O = bidirectional (2) For pin multiplexing details, see Table 7-1.
TYPE
(1)
CC3235 DEVICE PIN
NO.
MODULE PIN DESCRIPTION
The module makes extensive use of pin multiplexing to accommodate the large number of peripheral functions in the smallest possible package. To achieve this configuration, pin multiplexing is controlled using a combination of hardware configuration (at module reset) and register control.
The board and software designers are responsible for the proper pin multiplexing configuration. Hardware does not ensure that the proper pin multiplexing options are selected for the peripherals or interface mode used. Table 7-1 describes the general pin attributes and presents an overview of pin multiplexing. All pin multiplexing options are configurable using the pin MUX registers. The following special considerations apply:
All I/Os support drive strengths of 2, 4, and 6 mA. Drive strength is individually configurable for each pin.
All I/Os support 10-µA pullup and pulldown resistors.
By default, all I/Os float in the Hibernate state. However, the default state can be changed by SW.
All digital I/Os are non fail-safe.
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Note
If an external device drives a positive voltage to the signal pads and the CC3235MODx or CC3235MODAx module is not powered, DC is drawn from the other device. If the drive strength of the external device is adequate, an unintentional wakeup and boot of the CC3235MODx or CC3235MODAx module can occur. To prevent current draw, TI recommends any one of the following conditions:
All devices interfaced to the CC3235MODx and CC3235MODAx module must be powered from the same power rail as the chip.
Use level shifters between the device and any external devices fed from other independent rails.
The nRESET pin of the CC3235MODx and CC3235MODAx module must be held low until the VBAT supply to the module is driven and stable.
All GPIO pins default to high impedance unless programmed by the MCU. The bootloader sets the TDI, TDO, TCK, TMS, and Flash_SPI pins to mode 1. All the other pins are left in the Hi-Z state.
The ADC inputs are tolerant up to 1.8 V (see Table 8-24 for more details about the usable range of the ADC). On the other hand, the digital pads can tolerate up to 3.6 V. Hence, take care to prevent accidental damage to the ADC inputs. TI recommends first disabling the output buffers of the digital I/Os corresponding to the desired ADC channel (that is, converted to Hi-Z state), and thereafter disabling the respective pass switches (S7 [Pin 47], S8 [Pin 48], S9 [Pin 49], and S10 [Pin 50]). For more information, see Table 7-3.
Table 7-1. Pin Attributes and Pin Multiplexing
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Pkg. Pin Pin Alias Use
1 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
2 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
3 GPIO10 I/O No No No
Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
GPIO_PAD_ CONFIG_10
(0x4402 E0C8)
Dig. Pin
Mux
Config.
Mode Value
0 GPIO10 GPIO I/O
1 I2C_SCL I2C clock
3 GT_PWM06
7 UART1_TX UART TX data O 1
6 SDCARD_CLK SD card clock O 0
12 GT_CCP01 Timer capture port I
Signal Name Signal Description
Pulse-width modulated O/P
Signal
Directio
n
I/O (open drain)
O
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
Hi-Z,
Pull,
Drive
(2)
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nRESET = 0
Hi-Z
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SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Config.
Addl.
Analog
Mux
Pkg. Pin Pin Alias Use
Select as
Wakeup
Source
4 GPIO11 I/O Yes No No
5 GPIO14 I/O No No No
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
GPIO_PAD_ CONFIG_11
(0x4402 E0CC)
GPIO_PAD_ CONFIG_14
(0x4402 E0D8)
Dig. Pin
Mux
Config.
Signal Name Signal Description Mode Value
0 GPIO11 GPIO I/O
1 I2C_SDA I2C data
3 GT_PWM07
4 pXCLK (XVCLK)
6 SDCARD_CMD
Pulse-width modulated O/P
Free clock to parallel camera
SD card command line
7 UART1_RX UART RX data I
12 GT_CCP02 Timer capture port I
13 MCAFSX
I2S audio port frame sync
0 GPIO14 GPIO I/O
5 I2C_SCL I2C clock
7 GSPI_CLK General SPI clock I/O
4
pDATA8
(CAM_D4)
Parallel camera data bit 4
12 GT_CCP05 Timer capture port I
Signal
Directio
n
I/O (open drain)
O
O 0
I/O (open drain)
O
I/O (open drain)
I
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(2)
nRESET = 0
Hi-Z
Hi-Z
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Config.
Addl.
Analog
Mux
Pkg. Pin Pin Alias Use
Select as
Wakeup
Source
6 GPIO15 I/O No No No
7 GPIO16 I/O No No No
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
GPIO_PAD_ CONFIG_15
(0x4402 E0DC)
GPIO_PAD_ CONFIG_16
(0x4402 E0E0)
Dig. Pin
Mux
Config.
Mode
Signal Name Signal Description
Signal
Directio
n
Value
0 GPIO15 GPIO I/O
I/O
5 I2C_SDA I2C data
(open drain)
7 GSPI_MISO General SPI MISO I/O
4
pDATA9
(CAM_D5)
Parallel camera data bit 5
I
13 GT_CCP06 Timer capture port I
8
SDCARD_
DATA0
SD card data I/O
0 GPIO16 GPIO I/O
7 GSPI_MOSI General SPI MOSI I/O
4
pDATA10
(CAM_D6)
Parallel camera data bit 6
I
5 UART1_TX UART1 TX data O 1
13 GT_CCP07 Timer capture port I
8 SDCARD_CLK SD card clock O Zero
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(2)
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nRESET = 0
Hi-Z
Hi-Z
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SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Config.
Addl.
Analog
Mux
Pkg. Pin Pin Alias Use
Select as
Wakeup
Source
8 GPIO17 I/O Yes No No
9 GPIO12 I/O No No No
10 GPIO13 I/O Yes No No
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
GPIO_PAD_ CONFIG_17
(0x4402 E0E4)
GPIO_PAD_ CONFIG_12
(0x4402 E0D0)
GPIO_PAD_ CONFIG_13
(0x4402 E0D4)
Dig. Pin
Mux
Config.
Mode
Signal Name Signal Description
Signal
Directio
n
Value
0 GPIO17 GPIO I/O
5 UART1_RX UART1 RX data I
7 GSPI_CS
4
8
pDATA11
(CAM_D7)
SDCARD_
CMD
General SPI chip select
Parallel camera data bit 7
SD card command line
I/O
I
I/O
0 GPIO12 GPIO I/O
3 McACLK
4 pVS (VSYNC)
I2S audio port clock output
Parallel camera vertical sync
O
I
I/O
5 I2C_SCL I2C clock
(open drain)
7 UART0_TX UART0 TX data O 1
12 GT_CCP03 Timer capture port I
0 GPIO13 GPIO I/O
I/O
5 I2C_SDA I2C data
(open drain)
4 pHS (HSYNC)
Parallel camera horizontal sync
I
7 UART0_RX UART0 RX data I
12 GT_CCP04 Timer capture port I
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(2)
nRESET = 0
Hi-Z
Hi-Z
Hi-Z
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
Pkg. Pin Pin Alias Use
Select as
Wakeup
Source
GPIO_PAD_
11 GPIO22 I/O No No No
CONFIG_22
(0x4402 E0F8)
12 JTAG_TDI I/O No No
Muxed
with JTAG
TDI
GPIO_PAD_ CONFIG_23
(0x4402 E0FC)
FLASH_
13
SPI_
N/A N/A N/A N/A N/A N/A FLASH_SPI_MISO
MISO
FLASH_
14
SPI_
N/A N/A N/A N/A N/A N/A
nCS_IN
15
FLASH_
SPI_CLK
N/A N/A N/A N/A N/A N/A
16 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
FLASH_
17
SPI_
N/A N/A N/A N/A N/A N/A FLASH_SPI_MOSI
MOSI
Dig. Pin
Mux
Config.
Mode
Signal Name Signal Description
Signal
Directio
n
Value
0 GPIO22 GPIO I/O
I2S audio port frame sync
O
5 GT_CCP04 Timer capture port I
1 TDI
JTAG TDI. Reset default pinout.
I
0 GPIO23 GPIO I/O
2 UART1_TX UART1 TX data O 1
I/O
9 I2C_SCL I2C clock
(open drain)
Data from SPI serial flash (fixed
N/A Hi-Z Hi-Z Hi-Z
default)
FLASH_SPI_nCS_
IN
FLASH_SPI_
CLK
Chip select to SPI serial flash (fixed default)
Clock to SPI serial flash (fixed default)
Data to SPI serial flash (fixed default)
N/A 1
N/A
N/A
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
(2)
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
(3)
Drive
Hi-Z,
Pull,
(3)
Drive
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nRESET = 0
Hi-Z7 McAFSX
Hi-Z
Hi-Z
Hi-Z
Hi-Z
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SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Config.
Addl.
Analog
Mux
Pkg. Pin Pin Alias Use
Select as
Wakeup
Source
18 JTAG_TDO I/O Yes No
19 GPIO28 I/O No No No
20 NC
WLAN
analog
N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
21 JTAG_TCK I/O No No
22 JTAG_TMS I/O No No
Muxed
With
JTAG
Muxed
with JTAG
TDO
Muxed
with JTAG/ SWD-
TCK
Muxed
with JTAG/ SWD­TMSC
Dig. Pin Mux Config. Reg.
GPIO_PAD_
CONFIG_ 24
(0x4402 E100)
GPIO_PAD_
CONFIG_ 40
(0x4402 E140)
GPIO_PAD_
CONFIG_ 28
(0x4402 E110)
GPIO_PAD_
CONFIG_ 29
(0x4402 E114)
Dig. Pin
Mux
Config.
Signal Name Signal Description Mode Value
1 TDO
JTAG TDO. Reset default pinout.
0 GPIO24 GPIO I/O
5 PWM0
Pulse-width modulated O/P
2 UART1_RX UART1 RX data I
9 I2C_SDA I2C data
4 GT_CCP06 Timer capture port I
6 McAFSX
I2S audio port frame sync
0 GPIO28 GPIO I/O
JTAG/SWD TCK.
1 TCK
Reset default pinout.
8 GT_PWM03
Pulse-width modulated O/P
JTAG/SWD TMS.
1 TMS
Reset default pinout.
0 GPIO29 GPIO
Signal
Directio
n
O
O
I/O (open drain)
O
I
O
I/O
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
(2)
Hib
Driven high in
SWD;
driven
low in 4-
wire
JTAG
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
nRESET = 0
Hi-Z
Hi-Z
Hi-Z
Hi-Z
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
GPIO_PAD_
CONFIG_ 25
Pkg. Pin Pin Alias Use
(4)
23
SOP2 O only No No No
Select as
Wakeup
Source
(0x4402 E104)
24 SOP1
Config
sense
N/A N/A N/A N/A N/A SOP1 Sense-on-power 1 N/A N/A N/A N/A
25 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
26 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
27 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
28 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
29 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
30 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
31 RF_ABG
WLAN
analog
N/A N/A N/A N/A N/A
32 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
33 NC
34 SOP0
WLAN
analog
Config
sense
N/A N/A N/A N/A NC Reserved
N/A N/A N/A N/A N/A SOP0 Sense-on-power 0 N/A N/A N/A N/A
35 nRESET Global reset N/A N/A N/A N/A N/A nRESET
36
VBAT_ RESET
Global reset N/A N/A N/A N/A N/A VBAT_RESET
Dig. Pin
Mux
Config.
Signal Name Signal Description Mode Value
0 GPIO25 GPIO O
9 GT_PWM02
2 McAFSX
(5)
See
TCXO_EN
Pulse-width modulated O/P
I2S audio port frame sync
Enable to optional external 40-MHz TCXO
(6)
See
SOP2 Sense-on-power 2 I
CC3235MODx:
RF ABG band
N/A N/A N/A N/A N/A
Master chip reset. Active low.
VBAT to nRESET pullup resistor
Signal
Directio
LPDS
(1)
Hib
(2)
n
Hi-Z,
Pull,
Drive
Hi-Z,
O
Pull,
Drive
O
Pull,
Drive
Hi-Z,
Driven
Low
O 0
Hi-Z,
Pull,
Drive
N/A N/A N/A N/A
N/A N/A N/A N/A
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nRESET = 0
Hi-Z
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SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
Pkg. Pin Pin Alias Use
37 VBAT1
Supply
input
Select as
Wakeup
Source
N/A N/A N/A N/A N/A VBAT1
38 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
39 NC
40 VBAT2
41 NC
WLAN
analog
Supply
input
WLAN
analog
N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
N/A N/A N/A N/A N/A VBAT2
N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
User
42 GPIO30 I/O No
config
not
required
(7)
No
GPIO_PAD_ CONFIG_30
(0x4402 E118)
43 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
Dig. Pin
Mux
Config.
Mode
Signal Name Signal Description
Signal
Directio
n
Value
Analog DC/DC input (connected to chip input supply
N/A N/A N/A N/A
[VBAT])
Analog input supply VBAT
N/A N/A N/A N/A
0 GPIO30 GPIO I/O
9 UART0_TX UART0 TX data O 1
2 McACLK I2S audio port clock O
3 McAFSX
I2S audio port frame sync
O
4 GT_CCP05 Timer capture port I
7 GSPI_MISO General SPI MISO I/O
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
(2)
Hi-Z,
Pull,
Drive
nRESET = 0
Hi-Z
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Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Config.
Addl.
Analog
Mux
Pkg. Pin Pin Alias Use
Select as
Wakeup
Source
User
config
44
GPIO0 I/O No
45 NC
WLAN
analog
N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
not
required
(7)
46 GPIO1 I/O No No No
Muxed
With
JTAG
No
Dig. Pin Mux Config. Reg.
GPIO_PAD_
CONFIG_0
(0x4402 E0A0)
GPIO_PAD_
CONFIG_1
(0x4402 E0A4)
Dig. Pin
Mux
Config.
Mode
Signal Name Signal Description
Signal
Directio
n
Value
0 GPIO0 GPIO I/O
UART0 Clear-to-
12 UART0_CTS
Send input (active
I
low)
6 McAXR1
I2S audio port data 1 (RX/TX)
I/O
7 GT_CCP00 Timer capture port I
9 GSPI_CS
10 UART1_RTS
3 UART0_RTS
4 McAXR0
General SPI chip select
UART1 Request-to­Send (active low)
UART0 Request-to­Send (active low)
I2S audio port data 0 (RX/TX)
I/O
O 1
O 1
I/O
0 GPIO1 GPIO I/O
3 UART0_TX UART0 TX data O 1
Pixel clock from
4 pCLK (PIXCLK)
parallel camera
I
sensor
6 UART1_TX UART1 TX data O 1
7 GT_CCP01 Timer capture port I
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(2)
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nRESET = 0
Hi-Z
Hi-Z
Hi-Z
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
www.ti.com
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Dig. Pin
Mux
Config.
Mode
Signal Name Signal Description
Signal
Directio
n
Value
See
(5)
ADC_CH0
ADC channel 0 input (1.5-V max)
I
0 GPIO2 GPIO I/O
3 UART0_RX UART0 RX data I
6 UART1_RX UART1 RX data I
7 GT_CCP02 Timer capture port I
See
(5)
ADC_CH1
ADC channel 1 input (1.5-V max)
I
0 GPIO3 GPIO I/O
6 UART1_TX UART1 TX data O 1
4
pDATA7
(CAM_D3)
Parallel camera data bit 3
I
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Pkg. Pin Pin Alias Use
Analog
47
(9)
GPIO2
input (up to
1.8 V)/
digital I/O
Analog
48
(9)
GPIO3
input (up to
1.8 V)/
digital I/O
Select as
Wakeup
Source
Yes See
No See
Config.
Addl.
Analog
Mux
(8)
(8)
Muxed
With
JTAG
No
No
Dig. Pin Mux Config. Reg.
GPIO_PAD_
CONFIG_2
(0x4402 E0A8)
GPIO_PAD_
CONFIG_3
(0x4402 E0AC)
Hib
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(2)
nRESET = 0
Hi-Z
Hi-Z
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Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
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27
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Dig. Pin
Mux
Config.
Signal Name Signal Description Mode Value
See
(5)
ADC_CH2
ADC channel 2 input (1.5-V max)
0 GPIO4 GPIO I/O
6 UART1_RX UART1 RX data I
See
4
(5)
pDATA6
(CAM_D2)
ADC_CH3
Parallel camera data bit 2
ADC channel 3 input (1.5 V max)
0 GPIO5 GPIO I/O
4
pDATA5
(CAM_D1)
6 McAXR1
Parallel camera data bit 1
I2S audio port data 1 (RX, TX)
7 GT_CCP05 Timer capture port I
Signal
Directio
n
I
I
I
I
I/O
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
i-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Pkg. Pin Pin Alias Use
Analog
49
(9)
GPIO4
input (up to
1.8 V)/
digital I/O
50
(9)
GPIO5
Analog
input up to
1.5 V
Select as
Wakeup
Source
Yes See
No See
Config.
Addl.
Analog
Mux
(8)
(8)
Muxed
With
JTAG
Yes
No
Dig. Pin Mux Config. Reg.
GPIO_PAD_
CONFIG_4
(0x4402 E0B0)
GPIO_PAD_
CONFIG_5
(0x4402 E0B4)
Hib
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(2)
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nRESET = 0
Hi-Z
Hi-Z
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
www.ti.com
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
Config.
Addl.
Analog
Mux
Pkg. Pin Pin Alias Use
51
GPIO6 I/O No No No
Select as
Wakeup
Source
52 GPIO7 I/O No No No
53 GPIO8 I/O No No No
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
GPIO_PAD_
CONFIG_6
(0x4402 E0B8)
GPIO_PAD_
CONFIG_7
(0x4402 E0BC)
GPIO_PAD_
CONFIG_8
(0x4402 E0C0)
Dig. Pin
Mux
Config.
Mode
Signal Name Signal Description
Signal
Directio
n
Value
0 GPIO6 GPIO I/O
5 UART0_RTS
4
pDATA4
(CAM_D0)
3 UART1_CTS
6 UART0_CTS
UART0 Request-to­Send (active low)
Parallel camera data bit 0
UART1 Clear to send (active low)
UART0 Clear to send (active low)
O 1
I
I
I
7 GT_CCP06 Timer capture port I
0 GPIO7 GPIO I/O
13 McACLK I2S audio port clock O
3 UART1_RTS
10 UART0_RTS
UART1 Request to send (active low)
UART0 Request to send (active low)
O 1
O 1
11 UART0_TX UART0 TX data O 1
0 GPIO8 GPIO I/O
Interrupt from SD
6 SDCARD_IRQ
card (future
I
support)
7 McAFSX
I2S audio port frame sync
O
12 GT_CCP06 Timer capture port I
LPDS
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(1)
Hib
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
(2)
nRESET = 0
Hi-Z
Hi-Z
Hi-Z
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Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
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CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF
SWRS243A – FEBRUARY 2020 – REVISED MAY 2020
Table 7-1. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux Config. Reg.
Pkg. Pin Pin Alias Use
Select as
Wakeup
Source
GPIO_PAD_
54 GPIO9 I/O No No No
CONFIG_9
(0x4402 E0C4)
55 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
56 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
57 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
58 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
59 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
60 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
61 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
62 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
63 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
Dig. Pin
Mux
Config.
Signal Name Signal Description Mode Value
0 GPIO9 GPIO I/O
3 GT_PWM05
6
SDCARD_
DATA0
7 McAXR0
Pulse-width modulated O/P
SD card data I/O
I2S audio port data (RX, TX)
12 GT_CCP00 Timer capture port I
Signal
Directio
n
O
I/O
LPDS
Hi-Z,
Pull,
Drive
(1)
Hib
(2)
Hi-Z,
Pull,
Drive
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nRESET = 0
Hi-Z
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Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
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