TEXAS INSTRUMENTS bq78PL114 Technical data

bq78PL114

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.................................................................................................................................... SLUS850A – SEPTEMBER 2008 – REVISED SEPTEMBER 2008

PowerLAN™ Master Gateway Battery Management Controller

With PowerPump™ Cell Balancing Technology

FEATURES APPLICATIONS

• Designed for Managing up to 12 Series Cell

Battery Systems

• SmartSafety Features:

– Prevention: Optimal Cell Management – Diagnosis: Improved Sensing of Cell

Problems

– Fail Safe: Detection of Event Precursors

• Rate-of-Change Detection of All Important Cell

Characteristics: – Voltage – Impedance – Cell Temperature

• PowerPump Technology Transfers Charge

Efficiently From Cell to Cell During All Operating Conditions, Resulting in Longer Run Time and Cell Life

• High-Resolution 18-Bit Integrating Delta-Sigma

Coulomb Counter for Precise Charge-Flow Measurements and Gas Gauging

• Multiple Independent Δ - Σ ADCs: One-per-Cell

Voltage, Plus Separate Temperature, Current, and Safety

• Simultaneous, Synchronous Measurement of

Pack Current and Individual Cell Voltages

• Very Low Power Consumption: < 250 µ A Active, < 150 µ A Standby, < 40 µ A Ship, and

< 1- µ A Undervoltage Shutdown

• Accurate, Advanced Temperature Monitoring of Cells and MOSFETs With up to Six Sensors This permits accurate temperature monitoring of each

• Fail-Safe Operation of Pack Protection Circuits: Up to Three Power MOSFETs and One Secondary Safety Output (Fuse)

• Fully Programmable Voltage, Current, Balance, and Temperature-Protection Features

• External Inputs for Auxiliary MOSFET Control

• Smart Battery System 1.1 Compliant via

SMBus or SPI Interface With SHA-1 Authentication Option

• Portable Medical Instruments and Test

Equipment

• Mobility Devices (E-Bike)

• Uninterruptible Power Supplies and Hand-Held

Tools

DESCRIPTION

The bq78PL114 master gateway battery controller is part of a complete Li-Ion control, monitoring, and safety solution designed for large series cell strings.

The bq78PL114, along with PowerLAN cell monitors, provides complete battery system control, communications, and safety functions for a structure of three to 12 series cells. This PowerLAN system provides simultaneous, synchronized voltage and temperature measurements using one-ADC-per-cell technology. Voltage measurements are also synchronized with pack current measurements, eliminating system-induced noise from measurements. This allows the precise, continuous, real-time calculation of cell impedance under all operating conditions, even during widely fluctuating load conditions.

PowerPump technology transfers charge between cells to balance their voltage and capacity. Balancing is possible during all battery modes: charge, discharge, and rest. Highly efficient charge-transfer circuitry nearly eliminates energy loss while providing true real-time balance between cells, resulting in longer run-time and improved cycle life.

Temperature is sensed by up to six external sensors. cell individually. Firmware is then able to compensate

for the temperature-induced effects on capacity, impedance, and OCV on a cell-by-cell basis, resulting in superior charge/ discharge and balancing control.

External MOSFET control inputs provide userdefinable direct hardware control over MOSFET states. Smart control prevents excessive current through MOSFET body diodes. Auxiliary inputs can be used for enhanced safety and control in large multicell arrays.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 PowerLAN, PowerPump, bqWizard are trademarks of Texas Instruments. 3 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

FLASH

PRE

CHG

EFCID

EFCIC

SMBus

DSG

SMBCLK

SMBDAT

SPROT

SPI-DI

CSBAT

SPI-DO

CSPACK

SPI-CLK

GPIO

CELL 4

Voltage

Temp

Balance

SPI

SELECT

PUMP4

XT4

ELL 3

Voltage

Temp

Balance

PUMP3

XT3

CELL 2

Voltage

Temp

Balance

PUMP2

XT2

CELL 1

Voltage

Temp

Balance

2.5VLDO

PUMP1

VLDO1

XT1

Watchdog

Coulomb Counter CCBAT

CCPACKCurrent A/D

Core / CPU

Measure

I/O

Safety

RSTN

Internal

Temperature

RISC

CPU

Internal

Oscillator

Reset

Logic

First-LevelSafety

and

FET Control

Second-Level

Safety

LED1–5, LEDEN

B0320-02

PowerLAN

Communication

Link

P-LAN

bq78PL114

SLUS850A – SEPTEMBER 2008 – REVISED SEPTEMBER 2008 ....................................................................................................................................

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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DESCRIPTION (CONTINUED)

The bq78PL114 is completely user-configurable, with parametric tables in flash memory to suit a variety of cell chemistries, operating conditions, safety controls, and data reporting needs. It is easily configured using the supplied bqWizard™ graphical user interface (GUI). The device is fully programmed and requires no algorithm or firmware development.

Figure 1. bq78PL114 Internal Block Diagram

Product Folder Link(s): bq78PL114

bq76PL102 Cell

MonitorWith PowerPump

Balancing

PowerLAN

Communication

Link

PowerLAN

MasterGateway

BatteryController

bq78PL114

Pack

Positive

Pack

Negative

Example8-cellconfigurationshown

–

SMBus

SEN

PackProtection

CircuitsandFuse

B0332-01

bq76PL102 Cell

MonitorWith PowerPump

Balancing

bq78PL114

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.................................................................................................................................... SLUS850A – SEPTEMBER 2008 – REVISED SEPTEMBER 2008

Figure 2. Example PowerLAN Multicell System Implementation

ORDERING INFORMATION

Product Cell Configuration

(2)

Package Ordering Number Transport

bq78PL114 3 to 8 series cells

bq78PL114 QFN-48, 7-mm (PREVIEW) × 7-mm

3 to 10 series cells RGZ – 40 ° C to 85 ° C

bq78PL114

(PREVIEW)

3 to 12 series cells

(1) Authentication options are also available; contact TI for additional information. (2) For configurations consisting of more than four series cells, additional bq76PL102 parts must be used. (3) Some historical data storage limits exist for the S10 and S12 versions.

Package Temperature

Designator Range

(1)

Quantity,

Media

bq78PL114RGZT

bq78PL114RGZR

bq78PL114S10RGZT

bq78PL114S10RGZR

bq78PL114S12RGZT

bq78PL114S12RGZR

(3)

250, tape and reel

2500, tape and reel

250, tape and reel

2500, tape and reel

250, tape and reel

2500, tape and reel

Product Folder Link(s): bq78PL114

P0023-16

bq78PL114

RGZPackage

(TopView)

CHG

SDO0

DSG

SDI1

PRE

P1N

EFCIC

P2S

EFCID

P2N

CCBAT

SDO2

CCPACK

SDI3

VLDO1

P3S

CSBAT

P3N

CSPACK

P4S

OSCI

P4N

OSCO

P-LAN

LED5

VSS

LED4

LED3

XT1

LED2

XT2

LED1

LEDEN

VLDO2

SPROT

SELECT

XT3

SPI-DO

XT4

SPI-DI

SPI-CLK

SMBDAT

RSTN

SMBCLK

ThermalPad

bq78PL114

SLUS850A – SEPTEMBER 2008 – REVISED SEPTEMBER 2008 ....................................................................................................................................

AVAILABLE OPTIONS

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Figure 3. bq78PL114 Pinout

(1)

NAME NO. TYPE

CCBAT 6 IA Coulomb counter input (sense resistor), connect to battery negative CCPACK 7 IA Coulomb counter input (sense resistor), connect to pack negative CHG 1 O Charge MOSFET control (active-high, enables current flow) CSBAT 9 IA Current sense input (safety), connect to battery negative CSPACK 10 IA Current sense input (safety), connect to pack negative DSG 2 O Discharge MOSFET control (active-high, low opens MOSFET) EFCIC 4 I External charge MOSFET control input EFCID 5 I External discharge MOSFET control input LED1 32 IO LED1 – active-low LED2 33 IO LED2 – active-low LED3 34 IO LED3 – active-low LED4 35 IO LED4 – active-low LED5 36 IO LED5 – active-low LEDEN 31 IO LEDEN – common-anode drive (active-high) OSCI 11 I External oscillator input (optional) OSCO 12 O External oscillator output (optional)

TERMINAL FUNCTIONS

DESCRIPTION

Product Folder Link(s): bq78PL114

bq78PL114

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.................................................................................................................................... SLUS850A – SEPTEMBER 2008 – REVISED SEPTEMBER 2008

TERMINAL FUNCTIONS (continued)

NAME NO. TYPE

P1N 15 O Charge-balance gate drive, cell 1 north P2S 16 O Charge-balance gate drive, cell 2 south P2N 17 O Charge-balance gate drive, cell 2 north P3N 21 O Charge-balance gate drive, cell 3 north P3S 20 O Charge-balance gate drive, cell 3 south P4N 23 O Charge-balance gate drive, cell 4 north P4S 22 O Charge-balance gate drive, cell 4 south P-LAN 24 IO PowerLAN I/O to external bq76PL10x nodes PRE 3 O Pre-Charge MOSFET control (active-high.) RSTN 25 I Device reset, active-low SDI1 14 I Connect to SDO0 via a capacitor SDI3 19 I Internal PowerLAN connection – connect to SDO2 SDO0 13 O Requires 100-k Ω pullup resistor to VLDO1 SDO2 18 O Internal PowerLAN connection – connect to SDI3 SELECT 29 O Auxiliary SPI control output SMBCLK 37 IO SMBus clock signal SMBDAT 38 IO SMBus data signal SPI-CLK 26 IO SPI port clock SPI-DI 27 I SPI master-out-slave-in SPI-DO 28 O SPI master-in-slave-out SPROT 30 O Secondary protection output, active-high (FUSE) V1 47 IA Cell-1 positive input V2 44 IA Cell-2 positive input V3 42 IA Cell-3 positive input V4 39 IA Cell-4 positive input VLDO1 8 P Internal LDO-1 output, bypass with capacitor VLDO2 43 P Internal LDO-2 output, bypass with capacitor VSS 48 IA Cell-1 negative input XT1 46 IA External temperature-sensor-1 input XT2 45 IA External temperature-sensor-2 input XT3 41 IA External temperature-sensor-3 input XT4 40 IA External temperature-sensor-4 input – – P Thermal pad. Connect to VSS

(2) SPI functionality requires a firmware option, consult the factory for additional information.

(1)

(2)

(2) (2)

DESCRIPTION

Product Folder Link(s): bq78PL114

bq78PL114

SLUS850A – SEPTEMBER 2008 – REVISED SEPTEMBER 2008 ....................................................................................................................................

ABSOLUTE MAXIMUM RATINGS

(1)

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over operating free-air temperature range (unless otherwise noted)

RANGE UNITS

stg

V4 – V3 Maximum cell voltage – 0.5 to 5.0 V V3 – V2 Maximum cell voltage – 0.5 to 5.0 V V2 – V1 Maximum cell voltage – 0.5 to 5.0 V V1 – VSS Maximum cell voltage – 0.5 to 5.0 V Voltage on LED1 – LED5, CCBAT,

CCPACK, CSBAT, CSPACK, XT1, XT2, OSCI, OSCO, SDIx, SDOx, SPROT, P-LAN

Voltage on XT3, XT4, LEDEN Maximum voltage range V EFCIC, EFCID With respect to VSS – 0.5 to 5.5 V

Voltage on SMBCLK, SMBDAT With respect to VSS – 0.5 to 6 V Voltage on PRE, CHG, DSG With respect to VSS – 0.5 to (VLDO1 + 0.5) V Current through PRE, CHG, DSG,

LED1 – LED5, P-LAN VLDO1 maximum current Maximum current draw from VLDO 20 mA

ESD tolerance 2 kV Lead temperature, soldering Total time < 3 seconds 300 ° C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

Operating free-air temperature (ambient) – 40 to 85 ° C Storage temperature – 65 to 150 ° C

Maximum voltage on any I/O pin V

Maximum current source/sink 20 mA

JEDEC, JESD22-A114 human-body model, R = 1500 Ω , C = 100 pF

(VSS – 0.5) to

(VLDO1 + 0.5)

(V2 – 0.5) to

(VLDO2 + 0.5)

Product Folder Link(s): bq78PL114

bq78PL114

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.................................................................................................................................... SLUS850A – SEPTEMBER 2008 – REVISED SEPTEMBER 2008

ELECTRICAL CHARACTERISTICS

TA= – 40 ° C to 85 ° C (unless otherwise noted)

DC Characteristics

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(1)

CELL

STBY

SHIP

ECUV

Operating range Cells balanced 2.3 4.5 V Operating-mode current Measure / report state 250 µ A Standby-mode current SMBCLK = SMBDAT = L 100 µ A Ship-mode current 30 µ A Extreme cell under voltage All cells < 2.7 V and any cell < ECUV set

shutdown current point General I/O pins IOL< 4 mA 0 0.5 V

(2)

General I/O pins IOH< – 4 mA V

– 0.1 V

LDO1

General I/O pins 0.25 V General I/O pins 0.75 V

LDO1

1 µ A

LDO1

(1) Device remains operational to 1.85 V with reduced accuracy and performancce. (2) Does not apply to SMBus pins.

Voltage-Measurement Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Measurement range 2.5 4.5 V Resolution < 1 mV

Accuracy mV

25 ° C ± 5 0 ° C to 60 ° C ± 10

V V

Current-Sense Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Measurement range Input offset TA= 25 ° C ± 50 µ V Offset drift TA= 0 ° C to 60 ° C 0.5 µ V/ ° C Resolution 18 µ V Full-scale error Full-scale error drift TA= 0 ° C to 60 ° C 50 PPM/ ° C

(1) Default range. Corresponds to ± 10 A using a 10-m Ω sense resistor. Other gains and ranges are available (eight options). (2) After calibration. Accuracy is dependent on system calibration and temperature coefficient of sense resistor.

Coulomb-Counter Characteristics

over operating free-air temperature range (unless otherwise noted)

Resolution 5 nVh Intergral nonlinearity 0.008% Snap-to-zero (deadband) ± 100

(1) Shares common input with Current Sense section (2) After calibration. Accuracy is dependent on system calibration and temperature coefficient of sense resistor. (3) Corresponds to 20 mA using 5-m Ω sense resistor

(1)

(2)

TA= 25 ° C ± 0.1%

(1) (2)

– 0.2 0.2 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(3)

µ V

Product Folder Link(s): bq78PL114

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