This manual discusses the modules and peripherals of the bq78350-R1 device, and how each is used to
build a complete battery pack gas gauge and protection solution.
Notational Conventions
The following notational conventions are used if SBS commands and data flash values are mentioned
within a text block:
•SBS commands: italics with parentheses and no breaking spaces; for example, RemainingCapacity().
•Data flash: italics, bold, and breaking spaces; for example, Design Capacity.
•Register bits and flags: italics and brackets; for example, [TDA] Data
•Flash bits: italics and bold; for example, [LED1]
•Modes and states: ALL CAPITALS; for example, UNSEALED
The reference format for SBS commands is: SBS:Command Name(Command No.): Manufacturer
Access(MA No.)[Flag], for example:
SBS:Voltage(0x09), or SBS:ManufacturerAccess(0x00): Seal Device(0x0020)
Read This First
SLUUBD3D–September 2015–Revised September 2018
Preface
Trademarks
All trademarks are the property of their respective owners.
The bq78350-R1 device provides a feature-rich battery management solution for 3-series cell to 15-series
cell battery pack applications. The device has extended capabilities, including:
•Companion Protection Controller to the bq76920, bq76930, and bq76940 AFE Devices for Li-Ion or
LiFePO4 Battery Packs
•Compensated End-of-Discharge Voltage (CEDV) Gas Gauging Algorithm Accurately Measures
Available Charge and State-of-Health
•Voltage Based Cell Balancing Control
•Normal and Lower Power Modes
– NORMAL
– SLEEP
– SHUTDOWN
•Full Array of Programmable Protection Features
– Voltage
– Current
– Temperature
– Charge Timeout
– CHG/DSG FETs
•Precharge and Fast Charge Algorithm
•Diagnostic Lifetime Data Monitor
•Black Box Event Recorder
•Supports Two-Wire SMBus v1.1 Interface
•SHA-1 Authentication
•Package: 30-Lead TSSOP
The bq78350-R1 is intended to be used with the bq769x0 Battery Monitor with a 2.5-V REGOUT
configuration and I2C Address 0x08. However, the bq78350-R1 can use a bq769x0 with or without the
communications CRC enabled (the bq78350-R1 automatically detects if CRC is enabled).
NOTE: For this section, refer to the bq769x0 3-Series to 15-Series Cell Battery Monitor Family for Li-
Ion and Phosphate Applications Data Manual (SLUSBK2) for further details.
The bq78350-R1 reads the bq769x0 companion AFE registers that contain recent values from the
integrating analog-to-digital converter (ADC) for current measurement, and a second delta-sigma ADC for
individual cell and temperature measurements. The bq78350-R1 also has the capability to measure the
battery voltage through an externally translated voltage.
2.2Current and Coulomb Counting
The integrating delta-sigma ADC in the companion bq769x0 AFE measures the charge/discharge flow of
the battery by measuring the voltage drop across a small-value sense resistor between the SRP and SRN
pins. The 15-bit integrating ADC measures bipolar signals from –0.20 V to 0.20 V with 15-µV resolution.
The AFE reports charge activity when VSR = V
V
– V
(SRP)
digital signal from the AFE over time using an internal counter.
To support large battery configurations, the current data can be scaled to ensure accurate reporting
through the SMBus. The data reported is scaled based on the setting of the SpecificationInfo() command.
The data reported through the Current() can also have a deadband applied to it. This removes any noise
or offset that has not been calibrated out from being reported as real current. This value is programmed in
Deadband with a default configured for mA scaling in SpecificationInfo(). If the SpecificationInfo()
IPSCALE is set to 10 mA or 100 mA, then it is strongly recommended to set Deadband to 1.
is negative. The bq78350-R1 continuously monitors the measured current and integrates the
(SRN)
Chapter 2
SLUUBD3D–September 2015–Revised September 2018
Basic Measurement System
(SRP)
– V
is positive, and discharge activity when VSR =
(SRN)
2.3Voltage
The bq78350-R1 updates the individual series cell voltages through the bq769x0 at 250-ms intervals. The
bq78350-R1 configures the bq769x0 to connect to the selected cells in sequence and uses this
information for cell balancing and individual cell fault functions. The internal 14-bit ADC of the bq769x0
measures each cell voltage value, which is then communicated digitally to the bq78350-R1 where it is
scaled and translated into unit millivolts. The maximum supported input range of the ADC is 6.075 V.
The bq78350-R1 also separately measures the average cell voltage through an external translation circuit
at the BAT pin. This value is specifically used for the gas gauge algorithm. The external translation circuit
is controlled via the VEN pin so that the translation circuit is only enabled when required to reduce overall
power consumption. VEN requires an external pullup to VCC, typically 100 k, to operate correctly.
In addition to the voltage measurements used by the bq78350-R1 algorithms, there is an optional auxiliary
voltage measurement capability via the VAUX pin. This feature measures the input on a 250-ms update
rate and provides the programmable scaled value through the VAUXVoltage() SMBus command. The data
can be enabled to influence selected fault recovery features. See General Protections Configuration,
[VAUXR], for further details.
The VEN pin will go high 2 ms prior to the BAT being measured if DA Configuration [ExtAveEN] = 1,
and then return low unless DA Configuration [VAUXEN] = 1, which will cause VEN to remain high for a
further 2 ms prior to making the VAUX measurement. This results in VEN possibly being high for up to
40 ms per second in NORMAL mode.
To support large battery configurations where the battery voltage can exceed 32767 mV, the data should
be scaled as the gauge's internal data processing is done in a signed integer range (–32768 to 32767) to
ensure accurate reporting through the SMBus. The data reported is scaled based on the setting of the
SpecificationInfo() command. The cell voltages are not scaled.
2.4Temperature
The bq78350-R1 receives temperature information from external or internal temperature sensors in the
bq769x0 AFE. Depending on the number of series cells supported, the AFE will provide one, two, or three
external thermistor measurements. The value of temperature is reported through Temperature() and can
be configured in DA Configuration.
2.4.1 FET Temperature Measurement
The bq78350-R1 can be configured to report FET temperature, which can be available through
DAStatus2(). If multiple temperature sensors are selected for FET temperature, then either the average or
highest is used based on the setting of [FTEMP] in [DA Configuration].
The selection of temperature sensor as cell temperature protection or FET temperature protection can be
made through the Temperature Mode register.
2.4.2 Temperature Enable
This register enables/disables the available temperature sensor options.
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ClassSubclassNameFormat
SettingsConfiguration
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Low ByteRSVDRSVDRSVDRSVDSOURCETS3TS2TS1
Temperature
Enable
hex10x000xFF0x09—
Size in
Bytes
MinMaxDefaultUnit
RSVD (Bits 7–4): Reserved
SOURCE (Bit 3): Configure the use of Internal or External temperature sensors for all AFE ports
0 = Use internal temperature sensor(s)
1 = Use external temperature sensor(s)
TS3 (Bit 2): Enable/disable companion AFE temperature sensor TS3, if available
0 = Disable TS3 temperature sensor
1 = Enable TS3 temperature sensor
TS2 (Bit 1): Enable/disable companion AFE temperature sensor TS2, if available
0 = Disable TS2 temperature sensor
1 = Enable TS2 temperature sensor
TS1 (Bit 0): Enable/disable companion AFE temperature sensor TS1
0 = Disable TS1 temperature sensor
1 = Enable TS1 temperature sensor
2.4.3 Temperature Mode Configuration
Each available external temperature sensor can be configured to be used for the cell temperature or FET
temperature features.
RSVD (Bits 7–3): Reserved
TSMode3 (Bit 2): Select TS3 sensor for Cell or FET Temperature Protection
0 = Use for Cell (default)
1 = Use for FETTemperature()
TSMode2 (Bit 1): Select TS2 sensor for Cell or FET Temperature Protection
0 = Use for Cell (default)
1 = Use for FETTemperature()
TSMode1 (Bit 0): Select TS1 sensor for Cell or FET Temperature Protection
0 = Use for Cell (default)
1 = Use for FETTemperature()
2.5Temperature Ranges
The measured temperature is segmented into several temperature ranges. The bq78350-R1 uses these
as indication, and, for Lifetime Data Logging, the time spent in each range. The temperature ranges set in
data flash should adhere to the following format:
T1 ≤ T2 ≤ T3 ≤ T4
2.6Basic Configuration Options
2.6.1 DA Configuration
SLUUBD3D–September 2015–Revised September 2018
Submit Documentation Feedback
Figure 2-2. Data Flash Temperature Range Format
See the Temperature Ranges data flash subclass for details on the specific data flash variables.
There are a variety of options available in the bq78350-R1 and the companion AFE that influence the
startup conditions, system configuration, and the data measurement system.
This register is used to configure the setup of various measurement features of the bq78350-R1.
0 = The bq78350-R1 configures the PRECHG as active low (default).
1 = The bq78350-R1 configures the PRECHG as active high, requiring an external pullup.
SLEEPCHG: CHG FET is enabled during SLEEP.
0 = CHG FET off during SLEEP (default).
1 = CHG FET remains on during SLEEP.
CHGFET: FET action on valid charge termination
0 = FET active
1 = Charging and Precharging disabled, FET off (default)
CHGIN: FET action in CHARGE INHIBIT mode
0 = FET active (default)
1 = Charging and Precharging disabled, FETs off
CHGSU: FET action in CHARGE SUSPEND mode
0 = FET active (default)
1 = Charging and Precharging disabled, FETs off
OTFET: FET action in OVERTEMPERATURE mode
0 = No FET action for overtemperature condition (default)
1 = CHG and DSG FETs will be turned off for overtemperature conditions.
KEY_EN: Enables the bq78350-R1 to use the KEYIN pin function
0 = The bq78350-R1 never uses KEYIN (default).
1 = The bq78350-R1 KEYIN is used to control the DSG FET.
PCHG_EN: Enables the bq78350-R1 to use the PRECHG pin during PRECHARGE mode
0 = The bq78350-R1 never uses PRECHG.
1 = The bq78350-R1 controls PRECHG under normal charge control algorithm (default).
2.6.3 AFE Cell Map
This register maps the cells connected to the companion AFE so that the bq78350-R1 knows cells are
present at the indicated VCx channel.
ClassSubclassNameFormat
ConfigurationAFE
High ByteRSVDVC15VC14VC13VC12VC11VC10VC9
Low ByteVC8VC7VC6VC5VC4VC3VC2VC1
RSVD (Bit 7): Reserved
VCx: Cell connected to this node
1 = A cell is connected to this node and valid measurements are expected.
0 = A cell is NOT connected to this node.
The bq78350-R1 supports a wide range of battery and system protection features that are easily
configured or enabled via the integrated data flash. All of the protection items can be enabled or disabled
under Settings:Enable Protections A, Settings:Enable Protections B, and Settings:EnableProtections C.
If the CHG FET is off and the gauge detects discharge current ≥ Dsg Current Threshold, then the CHG
FET is turned on to protect CHG FET body diode. The CHG FET is turned back off once discharge current
is removed. If the DSG FET is off and the gauge detects charge current ≥ Chg Current Threshold, then
the DSG FET is turned on to protect the DSG FET body diode. The DSG FET is turned back off once
charge current is removed. Body diode protection is always active.
3.1.1 General Protections Configuration
Chapter 3
SLUUBD3D–September 2015–Revised September 2018
Protections
ClassSubclassNameFormat
SettingsProtection
76543210
RSVDRSVDCC_DSG_OFF DC_CHG_OFFLPENVAUXR
Protection
Configuration
Hex10x000xFF0x00—
Size in
Bytes
MinMaxDefaultUnit
CUV_RECOV_
CHG
RSVD (Bits 7–6): Reserved
CC_DSG_OFF (Bit 5): Turns DSG FET OFF in current-based charge faults
0 = Disabled (default)
1 = Enabled
DC_CHG_OFF (Bit 4): Turns CHG FET OFF in current-based discharge faults
0 = Disabled (default)
1 = Enabled
LPEN (Bit 3): Protection recovery uses the LOAD_PRESENT flag in the AFE to determine discharge
fault recovery. LOAD_PRESENT should only be used in a low-side protection FET configuration.
0 = Disabled (default)
1 = Enabled
VAUXR (Bit 2): Protection recovery uses the VAUX input as charger present detection.
0 = Disabled (default)
1 = Enabled
CUV_RECOV_CHG (Bit 1): Requires charge to recover SafetyStatus()[CUV]
The bq78350-R1 offers the option to recover current-based protection by detecting the PRES pin transition
from high to low; for example, the pack is removed and re-inserted into the system.
To enable the replacement recovery, the appropriate bit in Enable Removable Recovery A and EnableRemovable Recovery B should be set. When the bit is set, then the high to low transition of PRES
becomes the only recovery method.
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Table 3-1. Enabled Removal Recovery A
ClassSubclassNameFormat
SettingsProtection
76543210
ASCDLASCDAOLDLAOLDOCDOCCRSVDRSVD
Enable
Removable
Recovery A
Hex10x000xff0x00—
Size in
Bytes
MinMaxDefaultUnit
ASCDL (Bit 7): ASCDL Protection Removal recovery
0 = Standard recovery only enabled (default)
1 = Removal recovery only enabled
ASCD (Bit 6): ASCD Protection Removal recovery
0 = Standard recovery only enabled (default)
1 = Removal recovery only enabled
AOLDL (Bit 5): AOLDL Protection Removal recovery
0 = Standard recovery only enabled (default)
1 = Removal recovery only enabled
AOLD (Bit 4): AOLD Protection Removal recovery
0 = Standard recovery only enabled (default)
1 = Removal recovery only enabled
OCD (Bit 3): Precharging Timeout
0 = Standard recovery only enabled (default)
1 = Removal recovery only enabled
OCC (Bit 2): OCC Protection Removal recovery
0 = Standard recovery only enabled (default)
1 = Removal recovery only enabled
ClassSubclassNameFormatSize in BytesMinMaxDefaultUnit
SettingsProtection
76543210
RSVDOCDLRSVDRSVDRSVDRSVDRSVDRSVD
Enable
Removable
Recovery B
Hex10x000xff0x00—
RSVD (Bit 7): Reserved. Do not use.
OCDL (Bit 6): OCDL Protection Removal recovery
0 = Standard recovery only enabled (default)
1 = Removal recovery only enabled
RSVD (Bits 5–0): Reserved. Do not use.
3.1.4 FET Action Options for Current Protections
The bq78350-R1 offers the option to turn off the CHG FET during an overcurrent in discharge (OCD),
overcurrent in discharge latch (OCDL), overload (AOLD), overload latch (AOLDL) or short circuit in
discharge (ASCD), short circuit in discharge latch (ASCDL) faults, or the DSG FET in overcurrent in
charge (OCC) faults.
The CHG FET will turn off for the OCD, OCDL, AOLD, AOLDL, ASCD, and ASCDL faults when
[DC_CHG_OFF] in Protection Configuration is set.
The DSG FET will turn off for the OCC faults when [CC_DSG_OFF] in Protection Configuration is set.
Introduction
3.2Cell Undervoltage Protection
The device can detect undervoltage in batteries and protect cells from damage by preventing further
discharge.
Upon CUV detection, a snapshot of the measured cell voltages are made available in CUVSnapshot().
This snapshot is available until the next instance of a CUV fault, as this causes the data to be updated to
the latest set of measurements.
StatusConditionAction
NormalAll Cell voltages in CellVoltage1..15() > CUV:Threshold
Alert
Trip
Recovery
Any Cell voltages in CellVoltage1..15() ≤
CUV:Threshold
Any Cell voltages in CellVoltage1..15() ≤CUV:Threshold for CUV:Delay duration
SafetyStatus()[CUV] = 1 AND
All Cell voltages in CellVoltage1..15() ≥ CUV:Recovery
AND
Protection Configuration[CUV_RECOV_CHG] = 0 OR
[CUV_RECOV_CHG] = 1
AND Charging detected (that is, BatteryStatus[DSG] = 0)
The device can detect cell overvoltage in batteries and protect cells from damage by preventing further
charging.
Upon COV detection, a snapshot of the measured cell voltages are made available in COVSnapshot().
This snapshot is available until the next instance of a COV fault, as this causes the data to be updated to
the latest set of measurements.
StatusConditionAction
NormalAll voltages in CellVoltage1..15() < COV:ThresholdSafetyAlert()[COV] = 0
AlertAny voltage in CellVoltage1..15() ≥ COV:Threshold
Trip
Recovery
Recovery
Any voltage in CellVoltage1..15() ≥ COV:Threshold
continuous ≥ COV:Threshold for COV:Delay duration
SafetyStatus()[COV] = 1 AND Protection
Configuration:VAUXR = 0
all voltages in CellVoltage1..15() ≤ COV:Recovery
SafetyStatus()[COV] = 1 AND Protection
Configuration:VAUXR = 1
all voltages in CellVoltage1..15() ≤ COV:Recovery AND
VAUXVoltage() < Power:Charger Present Threshold
The device has overcurrent in charge protection that can be configured to specific current and delay
thresholds to accommodate charging behaviors. See Section 3.1.4 for additional FET action options.
The device has two independent overcurrent in discharge protections that can be set to different current
and delay thresholds to accommodate different load behaviors. See Section 3.1.4 for additional FET
action options.
StatusConditionAction
NormalCurrent() > OCD:ThresholdSafetyAlert()[OCDL] = 0, if OCDL counter = 0
AlertOCDL counter > 0
Trip
LatchOCDL counter ≥ OCD:Latch Limit
Recovery
Recovery
Latch ResetSafetyStatus()[OCDL] = 1 for OCD: Reset Time
Current() continuous ≤ OCD:Threshold for
OCD:Delay duration
[SafetyStatus()[OCD] = 1 AND Protection
Configuration:VAUXR = 0Current() continuous ≥ OCD:Recovery Threshold
for OCD:Recovery Delay time
[SafetyStatus()[OCD] = 1 AND Protection
Configuration:VAUXR = 1
Current() continuous ≥ OCD:Recovery Threshold
for OCD:Recovery Delay time OR VAUXVoltage()
≥ Power:Charger Present Threshold
Overcurrent in Discharge Protection
Overcurrent in Charge trip
threshold
Overcurrent in Charge trip
delay
Overcurrent in Charge
recovery threshold
Overcurrent in Charge
recovery delay
SafetyAlert()[OCDL] = 1, Decrement OCDL counter by
one after each OCD:Counter Dec Delay period
The bq78350-R1 device has two main hardware-based protections, AOLD and ASCD, with adjustable
current and delay time. Setting ASCD Threshold and Delay [RSNS] doubles the threshold value. It is
located in bit 8 of the ASCD Threshold Delay register. The Threshold settings are in mV; therefore, the
actual current that triggers the protection is based on the R
For details on how to configure the AFE hardware protection, refer to the tables in the companion data
manual, bq769x0 3-Series to 15-Series Cell Battery Monitor Family for Li-Ion and Phosphate Applications
(SLUSBK2).
All of the hardware-based protections provide a short term Trip/Alert/Recovery protection to account for a
current spike as well as a Trip/Alert/Latch protection for persistent faulty condition. The latch feature also
stops the FETs from toggling on and off continuously, preventing damage to the FETs.
In general, when a fault is detected after the Delay time, the DSG FET will be disabled. However, if
Protection Configuration [LPEN] is set, then both FETs are turned off (Trip stage), and an internal fault
counter will be incremented (Alert stage). As the DSG FET is turned off, the current will drop to 0 mA.
After Recovery time, the CHG and DSG FETs will be turned on again (Recovery stage) unless additional
recovery conditions are enabled.
If the alert is caused by a current spike, the fault count will be decremented after Counter Dec Delay
time. If this is a persistent faulty condition, the device will enter the Trip stage after Delay time, and repeat
the Trip/Alert/Recovery cycle. The internal fault counter is incremented every time the device goes through
the Trip/Alert/Recovery cycle. Once the internal fault counter hits the Latch Limit, the protection enters a
Latch stage and the fault will only be cleared through the Latch Reset condition. If Latch Limit is set to 0, it
will latch after the first detection.
The Trip/Alert/Recovery/Latch stages are documented in each of the following hardware-based protection
sections.
used in the schematic design.
SENSE
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3.6.1 Overload in Discharge Protection
The device has a hardware-based overload in discharge protection with adjustable current and delay. See
Section 3.1.4 for additional FET action options.
StatusConditionAction
Normal
AlertAOLDL counter > 0
Trip
LatchAOLDL counter ≥ AOLD:Latch Limit
Recovery
Latch Reset
Current() > (AOLD Threshold and
Delay[3:0]/R
Current() continuous ≤ (AOLD Threshold
and Delay[3:0]/R
and Delay[6:4] duration
SafetyStatus()[AOLD] = 1 for
AOLD:Recovery time OR
If Protection Configuration [LPEN] = 1
AND AFEStatus()[LOAD_PRESENT]= 0
This register is representative of the bq769x0 PROTECT 2 register.
Hardware-Based Protection
ClassSubclassNameTypeMinMaxDefaultUnit
ProtectionsAOLDThreshold and DelayH10x000xFF0x00—
ProtectionsAOLDLatch LimitU102550counts
ProtectionsAOLDCounter Dec DelayU1025510s
ProtectionsAOLDRecoveryU102555s
ProtectionsAOLDResetU1025515s
ClassSubclassNameFormat
SettingsAOLD
76543210
RSVDOCD_D2OCD_D1OCD_D0OCD_T3OCD_T2OCD_T1OCD_T0
Threshold and
Delay
Hex10x000xFF0x00—
Size in
Bytes
MinMaxDefaultUnit
RSVD (Bit 7): Reserved. Do not use.
OCD_D2:0 (Bits 6–4): OCD Thresholds Delay Time
000 = 8 ms
001 = 20 ms
010 = 40 ms
011 = 80 ms
100 = 160 ms
101 = 320 ms
110 = 640 ms
111 = 1280 ms
The device has a hardware-based short circuit in discharge protection with adjustable current and delay.
See Section 3.1.4 for additional FET action options.
StatusConditionAction
Normal
AlertASCDL counter > 0
Trip
LatchASCD counter ≥ ASCD:Latch Limit
Recovery
Latch Reset
Current() > (ASCD Threshold and
Delay[2:0]/R
Current() continuous ≤ (ASCD Threshold
and Delay[2:0]/R
and Delay[7:4] duration
SafetyStatus()[ASCD] = 1 for
ASCD:Recovery time
OR
If Protection Configuration [LPEN] = 1
AND AFEStatus()[LOAD_PRESENT] = 0
DSG FET returns to normal if SafetyStatus()[ASCD] = 0.
26
ClassSubclassNameTypeMinMaxDefaultUnit
ProtectionsASCDThreshold and DelayH10x000xFF0x00—
ProtectionsASCDLatch LimitU102550counts
ProtectionsASCDCounter Dec DelayU1025510s
ProtectionsASCDRecoveryU102555s
ProtectionsASCDResetU1025515s
This register is representative of the bq769x0 PROTECT 1 register.
The device can detect an external override signal sent to the companion bq769x0 AFE that can cause
permanent failure of the battery. This new option provides a temporary fault detection that acts on the
FETs. The permanent failure option is not affected by this change.
AFESysStat() [OVRD_ALERT] = 1 for AFE
External Override Delay duration
AFESysStat() [OVRD_ALERT] = 0 for AFE
External Override Recovery duration
3.7Temperature Protections
The device provides overtemperature and undertemperature protections based on cell temperature
measurements. The cell temperature based protections are further divided into a protection-in-charging
direction and discharging directions. This section describes in detail each of the protection functions.
For temperature reporting, the device supports a maximum of either three external thermistors or three
internal temperature sensors. The selection of Internal or External temperature sensors is set by
Settings:Temperature Enable[SOURCE]. Unused temperature sensors should be disabled by clearing
the corresponding flag in Settings:Temperature Enable[TS3][TS2][TS1].
The Temperature() command returns the cell temperature measurement. The MAC and extended
command DAStatus2() also returns the temperature measurement from the enabled temperature sensors
and the cell temperature.
The cell temperature based overtemperature and undertemperature safety provide protections in charge
and discharge conditions. The battery pack is considered in CHARGE mode when Battery[DSG] = 0,
where Current() > Chg Current Threshold. The overtemperature and undertemperature in charging
protections are active in this mode. The Battery[DSG] is set to 1 in a NON-CHARGE mode condition,
which includes RELAX and DISCHARGE modes. The overtemperature and undertemperature in
discharge protections are active in these two modes.
The device can prevent continuing charging if the pack is charged in excess over FullChargeCapacity().
While RemainingCapacity() never reports a value higher than FullChargeCapacity() in the device registers,
it is tracked to higher values internally to protect against overcharging.
The device can permanently disable the use of the battery pack in case of a severe failure. The
permanent failure checks, except for IFC and DFW, can be individually enabled or disabled by setting the
appropriate bit in Settings:Enabled PF A, Settings:Enabled PF B, Settings:Enabled PF C, and
Settings:Enabled PF D. All permanent failure checks except for IFC and DFW are disabled until
ManufacturingStatus()[PF] is set. When any PFStatus() bit is set, the device enters PERMANENT FAIL
mode and the following actions are taken in sequence:
1. Precharge, charge, and discharge FETs are turned off.
2. OperationStatus()[PF] = 1
3. The following SBS data is changed: BatteryStatus()[TCA] = 1, BatteryStatus()[TDA] = 1,
ChargingCurrent() = 0, and ChargingVoltage() = 0.
4. A backup of the internal AFE hardware registers are written to data flash: AFE Status, AFE Config,
AFE VCx, and AFE Data.
5. The black box data of the last three SafetyStatus() changes leading up to PF with the time difference is
written into the black box data flash along with the 1stPFStatus() value.
6. The following SBS values are preserved in data flash for failure analysis:
•SafetyAlert()
•SafetyStatus()
•PFAlert()
•PFStatus()
•OperationStatus()
•ChargingStatus()
•GaugingStatus()
•Voltages in DAStatus1()
•Current()
•TS1, TS2, and TS3 from DAStatus2()
7. Data flash writing is disabled (except to store subsequent PFStatus() flags).
8. The SAFE pin is driven high if configured for specific failures and Voltage() is above 3500 mV or there
is a CHG FET (CFETF) or DSG FET (DFETF) failure. The SAFE pin will remain asserted until the
Fuse Blow Timeout expired.
While the device is in PERMANENT FAIL mode, any new SafetyAlert(), SafetyStatus(), PFAlert(), and
PFStatus() flags that are set are added to the permanent fail log. Any new PFStatus() flags that occur
during PERMANENT FAIL mode can trigger the SAFE pin. In addition, new PFStatus() flags are recorded
in the Black Box Recorder 2ndand 3rdPF Status entries.
Chapter 4
SLUUBD3D–September 2015–Revised September 2018
Permanent Fail
4.2Permanent Failure Configuration
The following configuration registers allow the various permanent failure detection features to be enabled
or disabled. If disabled (default), the feature takes no action including setting flags in PFAlert() or
PFStatus().
RSVD (Bits 7–2): Reserved
DFW (Bit 1): Data flash write
1 = Enabled
0 = Disabled (default)
IFC (Bit 0): Instruction flash checksum
1 = Enabled
0 = Disabled (default)
The bq78350-R1 has a minimum voltage required to attempt to blow a fuse through SAFE activation. This
is a pack-based value of 3500 mV. Voltage scaling (VSCALE) should be enabled if the supported battery
pack voltage is higher than 32767 mV. This value is automatically internally adjusted for any VSCALE
setting. FET failures bypass this requirement to activate SAFE.
4.4Safety Cell Undervoltage Permanent Fail
The bq78350-R1 uses the UV Protection function of the companion AFE for this feature and can be
configured to permanently disable the battery in the case of severe undervoltage in any of the cells. This
feature cannot be disabled.
The voltage threshold setting is set in AFE SUV:Threshold, which the device will map to the available
settings in the companion AFE with the maximum setting of 3131 mV and the minimum of 1568 mV.
The delay timing configuration for this feature is combined in the same register with the delay time of the
Safety Overvoltage feature.
This register is representative of the bq769x0 PROTECT 3 register.
Safety Cell Overvoltage Permanent Fail
ClassSubclassNameTypeMinMaxDefaultUnit
Permanent FailAFE SUVThresholdI2158031001750mV
Permanent FailAFE SOV/AFE SUVSOV and SUV DelayU102552s
ClassSubclassNameFormat
Settings
76543210
SUV_D1SUV_D0SOV_D1SOV_D0RSVDRSVDRSVDRSVD
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
AFE SOV/AFE
SUV
SOV and SUV
Delay
Hex10x000xF00x50—
Size in
Bytes
MinMaxDefaultUnit
SUV_D1:0 (Bits 7–6): Safety Undervoltage Delay Time
00 = 1 s
01 = 4 s
10 = 8 s
11 = 16 s
SOV_D1:0 (Bits 5–4): Safety Overvoltage Delay Time
00 = 1 s
01 = 2 s
10 = 4 s
11 = 8 s
RSVD: (Bits 3–0): Reserved
4.5Safety Cell Overvoltage Permanent Fail
The bq78350-R1 uses the OV Protection function of the companion AFE for this feature and can be
configured to permanently disable the battery in the case of severe overvoltage in any of the cells. This
feature cannot be disabled.
The voltage threshold setting is set in AFE SOV:Threshold, which the device will map to the available
settings in the companion AFE with the maximum setting of 4703 mV and the minimum of 3140 mV.
The delay timing configuration for this feature is combined in the same register with the delay time of the
Safety Undervoltage feature.
StatusConditionAction
NormalAFEStatus() [OV] = 0PFStatus()[SOV] = 0
TripAFEStatus() [OV] = 1
ClassSubclassNameTypeMinMaxDefaultUnit
Permanent FailAFE SOVThresholdI2315047004350mV
4.6Safety Overcurrent in Charge Permanent Fail
The device can permanently disable the battery in the case of a severe OVERCURRENT IN CHARGE
state.
The device can permanently disable the battery pack in case of severe overtemperature of the cells
detected using the external TS1...3 temperature sensor(s), which are configured to report Temperature().
The Temperature() measurement configuration is controlled by setting the corresponding flag in DAConfiguration.
StatusConditionAction
NormalCell Temperature in DAStatus2() < SOT:ThresholdPFAlert()[SOT] = 0
AlertCell Temperature in DAStatus2() ≥ SOT:Threshold
Cell Temperature in DAStatus2() continuous ≥SOT:Threshold for SOT:Delay duration
4.9Safety Overtemperature FET (SOTF) Permanent Fail
The device can disable the battery pack permanently in case of severe overtemperature on the power
FET. The temperature sensor(s) can be configured to report as FET Temperature in DAStatus2() by
setting the corresponding flags in Temperature Mode and DA Configuration[FTEMP].
DSG FET off AND Current() continuously ≤ DFET:OFFThreshold for DFET:OFF Delay duration
4.13 External Override Permanent Fail
The device can detect an external override signal sent to the companion bq769x0 AFE, which can cause
permanent failure of the battery. This can be used to indicate to the bq78350-R1 that an external circuit,
such as an independent voltage protection circuit, has disabled the battery permanently.
The device compares the AFE hardware register periodically with a RAM backup and corrects any errors.
If any errors are found during the check, the device increments the AFE register fail counter. If the
comparison fails too many times, the device disables the pack permanently.
The device monitors the internal communication to the AFE hardware and increments the AFE read/write
fail counter on any communication error. If the read or write fails exceed a limit within a configurable
timeframe, the device disables the pack permanently.
The companion bq769x0 AFE includes an internal self-check, and if this check fails, then the XREADY bit
is set. Each time the bq78350-R1 reads the AFE it checks this bit, and if it is set, then increments an
internal counter. If this counter reaches a configurable limit, then the device disables the pack
permanently.
AFE Communication Permanent Fail
PFAlert()[AFEC] = 1
Decrement AFE read/write fail counter by one
after each AFEC:Delay Period
The device can permanently disable the battery if it detects a difference between the stored IF checksum
and the calculated IF checksum only following a device reset.
StatusConditionAction
NormalStored and calculated IF checksum match—
TripStored and calculated IF checksum after reset does not match.
PFAlert()[AFE_XRDY] = 1
Decrement AFE_XRDY counter by one after each AFEXREADY:Delay period
4.19 Open Thermistor Permanent Fail (TS1, TS2, TS3)
The device can permanently disable the battery if it detects an open thermistor on TS1, TS2, or TS3. This
feature is only available when the bq78350-R1 is used in conjunction with the bq76930 or the bq76940.
StatusConditionAction
NormalTS1 Temperature > Open Thermistor:ThresholdPFAlert()[TS1] = 0
NormalTS2 Temperature > Open Thermistor:ThresholdPFAlert()[TS2] = 0
NormalTS3 Temperature > Open Thermistor:ThresholdPFAlert()[TS3] = 0
AlertTS1 Temperature ≤ Open Thermistor:ThresholdPFAlert()[TS1] = 1
AlertTS2 Temperature ≤ Open Thermistor:ThresholdPFAlert()[TS2] = 1
AlertTS3 Temperature ≤ Open Thermistor:ThresholdPFAlert()[TS3] = 1
Trip
Trip
Trip
TS1 Temperature ≤ Open Thermistor:Threshold for OpenThermistor:Delay duration
TS2 Temperature ≤ Open Thermistor:Threshold for OpenThermistor:Delay duration
TS3 Temperature ≤ Open Thermistor:Threshold for OpenThermistor:Delay duration
The Black Box Recorder maintains the last three updates of SafetyStatus() in memory. When entering
PERMANENT FAIL mode, this information is written to data flash in addition to the first three updates of
PFStatus() after the PF event.
NOTE: This information is useful in failure analysis, and can provide a full recording of the events
and conditions leading up to the permanent failure.
If there were less than three safety events before PF, then some information will be left
blank.
4.21.1 Black Box Recorded Data
4.21.1.1 Safety Status
ClassSubclassNameTypeMinMaxDefault
Black BoxSafety Status1st Safety Status 0–7H10x000xFF0
Black BoxSafety Status1st Safety Status 8–15H10x000xFF0
Black BoxSafety Status1st Safety Status 16–23H10x000xFF0
Black BoxSafety Status1st Safety Status 24–31H10x000xFF0
Black BoxSafety Status1st Time to Next EventU102550
Black BoxSafety Status2nd Safety Status 0–7H10x000xFF0
Black BoxSafety Status2nd Safety Status 8–15H10x000xFF0
Black BoxSafety Status2nd Safety Status 16–23H10x000xFF0
Black BoxSafety Status2nd Safety Status 24–31H10x000xFF0
Black BoxSafety Status2nd Time to Next EventU102550
Black BoxSafety Status3rd Safety Status 0–7H10x000xFF0
Black BoxSafety Status3rd Safety Status 8–15H10x000xFF0
Black BoxSafety Status3rd Safety Status 16–23H10x000xFF0
Black BoxSafety Status3rd Safety Status 24–31H10x000xFF0
Black BoxSafety Status3rd Time to Next EventU102550
Black Box Recorder
4.21.1.2 PF Status
ClassSubclassNameTypeMinMaxDefault
Black BoxPF Status1st PF Status 0–7H20x00000xFFFF0
Black BoxPF Status1st PF Status 8–15H20x00000xFFFF0
Black BoxPF Status1st PF Status 16–23H20x00000xFFFF0
Black BoxPF Status1st PF Status 24–31H20x00000xFFFF0
Black BoxPF Status1st Time to Next EventU102550
Black BoxPF Status2nd PF Status 0–8H20x00000xFFFF0
SLUUBD3D–September 2015–Revised September 2018
Submit Documentation Feedback
Black BoxPF Status2nd PF Status 9–15H20x00000xFFFF0
Black BoxPF Status2nd PF Status 16–23H20x00000xFFFF0
Black BoxPF Status2nd PF Status 24–32H20x00000xFFFF0
Black BoxPF Status2nd Time to Next EventU102550
Black BoxPF Status3rd PF Status 0–8H20x00000xFFFF0
Black BoxPF Status3rd PF Status 9–15H20x00000xFFFF0
Black BoxPF Status3rd PF Status 16–23H20x00000xFFFF0
Black BoxPF Status3rd PF Status 24–32H20x00000xFFFF0
Black BoxPF Status3rd Time to Next EventU102550
The device can change the values of ChargingVoltage() and ChargingCurrent() based on Temperature(),
Cell Voltage1..15() and system fault conditions. The ChargingStatus() register shows the state of the
charging algorithm.
Chapter 5
SLUUBD3D–September 2015–Revised September 2018
Charge Algorithm
5.2Fast and Pre-Charging
SLUUBD3D–September 2015–Revised September 2018
Submit Documentation Feedback
The charging algorithm adjusts ChargingCurrent() and ChargingVoltage() to allow the appropriate charging
conditions to be read.
Current StateConditionAction
Temperature() > Precharge Temp+ Hysteresis
Temp
Fast Charging
Pre-Charging
AND
ALL CellVoltages1..15() > Pre-Charging:
Recovery Voltage
AND
+ Hysteresis Temp
OR
ANY CellVoltages1..15() ≤ Pre-Charging: Start
Voltage
OR
GaugingStatus() [EDV0] = 1
Depending on the FET Options[PCHG_EN] settings, the external precharge FET or CHG FET can be
used in PRE-CHARGE mode. Setting the Pre-Charging Current = 0 mA disables the precharge function
ChargingStatus()[FCHG] = 1
ChargingStatus()[PCHG] = 0
ChargingVoltage() = Fast Charging: Voltage
ChargingCurrent() = Fast Charging: Current
ChargingStatus()[FCHG] = 0
ChargingStatus()[PCHG] = 1
ChargingVoltage() = Fast Charging: Voltage
ChargingCurrent() = Pre-Charging: Current
by requesting 0 mA charging current from the charger.
The charge termination condition must be met to enable valid charge termination. The device has the
following actions at charge termination, based on the flags settings:
•If SBS Gauging Configuration[RSOCL] = 1, RelativeStateOfCharge() and RemainingCapacity() are
held at 99% until charge termination occurs. Only on entering charge termination is 100% displayed.
•If SBS Gauging Configuration[RSOCL] = 0, RelativeStateOfCharge() and RemainingCapacity() are
not held at 99% until charge termination occurs. Fractions of % greater than 99% are rounded up to
display 100%.
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StatusConditionAction
Charging
Valid Charge
Termination
ClassSubclassNameTypeMinMaxDefaultUnit
Charging AlgorithmsTermination Config
Charging AlgorithmsTermination ConfigCharge Term VoltageI203276775mV
GaugingStatus()[REST] = 0 AND
GaugingStatus()[DSG] = 0
All of the following conditions must occur for two
consecutive 40-s periods:
Charging (that is, BatteryStatus[DSG] = 0) AND
AverageCurrent() < Charge Term Taper
Current ANDMax (CellVoltage1..15()) + Charge Term
Voltage ≥ ChargingVoltage()/number of cells in
series AND
The accumulated change in capacity > 0.25
mAh since current and voltage termination
conditions where first detected.
5.4Charge and Discharge Alarms
The [TCA] and [FC] bits in BatteryStatus() can be set at charge termination as well as based on RSOC
when the device is in CHARGE state (that is, BatteryStatus[DSG] = 0). If more than one set and clear
conditions are selected, then the corresponding flag will be set whenever a valid set or clear condition is
met. The same functionality is applied to the [TDA] and [FD] bits in BatteryStatus().
Per the Smart Battery Data Specification v1.1, TDA is only active while discharging and TCA is only active
while charging but the bq78350-R1 will only follow this particular requirement if SOC Flag Config[SBS_COMP] = 1. By default, the TCA and TDA flags will not change based on current magnitude or
direction.
Charge Term Taper
Current
Charge Algorithm active
ChargingStatus()[VCT] = 1
ChargingVoltage() = Charging Algorithm
ChargingCurrent() = Charging Algorithm
BatteryStatus()[FC] = 1 and GaugingStatus()[FC] = 1 if
SOCFlagConfig A[FCSETVCT] = 1
BatteryStatus()[TCA] = 1 and GaugingStatus()[TCA] = 1 if
The table below summarizes the various options to set and clear the [TC] and [FC] flags in
GaugingStatus().
Charge and Discharge Alarms
NOTE: In BatteryStatus(), the [TCA] bit, as well as the [TDA] and [FD] bits, are also set and cleared
based on safety and permanent fail protections. In GaugingStatus(), however, these bits do
not react on the safety protections.
GaugingStatus[TC][TD][FC][FD] are the status flags based on the gauging conditions only.
These flags are set and cleared based on SOC Flag Config.
The GaugingStatus[TC][TD] flags are not the same as the BatteryStatus[TCA][TDA] flags.
The [TCA] and [TDA] flags can be set or cleared by the gauging event or by the safety or PF
events. These flags also clear if charging current is not present. The [TC] and [TD] flags,
however, only set and clear by a gauging event.
GaugingStatus[FC][FD] has the same behavior as BatteryStatus[FC][FD].
FlagSet CriteriaSet ConditionEnable
RelativeStateOfCharge() > = TC: Set %
RSOC Threshold
When ChargingStatus[VCT] = 1SOC Flag Config [TCSetVCT] = 1
RelativeStateOfCharge() > = FC: Set %
RSOC Threshold
When ChargingStatus[VCT] = 1SOC Flag Config [FCSetVCT] = 1
SOC Flag Config [TCSetRSOC] = 1
SOC Flag Config [FCSetRSOC] = 1
[TC]
[FC]
RSOC
Valid Charge Termination
(enable by default)
RSOC
Valid Charge Termination
(enable by default)
FlagClear CriteriaClear ConditionEnable
[TC]RSOC (enable by default)
[FC]RSOC (enable by default)
RelativeStateOfCharge() ≤ TC: Clear %
RSOC Threshold
RelativeStateOfCharge() ≤ FC: Clear %
RSOC Threshold
SOC Flag Config [TCClearRSOC] = 1
SOC Flag Config [FCClearRSOC] = 1
The tables below summarizes the various options to set and clear the [TD] and [FD] flags in both
BatteryStatus() and GaugingStatus().
FlagSet CriteriaSet ConditionEnable
[TD]RSOC (enable by default)
[FD]RSOC (enable by default)
FlagClear CriteriaClear ConditionEnable
[TD]RSOC (enable by default)
[FD]RSOC (enable by default)
RelativeStateOfCharge() < = TD: Set %
RSOC Threshold
RelativeStateOfCharge() < = FD: Set %
RSOC Threshold
RelativeStateOfCharge() ≥ TD: Clear %
RSOC Threshold
RelativeStateOfCharge() ≥ FD: Clear %
RSOC Threshold
SOC Flag Config [TDSetRSOC] = 1
SOC Flag Config [FDSetRSOC] = 1
SOC Flag Config [TDClearRSOC] = 1
SOC Flag Config [FDClearRSOC] = 1
The SOC configuration is stored in the following data flash.
The device can disable charging if certain safety conditions are detected setting the
OperationStatus()[XCHG] = 1.
StatusConditionAction
Normal
Trip
ALL PFStatus() = 0 AND
SafetyStatus()[COV] = 0 AND
SafetyStatus()[OTC] = 0 AND
SafetyStatus()[UTC] = 0 AND
SafetyStatus()[OCC] = 0 AND
SafetyStatus()[CTO] = 0 AND
SafetyStatus()[PTO] = 0 AND
GaugingStatus()[TCA] = 0 if FET
Options[CHGFET] = 1
ANY PFStatus() = 1 OR
SafetyStatus()[COV] = 1 OR
SafetyStatus()[OTC] = 1 OR
SafetyStatus()[UTC] = 1 OR
SafetyStatus()[OCC] = 1 OR
SafetyStatus()[CTO] = 1 OR
SafetyStatus()[PTO] = 1 OR
GaugingStatus()[TCA] = 1 if FET
The device can inhibit the start of charging at high and low temperatures to prevent damage of the cells.
This feature prevents the start of charging when the temperature is at the inhibit range; therefore, if the
device is already in the charging state when the temperature reaches the inhibit range, a FET action will
not take place even if FET Options[CHGIN] = 1.
The device can suspend charging at high and low temperatures to prevent damage of the cells. Care
should be taken to ensure Charge Inhibit and Charge Suspend features are configured correctly as upon
Charge Suspend detection [CHGSU=1], then Charge Inhibit detection criteria will have to be passed prior
to restarting charge.
StatusConditionAction
BatteryStatus()[DSG] = 0
Normal
Trip
ClassSubclassNameTypeMinMaxDefaultUnit
Charge AlgorithmTemperature RangesCharge Suspend High TempI1–12712855°C
Charge Inhibit/Suspend Low Temp <
Temperature() < Charge Suspend High
Temp
BatteryStatus()[DSG] = 0
Charge Inhibit/Suspend Low Temp >Temperature() > Charge Suspend High
Temp
The bq78350-R1 has the capability to detect the presence of a system and/or a charger through the state
of the PRES pin. This can be used to disable the battery output when the bq78350-R1 detects the battery
has been removed from the system or charger.
6.2System Present Detection and Action
The PRES pin is polled every 250 ms and if it is detected High for four consecutive 250-ms samples, then
the CHG, DSG, and PCHG FETs are turned off. If PRES is detected Low, then the FETs are allowed to
be turned on depending on other safety and charging related algorithms. If this feature is not required,
then the PRES pin should be tied to VSS.
System Present Detection can be selected as an action to clear some types of protection faults. See
Cell balancing in bq78350-R1 is accomplished by connecting an external parallel bypass load to each cell
of the associated AFE, and enabling the bypass load depending on each cell's charge state. The bypass
load is typically formed by a P-CH MOSFET and a resistor connected in series across each battery cell.
The filter resistors that connect the cell tabs to VC1~VC15 pins of the associated AFE are required to be
1 kΩ.
Using this circuit, the bq78350-R1 balances the cells during charge by enabling the bypass around those
cells above the threshold set in Cell Balance Threshold if the maximum difference in cell voltages
exceeds the value programmed in Cell Balance Min. During cell balancing, the bq78350-R1 measures
the cell voltages at an interval set in Cell Balance Interval.
The cell(s) to be balanced are prioritized by highest cell voltage but the bq78350-R1 will not try to balance
adjacent cells. If adjacent cells need to be balanced, the bq78350-R1 will alternate between the highest
and next-highest adjacent cells until they are balanced.
On the basis of the cell voltages, the bq78350-R1 either selects the appropriate cell to discharge or
adjusts the cell balance threshold up by the value programmed in Cell Balance Window when all cells
exceed the cell balance threshold or the highest cell exceeds the cell balance threshold by the cell
balance window.
More in-depth details and data on this cell balancing algorithm can be found in:
http://www.ti.com/lit/slva155.
Chapter 7
SLUUBD3D–September 2015–Revised September 2018
Cell Balancing
54
Cell balancing only occurs when charging current is detected, and on non-adjacent cells at the same time.
The cell balance threshold is reset to the value in Cell Balance Threshold at the start of every charge
cycle. The threshold is only adjusted once during any balance interval.
The configuration data flash is stored in Charge Algorithm: Cell Balancing Config.
To enhance battery life, the bq78350-R1 supports several power modes to minimize power consumption
during operation.
8.2NORMAL Mode
In NORMAL mode, the device takes voltage, current, and temperature readings every 250 ms, performs
protection and gauging calculations, updates SBS data, and makes status readings at 1-s intervals.
Between these periods of activity, the device is in a reduced power state.
8.3SLEEP Mode
8.3.1 Device Sleep
When the sleep conditions are met and the device is in REST (RELAX) mode, the device goes into
SLEEP mode with periodic wake-ups to reduce power consumption. The device returns to NORMAL mode
if any exit sleep condition is met.
Chapter 8
SLUUBD3D–September 2015–Revised September 2018
Power Modes
StatusConditionAction
OR
(1)
AND
(1)
AND
(2)
OR
(1)
OR
Turn off CHG FET and PCHG FET if FETOptions[SLEEPCHG] = 0
Device goes to sleep.
Device wakes up every Sleep:Voltage Time period to
measure voltage and temperature.
Device wakes up every Sleep:Current Time period to
measure current.
Return to NORMAL mode
SMBus low for BusTimeoutDA Config[SLEEP] = 1
|Current()| ≤ Sleep Current AND
Voltage Time > 0 AND
Activate
Exit
(1)
DA Config[SLEEP] and SMBus low are not checked if the ManufacturerAccess() SLEEP mode command is used to enter
SLEEP mode.
(2)
A wake on an SMBus command is only possible when the gas gauge is put to sleep using the ManufacturerAccess() SLEEP
mode command. Otherwise, the gas gauge wakes on an SMBus connection (clock or data high).
OperationStatus()[SDM] = 0 AND
No PFAlert() bits set AND
No PFStatus() bits set AND
No SafetyAlert() bits set AND
No [AOLD], [AOLDL], [ASCD], [ASCDL] set in
SafetyStatus()
SMBus connected
SMBus command received
DA Config[SLEEP] = 1
|Current()| > Sleep Current OR
Voltage Time = 0 OR
OperationStatus()[SDM] = 1 OR
PFAlert() bits set OR
PFStatus() bits set OR
SafetyAlert() bits set OR
[AOLD], [AOLDL], [ASCD], [ASCDL] set in
SafetyStatus()
(1)
The configuration options for SLEEP are in the following data flash.
ClassSubclassNameTypeMinMaxDefaultUnitDescription
PowerSleepSleep CurrentI203276710mA|Current()| threshold to enter SLEEP mode
PowerSleepBus TimeoutU102555sSMBus low time to enter SLEEP mode
PowerSleepVoltage TimeU102555sVoltage sampling period in SLEEP mode
PowerSleepCurrent TimeU1025520sCurrent sampling period in SLEEP mode
The Sleep MAC command can override the requirement for bus low to enter SLEEP. In this case, the
clock and data high condition are ignored for SLEEP to exit, though SLEEP will also exit if there is any
further SMBus communication. The device can be sent to SLEEP with ManufacturerAccess() if specific
sleep entry conditions are met.
8.3.3 IN SYSTEM SLEEP Mode
The bq78350-R1 provides an option to enter SLEEP mode when the battery is in the system. When the
DA Configuration [IN_SYSTEM_SLEEP] = 1, the device will enter SLEEP mode when
OperationStatus()[PRES] = 1 and all other sleep conditions are also met.
In the IN SYSTEM SLEEP mode, it is possible to read the data if [IN_SYSTEM_SLEEP] = 1 and Bus
Timeout = 0. This setting allows the gauge to enter SLEEP mode with active communication in progress.
8.4SHUTDOWN Mode
8.4.1 Voltage Based Shutdown
To minimize power consumption and avoid draining the battery, the device can be configured to shutdown
at a programmable voltage threshold. In SHUTDOWN mode, the device turns off the FETs after FET Off
Time, and then shuts down to minimize power consumption after Delay time. Both FET Off Time and
Delay time are referenced to the time the gauge receives the command. Thus, the Delay time must be setlonger than the FET Off Time. When the device is in PERMANENT FAILURE mode, the parameters PF
Shutdown Voltage and PF Shutdown Time configure the voltage-based shutdown.
SLEEP Mode
StatusConditionAction
Enable
Trip
ShutdownProtection Configuration:VAUXR = 0Send device into SHUTDOWN mode
Shutdown
ExitVoltage at TS1 pin > V
Min(Cell Voltage in DAStatus1()) < Shutdown
Voltage
Min(Cell Voltage in CellVoltage1..15())
continuous < Shutdown Voltage for
NOTE: The device goes through a full reset when exiting from SHUTDOWN mode, which means the
device will re-initialize. The RAM data is re-loaded with a data flash setting. This is different
than a partial reset, which could occur during a short power glitch. The device will check for
the RAM integrity at partial reset, and if the data checksum is correct, RAM data will not be
re-initialized.
The configuration options for SHUTDOWN are in the following data flash.
The device can be configured to shut down after staying in SLEEP mode without communication for a
preset time interval specified in Auto Ship Time. Setting the PowerConfig[AUTO_SHIP_EN] = 1 enables
this feature. If Auto Ship Time is set to 0, this feature is disabled. Any communication to the device will
restart the timer. When the timer reaches the Auto Ship Time, the time based shutdown effectively
triggers the MAC shutdown command to start the shutdown sequence. The device returns to NORMAL
mode when voltage at PACK pin > V
RSVD (Bits 7–1): Reserved. Do not use.
AUTO_SHIP_EN (Bit 0): Automatically shut down for shipment
1 = Enable auto shutdown after the device is in SLEEP mode without communication for a set
period of time.
0 = Disable auto shutdown feature
STARTUP
.
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AUTO_SHIP
_EN
8.4.3 ManufacturerAccess() MAC Shutdown
In SHUTDOWN mode, the device turns off the FETs after FET Off Time, and then shuts down to
minimize power consumption after Delay time. Both FET Off Time and Delay time are referenced to the
time the gauge receives the command. Thus, the Delay time must be set longer than the FET Off Time.
The device returns to NORMAL mode when voltage at TS1 pin > V
mode with the ManufacturerAccess() Shutdown command if Current() = 0 and OperationStatus()[DSG] = 1.
8.5Power Mode Indication (PWRM)
The PWRM pin can be used to indicate the power mode of the bq78350-R1. The PWRM has the following
conditions:
•PWRM is High-Z (externally pulled high):
– bq78350-R1 is in NORMAL mode.
– bq78350-R1 is in SLEEP mode AND SBS Gauging Configuration[PWRMSleep] = 1.
– Once in SHUTDOWN mode, the device has no control over PWRM.
•PWRM is Low:
– bq78350-R1 is in SLEEP mode AND SBS Gauging Configuration[PWRMSleep] = 0.
– bq78350-R1 prepares to enter SHUTDOWN mode.
This pin can be used to control other external circuit elements based on the power mode state of the
bq78350-R1.
The bq78350-R1 features the Compensated End-of-Discharge Voltage (CEDV) gauging algorithm,
capable of gauging a Li-Ion or LiFePO4 battery. The data from the gas gauge is in either mAh or mWh
units based on the 0 or 1 setting of [CapM] in BatteryMode(), and can be scaled per the [IPScale] setting
in SpecInfo().
The operational overview in Figure 9-1 illustrates the gas gauge operation of the bq78350-R1.
Chapter 9
SLUUBD3D–September 2015–Revised September 2018
CEDV Gas Gauging
The bq78350-R1 accumulates the measured quantities of charge and discharge and estimates selfdischarge of the battery. The bq78350-R1 compensates the charge current measurement for temperature
and state-of-charge of the battery. The bq78350-R1 also adjusts the self-discharge estimation based on
temperature.
9.1.1 Main Fuel Gauge Registers
The main charge counter, RemainingCapacity() (RC), represents the available capacity or energy in the
battery at any given time. The bq78350-R1 adjusts RC for charge, self-discharge, and other compensation
factors. The information in the RC register is accessible through the SMBus.
The bq78350-R1 computes RC in units based of the settings of two configuration bits, CapM and
SpecificationInfo(). RC counts up during charge to a maximum value of FCC and down during discharge
and self-discharge to a minimum of 0. In addition to charge and self-discharge compensation, the
bq78350-R1 calibrates RC at three low-battery-voltage thresholds, EDV2, EDV1, and EDV0. This provides
a voltage-based calibration to the RC counter and is based on the lowest voltage measured at the BAT
pin.
The Design Capacity (DC) register is the user-specified battery full capacity. It is calculated from DesignCapacity and is represented in units set by CapM. It also represents the full-battery reference for the
absolute display mode and AbsoluteStateOfCharge(). In programming Design Capacity, the value should
not include the value programmed in Reserve Capacity.
The FullChargeCapacity() (FCC) register represents the initial or last measured full discharge of the
battery. It is used as the battery full-charge reference for relative capacity indication. The bq78350-R1
updates FCC after the battery undergoes a qualified discharge from nearly full to a low battery level. FCC
is accessible through the SMBus.
The bq78350-R1 computes FCC in units based of the settings of two configuration bits, CapM and
IPScale. On initialization, the bq78350-R1 sets FCC to the value stored in Full Charge Capacity. During
subsequent discharges, the bq78350-R1 updates FCC with the last measured discharge capacity of the
battery. The last measured discharge of the battery is based on the value in the DCR register after a
qualified discharge occurs. Once updated, the bq78350-R1 writes the new FCC value to data flash in
mAh, scaled per the setting of IPScale, to Full Charge Capacity.
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NOTE:Care should be taken to ensure that the correct scaling is used to ensure that the Full
Charge Capacity does not exceed 65535 of the units configured by the scaling. If Full
Charge Capacity is calculated to be above 65535, then it will roll over creating potentially
uncorrectable error in the gauging algorithm.
9.1.2 Fuel Gauge Operating Modes
During a gauging operation, different features and functions occur based on whether the battery is
discharging, charging, or in a rest state.
Entry and exit of each mode is controlled by data flash parameters in the subclass Fuel Gauging: CurrentThresholds section.
•In RELAX mode or DISCHARGE mode, the [DSG] flag in GaugingStatus() is set.
•CHARGE mode is entered when Current goes above Chg Current Threshold.
•CHARGE mode is exited and RELAX mode is entered when Current goes below Quit Current for a
period of Chg Relax Time.
•DISCHARGE mode is entered when Current goes below (–)Dsg Current Threshold.
•DISCHARGE mode is exited and RELAX mode is entered when Current goes above (–)Quit Current
threshold for a period of Dsg Relax Time.
FCC also represents the full battery reference for the relative display mode and RelativeStateOfCharge()
calculations.
The DischargeCountRegister() (DCR) register that tracks discharge of the battery. The bq78350-R1 uses
the DCR register to update the FCC register if the battery undergoes a qualified discharge from nearly full
to a low battery level. In this way, the bq78350-R1 learns the true discharge capacity of the battery under
system-use conditions.
The DCR counts up during discharge, independent of RC. DCR counts discharge activity, battery load
estimation, and self-discharge increments. The bq78350-R1 initializes DCR at the beginning of a
discharge to FCC – RC when RC is within the programmed value in Near Full. The DCR initial value of
FCC – RC is reduced by FCC/128 if SC = 1, and is not reduced if SC = 0. The DCR stops counting when
the battery voltage reaches the EDV2 threshold on discharge.
9.1.4 Initial Battery Capacity at Device Reset
The bq78350-R1 estimates the initial capacity of a battery pack at device reset, which is the case when
battery cell(s) are first attached to the application circuit. The initial FCC is a direct copy of Full ChargeCapacity. The initial RC and RSOC are estimated using the open-circuit voltage (OCV) characteristics of
the programmed Li-Ion chemistry (default ID1210), DOD at EDV2, and Learned Full Charge Capacity.
When assessing the RC vs. OCV correlation, the bq78350-R1 uses the applicable CellVoltage1..15() data
even if ExtAveCellVoltage() data is available. Upon the update of RC and RSOC based on the OCV data,
the BatteryMode() [CF] flag will be cleared. This gives a reasonably accurate RSOC; however, battery
capacity learning is required in order to determine the most accurate FCC, RC, and RSOC.
The determined value of remaining capacity can be further scaled, if needed, through the value of
RemCap Init Percent. Upon a reset, the final value of RemainingCapacity() is initialized from the
RemCap Init Percent value of the initial OCV correlated value. This value should be programmed to
match the scaling configured by SpecificationInfo.
www.ti.com
ClassSubclassNameFormat
Fuel
Gauging
CEDV Cfg
RemCap Init
Percent
During battery capacity learning, Full Charge Capacity and DOD at EDV2 will be learned and updated.
Full Charge Capacity should be initialized to the Design Capacity. DOD at EDV2 should be initialized to
(1 – (Battery Low % / 100)) × 16384.
ClassSubclassNameFormat
Fuel
Gauging
State
DOD at
EDV2
9.1.5 Capacity Learning (FCC Update)
The bq78350-R1 updates FCC with an amount based on the value in DCR if a qualified discharge occurs.
The new value for FCC equals the DCR value plus the value of nearly full and low battery levels, as
shown in the following equation:
FCC (new) = DCR (final) = DCR (initial) + Measured Discharge to EDV2 + (FCC × (Battery Low % / 100))
The new value of FCC can be limited to not go above the Design Capacity value if FCC_LIMIT in CEDV
Gauging Configuration is set.
NOTE: Learned Full Charge Capacity limits an update to a minimum of 100.
Battery Low % should be set to match a capacity value that corresponds to the first or highest voltage
point, EDV2. It should be chosen where the capacity sensitivity to voltage is easily detectable. It is a nonmeasured portion of the overall Learned Full Charge Capacity. If the target Battery Low % is changed
in the design, ensure that the initial value of DOD at EDV2 is also adjusted accordingly.
9.1.6 Qualified Discharge
A qualified discharge occurs if the battery discharges from RC ≥ FCC – Near Full to the EDV2 voltage
threshold with the following conditions:
•No valid charge activity occurs during the discharge period. A valid charge is defined as a charge of 10
mAh into the battery.
•No more than 256 mAh of self-discharge or battery load estimation occurs during the discharge period.
•The temperature does not drop below the low temperature thresholds programmed in Low Temp
during the discharge period.
•The battery voltage reaches the EDV2 threshold during the discharge period and the voltage is greater
than or equal to the EDV2 threshold minus 256 mV when the bq78350-R1 detected EDV2.
– When CEDV Gauging Configuration [VFLT_EN] is set, a filter is added to the EDV detection that
is set by CEDV Min Delta V to improve false triggering under pulsed load activity. If the latest
compensated EDV2 voltage changes by more than CEDV Min Delta V from the previously
calculated value, then the previous one is not updated.
•–Current() remains < Overload Current when EDV2 is reached.
•No overload condition exists when EDV2 threshold is reached, or if RC has dropped to Battery Low %
× FCC.
Battery Low%Unsigned
Learned Full
Charge
Capacity
Integer
Integer20327674400mAh
Size in
Bytes
20655357000.01%
MinMaxDefaultUnit
ClassSubclassNameFormat
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
CEDV CfgNear FullInteger2065535200
CEDV Cfg
CEDV Cfg
Learning
Low Temp
Min Delta V
Filter
Integer2–1002551190.1°C
Integer203276710mV
Size in
Bytes
MinMaxDefaultUnit
mAh or 10
mWh
The bq78350-R1 sets [VDQ] = 1 in GaugingStatus() when a qualified discharge begins. The bq78350-R1
sets [VDQ] = 0 if any disqualifying condition occurs. One complication may arise regarding the state of
[VDQ] if [CSYNC] is set in CEDV Gauging Configuration. When [CSYNC] is enabled, RC is written to
equal FCC on valid primary charge termination. This capacity synchronization is done even if the condition
RC ≥ FCC – Near Full is NOT satisfied at charge termination.
FCC cannot be reduced by more than FCC Learn Down or increased by more than FCC Learn Up during
any single update cycle. The bq78350-R1 saves the new FCC value to the data flash within 4 s of being
updated.
9.1.7 End-of-Discharge Thresholds and Capacity Correction
The bq78350-R1 monitors the battery for three low-voltage thresholds, EDV0, EDV1, and EDV2. The
bq78350-R1 uses the lowest, single-cell value from individual cell voltage measurements for EDV
threshold comparison when CEDV Gauging Configuration [EDV_EXT_CELL] = 0. However, if this bit =
1, then the ExternalCellVoltage() is used.
With either Compensated or Fixed EDV configurations, the configured voltage to be used must be equal to
or below the appropriate voltage for the corresponding EDV2,1,0 Hold Time to ensure correct detection
under all load types. EDV1 Detection and its associated hold time do not begin until EDV2 has been
detected and the EDV2 flag is set. Similarly, EDV0 detection does not begin before the EDV1 flag is set.
www.ti.com
ClassSubclassNameFormat
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
CEDV CfgFixed EDV0Integer20327673031mV
CEDV CfgFixed EDV1Integer20327673385mV
CEDV CfgFixed EDV2Integer20327673501mV
CEDV Cfg
CEDV Cfg
CEDV Cfg
EDV0 Hold
Time
EDV1 Hold
Time
EDV2 Hold
Time
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Size in
Bytes
112551s
112551s
112551s
MinMaxDefaultUnit
If the [EDV_CMP] bit in CEDV Gauging Configuration is set, automatic EDV compensation is enabled
and the bq78350-R1 computes the EDV0, EDV1, and EDV2 thresholds based on values stored in CEDV
Cfg subclass of data flash and the battery's current discharge rate and temperature. However, if
[FIXED_EDV0] bit in CEDV Gauging Configuration is set, then even if [EDV_CMP] = 1, then EDV0 is a
fixed voltage value and is not compensated.
ClassSubclassNameFormat
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
Fuel
Gauging
CEDV CfgEMF
CEDV Cfg
CEDV Cfg
CEDV Cfg
CEDV Cfg
CEDV Cfg
CEDV Cfg
EDV C0
Factor
EDV R0
Factor
EDV T0
Rate Factor
EDV R1
Rate Factor
EDV TC
Factor
EDV a0 Age
Factor
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Size in
Bytes
20655353743mV
2065535149—
2065535867—
20655354030—
2065535316—
102559—
102550
MinMaxDefaultUnit
64
The bq78350-R1 disables EDV detection if the measured battery discharge current magnitude (–Current())
meets or exceeds the Overload Current threshold, which is scaled by IPSCALE. The bq78350-R1
resumes EDV threshold detection after C drops below the Overload Current threshold. Any EDV
threshold detected is reset after charge is applied and [VDQ] is then cleared after RC has increased by a
value of 10, which is scaled by IPSCALE.
The bq78350-R1 uses the EDV thresholds to apply voltage-based corrections to the RC register according
to the content in Table 9-1.
The bq78350-R1 performs EDV-based RC adjustments with Current() ≥ C/32. No EDVs are set if
Current() < C/32. The bq78350-R1 adjusts RC as it detects each threshold. If the voltage threshold is
reached before the corresponding capacity on discharge, the bq78350-R1 reduces RC to the appropriate
amount, as shown in Table 9-1.
If an RC % level is reached on discharge before the voltage reaches the corresponding threshold, then
RC is held at that % level until the threshold is reached. RC is only held if [VDQ] = 1, indicating a valid
learning cycle is in progress. If Battery Low % is set to 0, EDV1 and EDV0 corrections are disabled.
9.1.8 Reserve Capacity
The bq78350-R1 can provide an additional programmable quantity of capacity in "reserve"; that is, when
RC = 0, then there is still Reserve Capacity left. This value is required to be entered and scaled to match
the settings of IPSCALE and CapM settings.
The value of Reserve Capacity is subtracted from the learn capacity when determining the value of the
reported FCC. This means when RSOC = 0% (EDV0), then there is still some capacity left for critical
system actions. It is strongly recommended that when determining the value for Reserve Capacity that the
setting of Battery Low % is still considered to ensure the appropriate setting of the EDV2 voltage on the
discharge curve. For example: If Reserve Capacity ~1% of Design Capacity, then the typical value for
Battery Low % would be 6%.
Introduction
Table 9-1. State-of-Charge Based on Low Battery Voltage
ThresholdRelative State-of-Charge (RSOC)
EDV00%
EDV13%
EDV2Battery Low %
ClassSubclassNameFormat
Fuel
Gauging
CEDV Cfg
Reserve
Capacity
Integer20327670mAh
Size in
Bytes
9.1.9 EDV Discharge Rate and Temperature Compensation
If EDV compensation is enabled, CEDV = 1, the bq78350-R1 calculates battery voltage to determine
EDV0, EDV1, and EDV2 thresholds as a function of battery capacity, temperature, and discharge load.
The general equation for EDV0, EDV1, and EDV2 calculation is as follows:
EDV0,1,2 = n (EMF × FBL – |ILOAD| × R0 × FTZ)
•EMF is a no-load cell voltage higher than the highest cell EDV threshold computed. EMF is
programmed in mV in EMF.
•ILOAD is the current discharge load magnitude.
•n = the number of series cells. In the bq78350-R1 case n = 1.
•FBL is the factor that adjusts the EDV voltage for battery capacity and temperature to match the noload characteristics of the battery.
FBL = f (C0, C + C1, T)
•C (either 0%, 3%, or Battery Low % for EDV0, EDV1, and EDV2, respectively) and C0 are the
capacity related EDV adjustment factors. C0 is programmed in EDV C0 Factor. C1 is the desired
residual battery capacity remaining at EDV0 (RC = 0). The C1 factor is stored in EDV C1 Factor.
•T is the current temperature in °K.
•R0•FTZ represents the resistance of a cell as a function of temperature and capacity.
•R0 is the first order rate dependency factor stored in EDV R0 Factor (DF).
•T is the current temperature. C is the battery capacity relating to EDV0, EDV1, and EDV2.
•R1 adjusts the variation of impedance with battery capacity. R1 is programmed in EDV R1 Rate
•T0 adjusts the variation of impedance with battery temperature. T0 is programmed in EDV T0 Rate
•TC adjusts the variation of impedance for cold temperatures T < TC is programmed in EDV TC Factor.
•Typical values for the EDV compensation factors, based on overall pack voltages for a 3s2p Li-lon
The graphs below show the calculated EDV0, EDV1, and EDV2 thresholds versus capacity using the
typical compensation values for different temperatures and loads for a Li-Ion 18650 cell. The
compensation values vary widely for different cell types and manufacturers and must be matched exactly
to the unique characteristics for optimal performance.
Figure 9-3. (a) EDV Calculations vs Various Temperatures, (b) EDV Calculations vs Capacity for Various
Loads
9.1.10 EDV Age Factor
EDV Age factor allows the bq78350-R1 to correct the EDV detection algorithm to compensate for cell
aging. This parameter scales cell impedances as the cycle count increases. This factor is used to
accommodate for much higher impedances observed in larger capacity and/or aged cells.
For most Li-Ion and Li-Polymer applications, the default value of zero is sufficient. However, for Lithium
Iron Phosphate, a value of 18 is recommended.
The bq78350-R1 estimates the self-discharge of the battery to maintain an accurate measurement of the
battery capacity during periods of inactivity. The bq78350-R1 makes self-discharge adjustments to RC
every ¼ second when awake and periodically when in SLEEP mode. The period is determined by SleepCurrent Time.
The self-discharge estimation rate for 25°C is doubled for each 10 degrees above 25°C or halved for each
10 degrees below 25°C. The table below shows the relation of the self-discharge estimation at a given
temperature to the rate programmed for 25°C.
The nominal self-discharge rate, %PERDAY (% per day), is programmed in an 8-bit value Self-Discharge
Rate by the following relation:
Self-Discharge Rate = %PERDAY/ 0.01
Introduction
Temperature (°C)Self-Discharge Rate (Average)
Temp < 10¼ Y% per day
10 ≤ Temp < 20½ Y% per day
20 ≤ Temp < 301 Y% per day
30 ≤ Temp < 402 Y% per day
40 ≤ Temp < 504 Y% per day
50 ≤ Temp < 608 Y% per day
60 ≤ Temp < 7016 Y% per day
70 ≤ Temp32 Y% per day
ClassSubclassNameFormat
Fuel
Gauging
CEDV Cfg
Self
Discharge
Rate
Unsigned
Integer
9.1.12 Battery Electronic Load Compensation
The bq78350-R1 can be configured to compensate for a constant load (as from battery electronics)
present in the battery pack at all times. The bq78350-R1 applies the compensation continuously when the
charge or discharge is below the digital filter. The bq78350-R1 applies the compensation in addition to
self-discharge.
The compensation occurs at a rate determined by the value stored in Electronics Load. The
compensation range is 0 µA – 765 µA in steps of approximately 3 µA.
The amount of internal battery electronics load estimate in µA, BEL, is stored as follows: ElectronicsLoad = BEL/3.
ClassSubclassNameFormat
Fuel
Gauging
CEDV Cfg
Electronics
Load
Integer2025503 µA
9.2Gauging Configuration Options
The bq78350-R1 has a variety of configurable options that can be configured, enabled, or disabled
through the following data flash options.
Size in
Bytes
10%255%20%0.01/day
Size in
Bytes
MinMaxDefaultUnit
MinMaxDefaultUnit
ClassSubclassNameTypeMinMaxDefaultUnit
Gas GaugingDesignDesign Capacity mAhI20327674400mAh
Gas GaugingDesignDesign Capacity cWhI20327676336cWh
Gas GaugingDesignDesign VoltageI2050003600mV
FIXED_EDV0 (Bit 5): This bit determines whether the bq78350-R1 implements automatic EDV
compensation to calculate the EDV0 threshold based on rate, temperature, and capacity, or uses a fixed
voltage value. If EDV_CMP = 0, then this bit has no effect.
1 = EDV Compensation Not Used. For example: Fixed EDV gauge enabled
0 = EDV Compensation Used (default)
SC (Bit 4): This bit enables learning cycle optimization for a Smart Charger or independent charge.
1 = Learning cycle optimized for independent charger
0 = Learning cycle optimized for Smart Charger (default)
EDV_CMP (Bit 3): This bit enables EDV Compensation for EDV2, EDV1, and EDV0.
1 = Enabled
0 = Disabled (default)
EDV_EXT_CELL (Bit 2): External average cell voltage used for EDV detection
1 = External average cell voltage used as EDV detection reference
0 = Minimum individual cell voltage used as EDV detection reference (default)
CSYNC (Bit 1): Sync RemainingCapacity() with FullChargeCapacity() at valid charge termination
1 = Synchronized (default)
0 = Not synchronized
CCT (Bit 0): Cycle count threshold
1 = Use CC % of FullChargeCapacity()
0 = Use CC % of DesignCapacity (default)
The device has extensive capabilities for logging events over the life of the battery useful for analysis. The
Lifetime Data Collection is enabled by setting ManufacturingStatus[LF_EN] = 1. The data is collected in
RAM and only written to DF under the following conditions to avoid wear out of the data flash:
•Every 10 hours if RAM content is different from flash.
•In permanent fail, before data flash updates are disabled.
•Before scheduled shutdown
•Before low voltage shutdown
The lifetime data stops collecting under following conditions:
•After permanent fail
•Lifetime Data Collection is disabled by setting ManufacturingStatus[LF_EN] = 0.
Total firmware Runtime starts when lifetime data is enabled.
•Voltage
– Max/Min Cell Voltage Each Cell
– Max Delta Cell Voltage at any given time (that is, the max cell imbalance voltage)
•Current
– Max Charge/Discharge Current
– Max Average Discharge Current
– Max Average Discharge Power
•Safety Events that trigger the SafetyStatus() (The 12 most common are tracked.)
– Number of Safety Events
– Cycle Count at Last Safety Event(s)
•Charging Events
– Number of Valid Charge Terminations (That is, the number of times [VCT] is set.)
– Cycle Count at Last Charge Termination
•Gauging Events
– Cycle Count at Last FCC update
•Power Events
– Number of shutdowns
•Cell Balancing (This data is updated every two hours.)
– Cell Balancing Time each Cell
•Temperature
– Max/Min Cell Temp
– Delta Cell Temp (max delta cell temperature across the thermistors that are used to report cell
temperature)
•Time (This data is updated every 2 hours.)
– Total runtime
– Time spent different temperature ranges (See Charge Algorithm for ranges.)
The Lifetime Data commands 0x60 through 0x66 provide an array of historical data for diagnostic
analysis. The data is listed in byte order from LSB to MSB.
10.2.1 LifetimeDataBlock1() 0x0060
ClassSubclassNameTypeMinMaxDefaultUnitDescription
LifetimesVoltageMax Voltage Cell 1U20327670mVMaximum reported cell voltage 1
LifetimesVoltageMax Voltage Cell 2U20327670mVMaximum reported cell voltage 2
LifetimesVoltageMax Voltage Cell 3U20327670mVMaximum reported cell voltage 3
LifetimesVoltageMax Voltage Cell 4U20327670mVMaximum reported cell voltage 4
LifetimesVoltageMax Voltage Cell 5U20327670mVMaximum reported cell voltage 5
LifetimesVoltageMax Voltage Cell 6U20327670mVMaximum reported cell voltage 6
LifetimesVoltageMax Voltage Cell 7U20327670mVMaximum reported cell voltage 7
LifetimesVoltageMax Voltage Cell 8U20327670mVMaximum reported cell voltage 8
LifetimesVoltageMax Voltage Cell 9U20327670mVMaximum reported cell voltage 9
LifetimesVoltageMax Voltage Cell 10U20327670mVMaximum reported cell voltage 10
LifetimesVoltageMax Voltage Cell 11U20327670mVMaximum reported cell voltage 11
LifetimesVoltageMax Voltage Cell 12U20327670mVMaximum reported cell voltage 12
LifetimesVoltageMax Voltage Cell 13U20327670mVMaximum reported cell voltage 13
LifetimesVoltageMax Voltage Cell 14U20327670mVMaximum reported cell voltage 14
LifetimesVoltageMax Voltage Cell 15U20327670mVMaximum reported cell voltage 15
Lifetimes
10.2.2 LifetimeDataBlock2() 0x0061
ClassSubclassNameTypeMinMaxDefaultUnitDescription
LifetimesVoltageMin Voltage Cell 1U2032767255mVMinimum reported cell voltage 1
LifetimesVoltageMin Voltage Cell 2U20327670mVMinimum reported cell voltage 2
LifetimesVoltageMin Voltage Cell 3U20327670mVMinimum reported cell voltage 3
LifetimesVoltageMin Voltage Cell 4U20327670mVMinimum reported cell voltage 4
LifetimesVoltageMin Voltage Cell 5U20327670mVMinimum reported cell voltage 5
LifetimesVoltageMin Voltage Cell 6U20327670mVMinimum reported cell voltage 6
LifetimesVoltageMin Voltage Cell 7U20327670mVMinimum reported cell voltage 7
LifetimesVoltageMin Voltage Cell 8U20327670mVMinimum reported cell voltage 8
LifetimesVoltageMin Voltage Cell 9U20327670mVMinimum reported cell voltage 9
LifetimesVoltageMin Voltage Cell 10U20327670mVMinimum reported cell voltage 10
LifetimesVoltageMin Voltage Cell 11U20327670mVMinimum reported cell voltage 11
LifetimesVoltageMin Voltage Cell 12U20327670mVMinimum reported cell voltage 12
LifetimesVoltageMin Voltage Cell 13U20327670mVMinimum reported cell voltage 13
LifetimesVoltageMin Voltage Cell14U20327670mVMinimum reported cell voltage 14
LifetimesVoltageMin Voltage Cell 15U20327670mVMinimum reported cell voltage 15
10.2.3 LifetimeDataBlock3() 0x0062
ClassSubclassNameTypeMinMaxDefaultUnitDescription
LifetimesVoltageMax Delta Cell VoltageI20327670mV
LifetimesCurrentMax Chg CurrentI20327670mA
LifetimesCurrentMax Dsg CurrentI20327670mA
LifetimesCurrentMax Avg Dsg CurrentI20327670mA
Maximum reported delta between
cell voltages 1 to 15
Maximum reported Current() in
charge direction
Maximum reported Current() in
discharge direction
Maximum reported AverageCurrent()
in discharge direction
There are three levels of secured operation within the device. To switch between the levels, different
operations are needed with different keys. The three levels are SEALED (SE), UNSEALED (UN), and
FULL ACCESS (FA). The device also supports SHA-1 HMAC authentication with the host system.
11.2 SHA-1 Description
As of March 2012, the latest revision is FIPS 180–4. SHA-1, or secure hash algorithm, is used to compute
a condensed representation of a message or data also known as hash. For messages < 264, the SHA-1
algorithm produces a 160-bit output called a digest.
In a SHA-1 one-way hash function, there is no known mathematical method of computing the input given,
only the output. The specification of SHA-1, as defined by FIPS 180–4, states that the input consists of
512-bit blocks with a total input length less than 264 bits. Inputs that do not conform to integer multiples of
512-bit blocks are padded before any block is input to the hash function. The SHA-1 algorithm outputs the
160-bit digest.
The device generates a SHA-1 input block of 288 bits (total input = 160-bit message + 128-bit key). To
complete the 512-bit block size requirement of the SHA-1 function, the device pads the key and message
with a 1, followed by 159 0s, followed by the 64 bit value for 288 (000...00100100000), which conforms to
the pad requirements specified by FIPS 180–4.
Detailed information about the SHA-1 algorithm can be found here:
1. http://www.nist.gov/itl/
2. http://csrc.nist.gov/publications/fips
3. www.faqs.org/rfcs/rfc3174.html
Chapter 11
SLUUBD3D–September 2015–Revised September 2018
Device Security
11.3 HMAC Description
The SHA-1 engine calculates a modified HMAC value. Using a public message and a secret key, the
HMAC output is considered to be a secure fingerprint that authenticates the device used to generate the
HMAC.
To compute the HMAC: Let H designate the SHA-1 hash function, M designate the message transmitted
to the device, and KD designate the unique 128-bit Unseal/Full Access/Authentication key of the device.
HMAC(M) is defined as:
H[KD || H(KD || M)], where || symbolizes an append operation.
The message, M, is appended to the unseal/full access/authentication key, KD, and padded to become
the input to the SHA-1 hash. The output of this first calculation is then appended to the unseal/full
access/authentication key, KD, padded again, and cycled through the SHA-1 hash a second time. The
output is the HMAC digest value.
11.4 Authentication
1. Generate 160-bit message M using a random number generator that meets approved random number
generators described in FIPS PUB 140–2.
6. With no active ManufacturerInput() data waiting, write 160-bit message M to ManufacturerInput() in the
format 0xAABBCCDDEEFFGGHHIIJJKKLLMMNNOOPPQQRRSSTT, where AA is LSB.
7. Wait 250 ms, then read ManufacturerInput() for HMAC3.
8. Compare host HMAC2 with device HMAC3, and if it matches, both host and device have the same key
KD and the device is authenticated.
11.5 Security Modes
11.5.1 FULL ACCESS or UNSEALED to SEALED
The Seal Device command instructs the device to limit access to the SBS functions and data flash space
and sets the [SEC1][SEC0] flags. In SEALED mode, standard SBS functions have access per the Smart
Battery Data Specification. Extended SBS functions and data flash are not accessible. Once in SEALED
mode, the part can never permanently return to UNSEALED or FULL ACCESS modes although there is a
capability to temporarily switch from SEALED to UNSEALED and then to FULL ACCESS.
11.5.2 SEALED to UNSEALED
SEALED to UNSEALED instructs the device to temporarily extend access to the SBS and data flash
space and clears the [SEC1][SEC0] flags. In UNSEALED mode, all data, SBS, and DF have read/write
access. Unsealing is a two-step command performed by writing the first word of the unseal key to
ManufacturerAccess() (MAC), followed by the second word of the unseal key to ManufacturerAccess().
The unseal key can be read and changed via the MAC SecurityKey() command when in the FULL
ACCESS mode. To return to the SEALED mode, either a hardware reset is needed, or the MAC SealDevice() command is needed to transit from FULL ACCESS or UNSEALED to SEALED.
www.ti.com
11.5.3 UNSEALED to FULL ACCESS
UNSEALED to FULL ACCESS instructs the device to temporarily allow full access to all SBS commands
and data flash. The device is shipped from TI in this mode. The keys for UNSEALED to FULL ACCESS
can be read and changed via the MAC command SecurityKey() when in FULL ACCESS mode. Changing
from UNSEALED to FULL ACCESS is performed by using the ManufacturerAccess() command, by writing
the first word of the Full Access Key to ManufacturerAccess(), followed by the second word of the Full
Access Key to ManufacturerAccess(). In FULL ACCESS mode, the command to go to boot ROM can be
sent.
To improve the manufacture testing flow, the bq78350-R1 allows certain features to be toggled on or off
through ManufacturerAccess() commands: for example, the PRE-CHG FET(), CHG FET(), DSG FET(),
Lifetime Data Collection(), Calibration(), and so on. Enabling only the feature under test can simplify the
test flow in production by avoiding any feature interference. These toggling commands will only set the
RAM data, which means the conditions set by the these commands will be cleared if a reset or seal is
issued to the gauge. The ManufacturingStatus() keeps track of the status (enabled or disabled) of each
feature.
The data flash Mfg Status Init provides the option to enable or disable individual features for normal
operation. Upon a reset or a seal command, the ManufacturingStatus() will be re-loaded from data flash
ManufacturingStatus. This also means if an update is made to ManufacturingStatus() to enable or
disable a feature, the gauge will only take the new setting if a reset or seal command is sent.
12.1.1 Manufacturing Status Configuration
Chapter 12
SLUUBD3D–September 2015–Revised September 2018
Manufacture Production
ClassSubclassNameFormatSize in BytesMinMaxDefaultUnit
SettingsManufacturing
15141312111098
RSVDRSVDRSVDRSVDRSVDRSVDLED_ENSAFE_EN
76543210
BBR_ENPF_ENLF_ENFET_ENRSVDRSVDRSVDRSVD
Mfg Status
Init
Hex20x00000xFFFF0x00—
RSVD (Bits 15–10): Reserved. Do not use.
LED_EN (Bit 9): Enables DISP pin triggered activation of the display
1 = Enabled
0 = Disabled (default)
SAFE_EN (Bit 8): Voltage imbalance At Rest
1 = Enabled
0 = Disabled (default)
BBR_EN (Bit 7): Black Box Recorder
1 = Enabled
0 = Disabled (default)
PF_EN (Bit 6): Permanent Fail. The [DFW], [IFC], [SOV], and [SUV] permanent failure features are
always enabled regardless of the setting of this bit.
The bq78350-R1 device has integrated routines that support calibration of current, voltage, and
temperature readings, accessible after writing 0xF081 or 0xF082 to ManufacturerAccess() when the
ManufacturingStatus()[CAL] bit is ON. While the calibration is active, the factory calibrated ADC data is
available on ManufacturerData(). The device stops reporting calibration data on ManufacturerData() if any
other MAC commands are sent or the device is reset or sealed.
NOTE: The ManufacturingStatus()[CAL] bit must be turned OFF after calibration is completed. This
bit is cleared at reset or after sealing.
ManufacturerAccess()Description
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0x002DEnables/Disables ManufacturingStatus()[CAL]
0xF080Disables raw ADC data output on ManufacturerData()
0xF081Outputs factory calibrated ADC data of the first 14-series cell voltages on ManufacturerData()
0xF082
Outputs factory calibrated ADC data of Cell Voltage 15, external average voltage, VAUX
voltage, current, and temperatures on ManufacturerData()
For 0xF081, the ManufacturerData() output format is:
ZZYYaaAAbbBBccCCddDDeeEEffFFggGGhhHHiiIIjjJJkkKKllLLmmMMnnNNooOO, where:
ValueFormatDescription
ZZByte
YYByte
AAaa2's compAFE CELL Map
BBbb2's compCell Voltage 1
CCcc2's compCell Voltage 2
DDdd2's compCell Voltage 3
EEee2's compCell Voltage 4
FFff2's compCell Voltage 5
GGgg2's compCell Voltage 6
HHhh2's compCell Voltage 7
IIii2's compCell Voltage 8
JJjj2's compCell Voltage 9
KKkk2's compCell Voltage 10
LLll2's compCell Voltage 11
MMmm2's compCell Voltage 12
NNnn2's compCell Voltage 13
OOoo2's compCell Voltage 14
8-bit counter, increments when raw ADC values are refreshed
(every 250 ms)
For 0xF082, the ManufacturerData() output format is:
ZZYYaaAAbbBBccCCddDDeeEEffFFggGGhhHHiiIIjjJJkkKK, where:
ValueFormatDescription
ZZByte
YYByte
AAaa2's compAFE CELL Map
BBbb2's compCell Voltage 15
CCcc—Reserved
DDdd2's compExt Ave Cell Voltage
EEeeFFff2's compVAUX Voltage
GGgg2's compCurrent Coulomb Counter
HHhh2's compTS1 Temperature
IIii2's compTS2 Temperature
JJjj2's compTS3 Temperature
KKkk2's compInternal Gauge Temperature
12.2.1 Cell Voltage Calibration
1. Apply known voltages in mV to the cell voltage inputs. See the companion AFE data manual, bq769x0
3-Series to 15-Series Cell Battery Monitor Family for Li-Ion and Phosphate Applications (SLUSBK2),
for the actual physical pin connections:
•V
•V
•V
2. If ManufacturerStatus()[CAL] = 0, send 0x002D to ManufacturerAccess() to enable the [CAL] flag.
3. Send 0xF081 or 0xF082 to ManufacturerAccess() to enable cell voltage output on ManufacturerData(),
depending on which cells are being calibrated.
4. Poll ManufacturerData() until the 8-bit counter value increments by 2 before reading data.
5. See the readings of factory calibrated cell voltages from ManufacturerData() beginning with Cell 1 and
ending in the number of configured cell, n, with the maximum being 15. Depending on the number of
cells, the data is available through two separate read-blocks (0xF081 or 0xF082):
•FCAL
•FCAL
•FCAL
6. Average several readings for higher accuracy. Poll ManufacturerData() until ZZ increments, to indicate
that updated values are available:
•FCAL
is the lowest physical cell in the stack.
CELL1
is the next (second) cell in the stack.
CELL2
is the top cell in the stack.
CELLn
= BBbb of ManufacturerData()
CELL1
= KKkk of ManufacturerData().
CELL10
= BBbb of ManufacturerData().
CELL15
= [ FCAL
CELLx
CELLx
(reading n) + ...+ FCAL
Calibration
8-bit counter, increments when raw ADC values are refreshed
(every 250 ms)
7. Calculate Cell n Offset value: where N = number of cells.
•FCAL
– Reference Cell Voltage = Cell n Offset
CELLn
8. Write the new Cell n Offset value to data flash.
9. Re-check the voltage reading and if it is not accurate, repeat Steps 5 through 8.
10. Send 0x002D to ManufacturerAccess() to clear the [CAL] flag if all calibration is complete.
12.2.2 External Average Voltage Calibration
The bq78350-R1 can be configured with an external resistor divider to measure the battery stack voltage
directly. This measurement has its own calibration procedure.
8. Using the ManufacturerAccess() Commands 0x001F and 0x0020, turn OFF the CHG and DSG. FETs
9. Read Coulomb Counter Offset Samples from data flash.
10. Calculate gain values:
Calibration
11. Write the new CC Gain and Capacity Gain values to data flash.
12. Re-check the current reading. If the reading is not accurate, repeat the steps.
13. Send 0x002D to ManufacturerAccess() to clear the [CAL] flag if all calibration is complete.
12.2.6 Deadbands
The bq78350-R1 can be configured to ignore current and coulomb measurements below individually
programmable levels.
12.2.6.1 Current Deadband
When Current() measures a value less than the value programmed in Current Deadband, Current() will
report 0. This has no effect on the coulomb counting for the gas gauging functionality.
The value of Current Deadband should be selected based on the characterization of the battery
electronics design combined with the environment in which the battery will be used. If the PCB senses
noise causing a real no-current condition to report a non-zero value, then Current Deadband could be
adjusted accordingly.
12.2.6.2 Coulomb Counter Deadband
During normal operation, there could be noise generated in the battery electronics environment that could
cause the bq78350-R1 to accumulate incorrectly (positively or negatively). To filter out this noise, the
Coulomb Counter Deadband setting is used. Any input below this threshold is not accumulated.
1. Apply a known temperature in 0.1°C, and ensure that temperature TEMP
connected to the TSx pin. "TSx" refers to TS1, TS2, or TS3, whichever is applicable.
2. Send 0xF082 to ManufacturerAccess() to enable factory calibrated Temperature output on
ManufacturerData().
3. Poll ManufacturerData() until ZZ increments by 2 before reading data.
4. Read the factory calibrated conversion readings of Temperature from ManufacturerData():
•FCAL
•FCAL
•FCAL
5. Read the TSx offset
6. Re-check the temperature reading. If the reading is not accurate, repeat the steps.
7. Calculate the temperature offset:
= HHhh of ManufacturerData()
TS1
= IIii of ManufacturerData()
TS2
= JJjj of ManufacturerData()
TS3
from External × Temp Offset, where × is 1, 2 , or 3.
old
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Length in
Bytes
206553564—
102553mA
1025538264 nV
MinMaxDefaultUnit
is applied to the thermistor
TSx
where × is 1, 2, or 3.
8. Write the new External × Temp Offset (where × is 1, 2, or 3) value to data flash.
9. Re-check the temperature reading. If the reading is not accurate, repeat the steps.
The Display Port feature can provide a visual display of RelativeStateofCharge() or
AbsoluteStateOfCharge(), and can be activated in several ways. This feature can use LEDs or a 5-bar
LCD and has a variety of configuration options to enable a wide range of indications.
The bq78350-R1 display type is set in LED Configuration [LCDEN]. When [LCDEN] = 0, the display type
is LED; when [LCDEN] = 1, the display type is LCD.
The LED display is the default display type for the bq78350-R1. When the LED display is activated, the
device turns on the appropriate LEDs through the LED1..5 pins when a push button is pressed or a
command is sent to the device.
13.1.2 Liquid Crystal Display (LCD) Operation
The LCD controller supports 3- to 5-segment static bar graph liquid crystal displays (LCDs). The LCD is
operational at all times except when the bq78350-R1 is in the SHUTDOWN power mode.
A static LCD generally has one large electrode on one side of the liquid crystal material called a
"common," and a number of smaller electrodes on the other side called "segments." Segments are made
visible (black) by applying a differential voltage between the back plane signal of the LCD and the
corresponding segment pin. Segments are turned off when there is no voltage difference between the
back plane signal and a segment signal. The display signals must be periodically reversed to ensure zero
average DC voltage and to refresh the display.
Liquid crystal displays having an operating voltage range of 2.5 V to 6 V and a refresh frequency between
30 Hz and 200 Hz are supported. The display refresh must be implemented such that the device current
consumption requirements during sleep and active modes are not violated. The display refresh frequency
must always be set as low as the LCD specification allows in order to minimize current consumption.
Static LCD drive procedure is as follows:
•Step 1. Drive back plane to ground, drive "on" segments high, "off" segments to ground.
•Step 2. Wait for time 1/refresh frequency.
•Step 3. Drive back plane high, drive "on" segments to ground, "off" segments high.
•Step 4. Wait for time 1/refresh frequency.
•Step 5. Go to Step 1.
Chapter 13
SLUUBD3D–September 2015–Revised September 2018
Display Port
13.2 Display Activation
13.2.1 LED Display Activation
The LED display is activated for a period of LED Hold Time:
•If the DISP pin is low for < LED Hold Time.
•If [LEDR] = 1 AND the device is Reset.
•If [LEDCHG] = 1 AND Current() > 0.
•If ManufacturerStatus() = 0x002C.
If SafetyStatus() [CUV] flag is set, the display is disabled.
ClassSubclassNameFormatLength in BytesMinMaxDefault
LED SupportLED Config
LED SupportLED ConfigLED Thresh 1Integer10%100%0%
LED SupportLED ConfigLED Thresh 2Integer10%100%20%
LED SupportLED ConfigLED Thresh 3Integer10%100%40%
LED SupportLED ConfigLED Thresh 4Integer10%100%60%
LED SupportLED ConfigLED Thresh 5Integer10%100%80%
LED Flash
Alarm
The default settings are for a 5-LED/LCD segment display; however, if fewer LEDs/LCD segments are
required, that is, when extra Host Controlled GPIOs are required, then less LEDs/LCD segments can be
used. In this case, the lower LEDs/LCD segments should be used with the unused LEDs/LCD segments
being set to 100%. For example, in a 3-LED case, LED1, LED2, and LED3 should be used and can be
configured for 0, 33%, and 66%, respectively, with LED4 and LED5 set to 100%.
NOTE: Unused LED settings must be set to 100% even if the pin is not used.
13.4 LED and LCD Display Configuration
All data flash settings are available through the LED Support:LED Config subclass. When the display is
enabled for LEDs, the following configuration options are available:
•LED Blink Period—During charging, the top LED segment flashes with the LED Blink Period time
period, and lower LEDs will be fully ON. For example, if battery charge is 36% and the display uses
five LEDs, LED 1 will be ON and LED 2 will blink. [LEDRCA] will override this setting if active.
•LED Flash Period—During discharge alarm, the remaining LED segments flash with the LED FlashPeriod time period: for example, if battery charge is 36% and the display uses five LEDs, LED 1 and
LED 2 will blink.
•LED Delay—An activation delay from one LED to another LED can be set with this value. For LCD,
this configuration is not used because the display is always active.
•LED Hold Time—After display activation, the display will stay on for the LED Hold Time period. For
LCD, this configuration is not used because the display is always active.
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Table 13-2. LED Configuration Values
ClassSubclassNameFormat
LED
Support
LED
Support
LED
Support
LED
Support
LED Config
LED Config
LED ConfigLED Delay
LED Config
LED Flash
Period
LED Blink
Period
LED Hold
Time
Unsigned
Integer
Unsigned
Integer
Unsigned
Integer
Unsigned
IntegerU1
13.5 LCD Specific Display Configuration
When the display is enabled for a 5-bar LCD, then the following configuration options are available.
The LCD Refresh parameter is the LCD refresh frequency setting register. If the LCD display "blinks," or
is not constantly on, then this value should be reduced.
Table 13-3. LCD Configuration Values
ClassSubclassNameFormat
LED
Support
LED Config
LCD
Refresh
Unsigned
Integer
13.6 LED Configuration Register
This register contains a variety of display enable/display settings.
LEDCHG (Bit 2): Enables LED during charging. For LCD, the display is always active so this setting has
no effect.
1 = Activates display due to charging current
0 = Does not activate display due to charging current (default)
LEDRCA (Bit 1): Enables flashing of the LED display when the [RCA] flag in BatteryStatus()
BatteryStatus is set.
1 = If the LED display is activated when [RCA] is set, the display flashes with LED Flash
Period.
0 = The LED display is not activated due to [RCA] being set. (default)
LEDR (Bit 0): Enables activation of the LED display on device-reset exit. For LCD, the display is
activated on device-reset exit; same as setting LEDR = 1.
1 = LED display is not activated on exit from device reset.
0 = LED display is activated (simulates a DISP transition) on exit from device reset (default).
The bq78350-R1 can have the SMBus host read or drive GPIO. Two of the available seven GPIO are
dedicated GPIO (GPIO A and GPIO B), and the other five are default configured as the LED display
(LED1...5). However, each LED pin can be individually selected to be read or driven by the host SMBus
as a GPIO.
14.2 Configuring the GPIO
Each pin chosen as a host controlled GPIO pin must be selected as a GPIO, even the dedicated ones, in
GPIO Config. Once selected, the Input or Output selection is set in GPIO Output Enable. If the
corresponding bit in GPIO Config is not set then the bit in GPIO Output Enable is ignored. If configured
as an output the default state upon reset of the device can be set through GPIO Output Default.
Additionally each pin can be configured as either Open Drain (OD) or as a 3-mA Current Sink (CS)
through the GPIO Type settings.
The status of all enabled GPIO can be read through GPIOStatus(), and the enabled outputs can be driven
to a specific state through GPIOControl(). When enabling a mix of the LED and GPIO pins to be used as
host controlled GPIO, care should be taken to ensure they are configured correctly for appropriate desired
operation.
The bq78350-R1 uses the KEYIN input to enable or disable the DSG FET if safety conditions allow.
15.2 Input Configuration
The polarity of KEYIN detection can be set to active high or active low. If the KEYIN driver does not drive
to both high and low states then the KEYIN pin will require an external pullup, typ 100 k, to VCC. If FETOptions [KEY_POL] = 0, then the KEYIN input is active low; if [KEY_POL] = 1, then the KEYIN input is
active high. To enable this feature, FET Options [KEYEN] must be set.
15.3 Operation
When [KEY_POL] = 0 (active low) and the KEYIN input is low, then the bq78350-R1 operates normally.
However, if KEYIN were to transition to a high state and remain in that state for KEYIN Time, then the
bq78350-R1 would control the companion AFE to turn off the DSG FET. If the KEYIN input transitions
back to low before KEYIN Time expires, then the bq78350-R1 continues to operate normally and the
bq78350-R1 is not influenced by the KEYIN pin.
If the KEYIN input transitions back to a low state and remains in that state for KEYIN Time, then the
bq78350-R1 would control the companion AFE to turn on the DSG FET only if all other safety conditions
allow.
If KEYEN = 1 and if the bq78350-R1 experiences a full power-on reset, then DSG FET will be turned OFF
and the KEYIN transition is again required to turn on the DSG FET.
The bq78350-R1 uses SMBus v1.1 with MASTER mode and packet error checking (PEC) options per the
SBS specification.
16.2 SMBus On and Off State
The bq78350-R1 detects an SMBus off state when SMBC and SMBD are logic-low for ≥ 2 seconds.
Clearing this state requires either SMBC or SMBD to transition high. Within 1 ms, the communication bus
is available.
16.3 Packet Error Checking
The bq78350-R1 can receive or transmit data with or without packet error checking (PEC).
In the write-word protocol, if the host does not support PEC, the last byte of data is followed by a stop
condition and the [HPE] bit should be set to 0 (default).
In the write-word protocol, the bq78350-R1 receives the PEC after the last byte of data from the host. If
the host does not support PEC, the last byte of data is followed by a stop condition. After receipt of the
PEC, the bq78350-R1 compares the value to its calculation. If the PEC is correct, the bq78350-R1
responds with an ACKNOWLEDGE. If it is not correct, the bq78350-R1 responds with a NOT
ACKNOWLEDGE and sets an error code. If the host supports PEC, the [HPE] bit should be set to 1.
In the read-word and block-read in MASTER mode, the host generates an ACKNOWLEDGE after the last
byte of data sent by the bq78350-R1. The bq78350-R1 then sends the PEC, and the host, acting as a
master-receiver, generates a NOT ACKNOWLEDGE and a stop condition.
Chapter 16
SLUUBD3D–September 2015–Revised September 2018
Communications
16.4 Slave Address
The bq78350-R1 has a configurable addressing scheme that can be enabled or this feature can be
disabled resulting in the slave address being fixed as 0x16/0x17.
When [FIXED_ADDR] in SMB Configuration is clear (0), then the slave address is determined by the
voltage measured at the SMBA pin. The voltage on the SMBA pin is created via either being tied to VCC,
VSS, or through an external resistor divider. The external divider can be enabled and disabled via the
ADREN (pin 29) and an external FET. The upper resistor should be connected between VCC and SMBA
with the lower resistor of the divider connected between SMBA and VSS. Both of these resistors are
recommended to be 1% tolerance or better.
Upon exit from Power On Reset (POR) or when OperationStatus() [PRES] transitions from 0 to 1, the
bq78350-R1 drives ADREN high, takes a number of sequential voltage measurements (set by Addr
Reads) of the SMBA pin taking approximately 32 ms each. The corresponding address, set by
SMBTAR_ADDR0…7, is determined for each measurement with the most common address selection
being the one used. If all are different, then the average voltage value is used to determine the address.
Upon completion of the address selection, ADREN is set low to turn off the resistor divider to conserve
power.
Care should be taken in the setting of Addr Reads as the bq78350-R1 will only respond to address
0x16/0x17 until at least Addr Read × 32 ms after POR.
The actual address corresponding to the SMBA voltage is configurable per the following table.
16.5 Broadcasts to Smart Charger and Smart Battery Host
If the [HPE] bit is enabled, MASTER mode broadcasts to the host address are PEC enabled. If the [CPE]
bit is enabled, MASTER mode broadcasts to the smart-charger address are PEC enabled. The [BCAST]
bit enables all broadcasts to a host or a smart charger. When the [BCAST] bit is enabled, the following
broadcasts are sent:
•ChargingVoltage() and ChargingCurrent() broadcasts are sent to the smart-charger device address
(Charger Address) periodically. The default period is set in Charger Request Timer.
•If any of the [OCA], [TCA], [OTA], [TDA], [RCA], [RTA] flags are set, the AlarmWarning() broadcast
is sent to the host device address (Host Address) at the period set in Alarm Timer. Broadcasts stop
when all flags above have been cleared.
•If any of the [OCA], [TCA], [OTA], [TDA] flags are set, the AlarmWarning() broadcast is sent to a
smart-charger device address (Charger Address) at the period set in Alarm Timer. Broadcasts stop
when all flags above have been cleared.
0x00 ManufacturerAccess() and 0x44 ManufacturerBlockAccess()
17.2 0x00 ManufacturerAccess() and 0x44 ManufacturerBlockAccess()
The ManufacturerAccess() and ManufacturerBlockAccess() commands make available a variety of data:
•ManufacturerAccess() provides access to the data through the Smart Battery data set standard,
including when in SEALED mode, using a sequence of a ManufacturerAccess() write word and a
ManufacturerData() block read.
•The ManufacturerBlockAccess() is an extended command that enables access to the same data, but
through a simpler block write/read sequence to the same command.
ManufacturerAccess() example to read LifetimeDataBlock1():
a. Send LifetimeDataBlock1() command through the ManufacturerAccess(): SMBus Write Word of
0x0060 to command 0x00.
b. SMBus Read Block of command 0x23: The first two bytes of the return block will be the data length
and the next bytes will be the data of the command.
ManufacturerBlockAccess() example to read LifetimeDataBlock1():
a. Send LifetimeDataBlock1() command through the ManufacturerBlockAccess(): SMBus Write Block of
0x60 + 0x00 to command 0x44. (Data must be sent in Little Endian.)
b. SMBus Read Block of command 0x44: The first two bytes of the return block will be the Manufacturer
Access command, followed by return data of the command.
Each data entity read/write through ManufacturerBlockAccess() is in Little Endian. For example, a 2-byte
data 0x1234 should be read/write as 0x34 + 0x12; a 4-byte 0x12345678 data should be read/write as
0x78+ 0x56+ 0x34 + 0x12.
There are two exceptions:
1. 0x0035 SecurityKeys(): This Manufacturer Access command allows the user to read or change the
Unseal/Full Access keys. The above description is applied when reading the security keys. However,
only the ManufacturerBlockAccess() can be used to change the security keys.
To write data through ManufacturerBlockAccess(), follow the SMBus write block protocol with the first
two bytes being the SecurityKeys(), followed by the desired new keys' values. See
ManufacturerAccess() 0x0035 Security Keys for details.
2. 0x0037 AuthenticationKey(): This Manufacturer Access command allows users to change the
authentication key. Sending the new authentication key through ManufacturerBlockAccess() is
supported. Additionally, the gauge also supports the approach of updating the authentication keys by
sending the new keys to ManufacturerInput(). See Section 17.2.32 for details.
0x00 ManufacturerAccess() and 0x44 ManufacturerBlockAccess()
17.2.1 ManufacturerAccess() 0x0000 ManufacturerBlockAccess() or ManufacturerData()
A read on this command returns the lowest 16-bit of the OperationStatus() data.
17.2.2 ManufacturerAccess() 0x0001 Device Type
The device can be checked for the IC part number. When 0x0001 is written to ManufacturerAccess(), the
bq78350-R1 returns the IC part number on a subsequent read on ManufacturerBlockAccess() or
ManufacturerData() in the following format: aaAA, where:
ValueDescription
aaAADevice type
17.2.3 ManufacturerAccess() 0x0002 Firmware Version
The device can be checked for the firmware version of the IC. When 0x0002 is written to
ManufacturerAccess(), the bq78350-R1 returns the firmware revision on ManufacturerBlockAccess() or
ManufacturerData() in the following format: ddDDvvVVbbBBTTzzZZRREE, where:
ValueDescription
ddDDDevice Number
vvVVVersion
bbBBBuild Number
ttTTFirmware Type
zzZZCEDV Version
RREEReserved
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17.2.4 ManufacturerAccess() 0x0003 Hardware Version
The device can be checked for the hardware version of the IC. When 0x0003 is written to
ManufacturerAccess(), the bq78350-R1 returns the hardware revision on a subsequent read on
ManufacturerBlockAccess() or ManufacturerData().
The device can return the instruction flash signature. When 0x0004 is written to ManufacturerAccess(), the
bq78350-R1 returns the IF signature on a subsequent read on ManufacturerBlockAccess() or
ManufacturerData() after a wait time of 250 ms.
The device can return the data flash checksum. When 0x0005 is written to ManufacturerAccess() the
bq78350-R1 returns the signature of all static DF on a subsequent read on ManufacturerBlockAccess() or
ManufacturerData() after a wait time of 250 ms. The MSB is set to 1 if the calculated signature does not
match the signature stored in DF.
17.2.7 ManufacturerAccess() 0x0006 Chemical ID
This command returns the chemical ID of the OCV tables used in the gauging algorithm. When 0x0006 is
written to ManufacturerAccess(), the bq78350-R1 returns the chemical ID on a subsequent read on
ManufacturerBlockAccess() or ManufacturerData().