Texas Instruments BQ24735RGRR Schematic [ru]

Adapter

4.5 to 24 V

HOST

bq24735

Hybrid Power Boost Charge

Controller

SYS

Battery Pack

N-FET Driver

1S-4S

SMBus

SMBus Controls V and I

with high accuracy

Adapter Detection

Enhanced Safety: OCP, OVP,

Integration: Loop Compensation; Soft-Start Comparator

FET Short

Product Folder

Sample & Buy

Technical Documents

Tools & Software

Support & Community

SLUSAK9B –SEPTEMBER 2011–REVISED APRIL 2015

bq24735 1- to 4-Cell Li+ Battery SMBus Charge Controller for Supporting Turbo

Boost Mode With N-Channel Power MOSFET Selector

1 Features 2 Applications

• Adapter and Battery Provide Power to System Together to Support Intel®CPU Turbo Boost Notebooks, and Netbooks Mode

• SMBus Host-Controlled NMOS-NMOS Synchronous Buck Converter With Programmable 615-, 750-, and 885-kHz Switching Frequencies

• Automatic N-Channel MOSFET Selection of System Power Source From Adapter or Battery Driven by Internal Charge Pumps

• Enhanced Safety Features for Overvoltage Protection, Overcurrent Protection, Battery, Inductor and MOSFET Short-Circuit Protection

• Programmable Input Current, Charge Voltage, Charge Current Limits

– ±0.5% Charge Voltage Accuracy up to 19.2 V – ±3% Charge Current Accuracy up to 8.128 A – ±3% Input Current Accuracy up to 8.064 A – ±2% 20× Adapter Current or Charge Current

Amplifier Output Accuracy

• Programmable Battery Depletion Threshold, and Battery LEARN Function

• Programmable Adapter Detection and Indicator

• Integrated Loop Compensation and Soft Start

• Real-Time System Control on ILIM Pin to Limit Charge Current

• AC Adapter Operating Range: 4.5 V to 24 V

• 5-µA Off-State Battery Discharge Current

• 0.65 mA (0.8 mA Max) Adapter Standby Quiescent Current

• Portable Notebook Computers, UMPC, Ultra-Thin

• Handheld Terminals

• Industrial and Medical Equipment

• Portable Equipment

3 Description

The bq24735 device is a high-efficiency, synchronous battery charger, offering low component count for space-constrained, multichemistry battery charging applications. The bq24735 device supports turbo boost by allowing battery discharge energy to the system when system power demand is temporarily higher than the adapter maximum power level so the adapter will not crash.

The bq24735 device uses two charge pumps to separately drive N-channel MOSFETs (ACFET, RBFET, and BATFET) for automatic system power source selection.

SMBus controlled input current, charge current, and charge voltage digital-to-analog converters (DACs) allow for very high-regulation accuracies that can be easily programmed by the system power management microcontroller.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

bq24735 VQFN (20) 3.50 mm × 3.50 mm (1) For all available packages, see the orderable addendum at

the end of the data sheet.

bq24735

(1)

Simplified Application Diagram

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

bq24735

SLUSAK9B –SEPTEMBER 2011–REVISED APRIL 2015

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1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Description (continued)......................................... 3

6 Pin Configuration and Functions ......................... 3

7 Specifications......................................................... 4

7.1 Absolute Maximum Ratings...................................... 4

7.2 ESD Ratings.............................................................. 5

7.3 Recommended Operating Conditions....................... 5

7.4 Thermal Information ................................................. 5

7.5 Electrical Characteristics........................................... 5

7.6 Timing Requirements................................................ 9

7.7 Typical Characteristics............................................ 10

8 Parameter Measurement Information ................ 12

9 Detailed Description ............................................ 13

9.1 Overview ................................................................. 13

9.2 Functional Block Diagram....................................... 14

9.3 Feature Description................................................. 15

9.4 Device Functional Modes........................................ 18

9.5 Programming........................................................... 19

9.6 Register Maps......................................................... 22

10 Application and Implementation........................ 27

10.1 Application Information.......................................... 27

10.2 Typical Application ............................................... 27

10.3 System Examples ................................................. 33

11 Power Supply Recommendations ..................... 35

12 Layout................................................................... 35

12.1 Layout Guidelines ................................................. 35

12.2 Layout Example .................................................... 37

13 Device and Documentation Support ................. 38

13.1 Device Support...................................................... 38

13.2 Documentation Support ....................................... 38

13.3 Trademarks........................................................... 38

13.4 Electrostatic Discharge Caution............................ 38

13.5 Glossary................................................................ 38

14 Mechanical, Packaging, and Orderable

Information........................................................... 38

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision A (January 2013) to Revision B Page

• Added ESD Ratings table, Overview, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation

Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1

• Changed the format to the new template .............................................................................................................................. 1

• Deleted ", and is available in a 20-pin, 3.5x3.5 mm2QFN package" from last paragraph in Description section.

Added the Device Information table on page 1. .................................................................................................................... 3

• Added LODRV, HIDRV, and PHASE (2% duty cycle) to the Absolute Maximum Ratings table ........................................... 4

Changes from Original (September 2011) to Revision A Page

• Added V

specs ................................................................................................................................................................ 5

(ESD)

Product Folder Links: bq24735

6 7 8 9 10

20 19 18 17 16

ACN

ACP

CMSRC

ACDRV

ACOK

ACDET

IOUT

SDA

SCL

ILIM

BATDRV

SRN

SRP

GND

LODRV

REGN

BTST

HIDRV

PHASE

VCC

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5 Description (continued)

The bq24735 device uses an internal input current register or an external ILIM pin to throttle down PWM modulation to reduce the charge current. The bq24735 device charges 1-, 2-, 3-, or 4-series Li+ cells.

6 Pin Configuration and Functions

RGR Package

20-Pin VQFN

Top View

Pin Functions

NAME NO.

Adapter detection input. Program adapter valid input threshold by connecting a resistor divider from adapter input to

ACDET 6 ACDET pin to GND pin. When ACDET pin is above 0.6 V and VCC is above UVLO, REGN LDO is present, ACOK

comparator and IOUT are both active. Charge pump output to drive both adapter input N-channel MOSFET (ACFET) and reverse blocking N-channel

MOSFET (RBFET). ACDRV voltage is 6 V above CMSRC when voltage on ACDET pin is between 2.4 V and 3.15 V,

ACDRV 4 voltage on VCC pin is above UVLO and voltage on VCC pin is

275 mV above voltage on SRN pin so that ACFET and RBFET can be turned on to power the system by AC adapter. Place a 4-kΩ resistor from ACDRV to the gate of ACFET and RBFET limits the inrush current on ACDRV pin.

AC adapter detection open-drain output. It is pulled HIGH to external pullup supply rail by external pullup resistor when voltage on ACDET pin is between 2.4 V and 3.15 V, and voltage on VCC is above UVLO and voltage on VCC

ACOK 5 pin is 275 mV above voltage on SRN pin, indicating a valid adapter is present to start charge. If any one of the above

conditions cannot be met, it is pulled LOW to GND by internal MOSFET. Connect a 10-kΩ pullup resistor from ACOK to the pullup supply rail.

ACN 1

ACP 2

Input current-sense resistor negative input. Place an optional 0.1-µF ceramic capacitor from ACN to GND for common-mode filtering. Place a 0.1-µF ceramic capacitor from ACN to ACP to provide differential-mode filtering.

Input current-sense resistor positive input. Place a 0.1-µF ceramic capacitor from ACP to GND for common-mode filtering. Place a 0.1-µF ceramic capacitor from ACN to ACP to provide differential-mode filtering.

Charge pump output to drive battery-to-system N-channel MOSFET (BATFET). BATDRV voltage is 6 V above SRN

BATDRV 11

to turn on BATFET to power the system from battery. BATDRV voltage is SRN voltage to turn off BATFET to power system from AC adapter. Place a 4-kΩ resistor from BATDRV to the gate of BATFET limits the inrush current on BATDRV pin.

BTST 17

CMSRC 3

GND 14 HIDRV 18 High-side power MOSFET driver output. Connect to the high-side N-channel MOSFET gate.

High-side power MOSFET driver power supply. Connect a 0.047-µF capacitor from BTST to PHASE, and a bootstrap Schottky diode from REGN to BTST.

ACDRV charge pump source input. Place a 4-kΩ resistor from CMSRC to the common source of ACFET (Q1) and RBFET (Q2) limits the inrush current on CMSRC pin.

IC ground. On PCB layout, connect to analog ground plane, and only connect to power ground plane through the power pad underneath IC.

Product Folder Links: bq24735

DESCRIPTION

bq24735

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Pin Functions (continued)

NAME NO.

Charge current limit input. Program ILIM voltage by connecting a resistor divider from system reference 3.3-V rail to

ILIM 10

IOUT 7 times the differential voltage across sense resistor. Place a 100-pF or less ceramic decoupling capacitor from IOUT

LODRV 15 Low-side power MOSFET driver output. Connect to low-side N-channel MOSFET gate. PHASE 19 High-side power MOSFET driver source. Connect to the source of the high-side N-channel MOSFET.

PowerPAD™ — solder PowerPad to the board, and have vias on the PowerPad plane connecting to analog ground and power

REGN 16 voltage on ACDET pin is above 0.6 V and voltage on VCC is above UVLO. Connect a 1-µF ceramic capacitor from

SCL 9

SDA 8

SRN 12 mode filtering, and connect to current-sensing resistor. Connect a 0.1-µF ceramic capacitor between current-sensing

SRP 13

VCC 20

ILIM pin to GND pin. The lower of ILIM voltage or DAC limit voltage sets charge current regulation limit. To disable the control on ILIM, set ILIM above 1.6 V. Once voltage on ILIM pin falls below 75 mV, charge (buck mode) or discharge (boost mode) is disabled. Charge and discharge is enabled when ILIM pin rises above 105 mV.

Buffered adapter or charge current output, selectable with SMBus command ChargeOption(). IOUT voltage is 20 pin to GND.

Exposed pad beneath the IC. Analog ground and power ground star-connected only at the PowerPad plane. Always ground planes. It also serves as a thermal pad to dissipate the heat.

Linear regulator output. REGN is the output of the 6-V linear regulator supplied from VCC. The LDO is active when REGN to GND.

SMBus open-drain clock input. Connect to SMBus clock line from the host controller or smart battery. Connect a 10kΩ pullup resistor according to SMBus specifications.

SMBus open-drain data I/O. Connect to SMBus data line from the host controller or smart battery. Connect a 10-kΩ pullup resistor according to SMBus specifications.

Charge current-sense resistor negative input. SRN pin is for battery voltage sensing as well. Connect SRN pin to a

7.5-Ω resistor first, then, from another resistor terminal, connect a 0.1-µF ceramic capacitor to GND for commonresistor to provide differential-mode filtering. See Application and Implementation about negative output voltage

protection for hard shorts on battery-to-ground or battery-reverse connection by adding small resistor. Charge current-sense resistor positive input. Connect SRP pin to a 10-Ω resistor first, then from another resistor

terminal, connect to current-sensing resistor. Connect a 0.1-µF ceramic capacitor between current-sensing resistor to provide differential-mode filtering. See Application and Implementation about negative output voltage protection for hard shorts on battery to ground or battery reverse connection by adding small resistor.

Input supply, diode OR from adapter or battery voltage. Use 10-Ω resistor and 1-µF capacitor to ground as low-pass filter to limit inrush current.

DESCRIPTION

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

SRN, SRP, ACN, ACP, CMSRC, VCC –0.3 30 PHASE –2 30 ACDET, SDA, SCL, LODRV, REGN, IOUT, ILIM, ACOK –0.3 7

Voltage BTST, HIDRV, ACDRV, BATDRV –0.3 36

LODRV (2% duty cycle) –4 7 HIDVR (2% duty cycle) –4 36

PHASE (2% duty cycle) –4 30 Maximum difference voltage SRP–SRN, ACP–ACN –0.5 0.5 Junction temperature, T Storage temperature, T

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

stg

(1)

MIN MAX UNIT

–40 155 °C –55 155 °C

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7.2 ESD Ratings

VALUE UNIT

(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 Charged device model (CDM), per JEDEC specification JESD22-C101

(1)

(2)

±2000

±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

SRN, SRP, ACN, ACP, CMSRC, VCC 0 24

Voltage V

Maximum difference voltage SRP–SRN, ACP–ACN –0.2 0.2 V Junction temperature, T

PHASE –2 24

ACDET, SDA, SCL, LODRV, REGN, IOUT, ILIM, ACOK 0 6.5

BTST, HIDRV, ACDRV, BATDRV 0 30

0 125 °C

7.4 Thermal Information

bq24735

THERMAL METRIC

θJA

θJC(top)

θJB

θJC(bot)

Junction-to-ambient thermal resistance 46.8 °C/W Junction-to-case (top) thermal resistance 56.9 °C/W Junction-to-board thermal resistance 46.6 °C/W Junction-to-top characterization parameter 0.6 °C/W Junction-to-board characterization parameter 15.3 °C/W Junction-to-case (bottom) thermal resistance 4.4 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(1)

RGR [VQFN] UNIT

20 PINS

7.5 Electrical Characteristics

4.5 V ≤ V

OPERATING CONDITIONS

VCC_OP

CHARGE VOLTAGE REGULATION

BAT_REG_RNG

BAT_REG_ACC

CHARGE CURRENT REGULATION

IREG_CHG_RNG

≤ 24 V, 0°C ≤ TJ≤ 125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)

VCC

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VCC Input voltage operating range 4.5 24 V

Battery voltage range 1.024 19.2 V

16.716 16.8 16.884 V –0.5% 0.5%

12.529 12.592 12.655 V –0.5% 0.5%

8.35 8.4 8.45 V

–0.6% 0.6%

4.163 4.192 4.221 V

–0.7% 0.7%

0 81.28 mV

Charge voltage regulation accuracy

Charge current regulation differential voltage range

ChargeVoltage() = 0x41A0H

ChargeVoltage() = 0x3130H

ChargeVoltage() = 0x20D0H

ChargeVoltage() = 0x1060H

IREG_CHG

= V

SRP

- V

SRN

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Electrical Characteristics (continued)

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4.5 V ≤ V

≤ 24 V, 0°C ≤ TJ≤ 125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)

VCC

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

CHRG_REG_ACC

Charge current regulation accuracy 10-mΩ current-sensing resistor

INPUT CURRENT REGULATION

IREG_DPM_RNG

DPM_REG_ACC

Input current regulation differential voltage range

Input current regulation accuracy 10-mΩ current-sensing resistor

INPUT CURRENT OR CHARGE CURRENT-SENSE AMPLIFIER

ACP/N_OP

SRP/N_OP

IOUT

IOUT_ACC

IOUT_MAX

Input common-mode range Voltage on ACP/ACN 4.5 24 V Output common-mode range Voltage on SRP/SRN 0 19.2 V IOUT output voltage range 0 3.3 V IOUT output current 0 1 mA Current-sense amplifier gain V

Current-sense output accuracy

Maximum output load capacitance For stability with 0- to 1-mA load 100 pF

REGN REGULATOR

REGN_REG

REGN_LIM

REGN

REGN regulator voltage V

REGN current limit

REGN output capacitor required for I stability

INPUT UNDERVOLTAGE LOCKOUT COMPARATOR (UVLO)

UVLO

Undervoltage rising threshold V Undervoltage hysteresis, falling V

FAST DPM COMPARATOR (FAST_DPM)

FAST_DPM

Fast DPM comparator stop charging rising threshold with respect to input current limit, voltage across input sense resistor rising edge

QUIESCENT CURRENT

Battery BATFET OFF STATE Current,

BAT_BATFET_OFF

BATFET off, I

+ I

SRP

SRN

+ I

PHASE

+ I

ACP

+ I

ACN

ChargeCurrent() = 0x1000H

ChargeCurrent() = 0x0800H

ChargeCurrent() = 0x0200H

ChargeCurrent() = 0x0100H

ChargeCurrent() = 0x0080H

IREG_DPM

= V

ACP

– V

ACN

InputCurrent() = 0x1000H

InputCurrent() = 0x0800H

InputCurrent() = 0x0400H

InputCurrent() = 0x0200H

(ICOUT)/V(SRP-SRN)

(SRP-SRN)

> 6.5 V, V

VCC

= 0 V, V

REGN

TSHUT V

= 0 V, V

REGN

TSHUT

= 100 µA to 50 mA 1

LOAD

rising 3.5 3.75 4 V

VCC

falling 340 mV

VCC

or V

(ACP-ACN)

or V or V or V or V or V or V

= 40.96 mV –2% 2%

(ACP-ACN)

= 20.48 mV –4% 4%

(ACP-ACN)

= 10.24 mV –15% 15%

(ACP-ACN)

= 5.12 mV –20% 20%

(ACP-ACN)

= 2.56 mV –33% 33%

(ACP-ACN)

= 1.28 mV –50% 50%

(ACP-ACN)

> 0.6 V (0-45 mA load) 5.5 6 6.5 V

ACDET

> UVLO charge enabled and not in 50 75

VCC

> UVLO charge disabled or in 7 14

VCC

3973 4096 4219 mA

–3% 3%

1946 2048 2150 mA

–5% 5%

410 512 614 mA

–20% 20%

172 256 340 mA

–33% 33%

64 128 192 mA

–50% 50%

0 80.64 mV

3973 4096 4219 mA

–3% 3%

1946 2048 2150 mA

–5% 5%

870 1024 1178 mA

–15% 15%

384 512 640 mA

–25% 25%

20 V/V

µF

103% 107% 111%

= 16.8 V, VCC disconnect from battery,

VBAT

BATFET charge pump off, BATFET turns off, TJ= 0 to 5 µA 85°C

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Electrical Characteristics (continued)

bq24735

SLUSAK9B –SEPTEMBER 2011–REVISED APRIL 2015

4.5 V ≤ V

≤ 24 V, 0°C ≤ TJ≤ 125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)

VCC

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

BAT_BATFET_ON

STANDBY

AC_NOSW

AC_SW

Battery BATFET ON STATE Current, BATFET on,

+ I

SRP

SRN

PHASE

VCC

Standby quiescent current, I I

ACN

ACP

VCC

+ I

ACN

ACP

Adapter bias current during charge, V I

+ I

ACP

+ I

ACN

VCC

Adapter bias current during charge, V I

+ I

ACP

+ I

ACN

VCC

= 16.8 V, VCC connect from battery, BATFET

VBAT

charge pump on, BATFET turns on, TJ= 0 to 85°C

+ V

> UVLO, V

VCC

TJ= 0 to 85°C

> UVLO, 2.4 V < V

VCC

charge enabled, no switching, TJ= 0 to 85°C

> UVLO, 2.4 V < V

VCC

charge enabled, switching, MOSFET Sis412DN

ACOK COMPARATOR

ACOK_RISE

ACOK_FALL_HYS

WAKEUP_RISE

WAKEUP_FALL

ACOK rising threshold V ACOK falling hysteresis V WAKEUP detect rising threshold V WAKEUP detect falling threshold V

> UVLO, V

VCC

> UVLO, V

VCC

> UVLO, V

VCC

> UVLO, V

VCC

VCC to SRN COMPARATOR (VCC_SRN)

VCC-SRN_FALL

VCC-SRN _RHYS

VCC-SRN falling threshold V VCC-SRN rising hysteresis V

falling toward V

VCC

rising above V

VCC

ACN to SRN COMPARATOR (ACN_SRN)

ACN-SRN_FALL

ACN-SRN_RHYS

HIGH-SIDE IFAULT COMPARATOR (IFAULT_HI)

IFAULT_HI_RISE

LOW-SIDE IFAULT COMPARATOR (IFAULT_LOW)

IFAULT_LOW_RISE

ACN to BAT falling threshold V ACN to BAT rising hysteresis V

(1)

ACP to PHASE rising threshold mV

(1)

PHASE to GND rising threshold mV

falling toward V

ACN

rising above V

ACN

ChargeOption() bit [8] = 1 (Default) 450 750 1200 ChargeOption() bit [8] = 0 Disable function

ChargeOption() bit [7] = 0 (Default) 70 135 220 ChargeOption() bit [7] = 1 140 230 340

INPUT OVERVOLTAGE COMPARATOR (ACOV)

ACOV

ACOV_HYS

INPUT OVERCURRENT COMPARATOR (ACOC)

ACDET overvoltage rising threshold V ACDET overvoltage falling hysteresis V

(1)

rising 3.05 3.15 3.25 V

ACDET

falling 50 75 100 mV

ACDET

Adapter overcurrent rising threshold with ChargeOption() bit [1] = 1 (Default) 300% 333% 366%

ACOC

ACOC_min

ACOC_max

respect to input current limit, voltage across input sense resistor rising edge

Min ACOC threshold clamp voltage 40 45 50 mV

Max ACOC threshold clamp voltage 135 150 165 mV

ChargeOption() bit [1] = 0 Disable function ChargeOption() bit [1] = 1 (333%),

InputCurrent () = 0x0400H (10.24 mV) ChargeOption() bit [1] = 1 (333%),

InputCurrent () = 0x1F80H (80.64 mV)

BAT OVERVOLTAGE COMPARATOR (BAT_OVP)

OVP_RISE

OVP_FALL

Overvoltage rising threshold as percentage V of V

BAT_REG

Overvoltage falling threshold as V percentage of V

BAT_REG

rising 103% 104% 106%

SRN

falling 102%

SRN

CHARGE OVERCURRENT COMPARATOR (CHG_OCP)

ChargeCurrent() = 0x0xxxH 54 60 66

ChargeCurrent() = 0x1800 H– 0x1FC0H 110 120 130

OCP_RISE

Charge overcurrent rising threshold, measure voltage drop across current- ChargeCurrent() = 0x1000H – 0x17C0H 80 90 100 mV sensing resistor

CHARGE UNDERCURRENT COMPARATOR (CHG_UCP)

UCP_FALL

Charge undercurrent falling threshold V

falling toward V

SRP

LIGHT LOAD COMPARATOR (LIGHT_LOAD)

LL_FALL

LL_RISE_HYST

Light load falling threshold 1.25 mV Light load rising hysteresis 1.25 mV

Measure the voltage drop across current-sensing resistor

(1) User can adjust threshold through SMBus ChargeOption() REG0x12.

> 0.6 V, charge disabled,

ACDET

< 3.15 V,

ACDET

< 3.15 V,

ACDET

rising 2.376 2.4 2.424 V

ACDET

falling 35 55 75 mV

ACDET

rising 0.57 0.8 V

ACDET

falling 0.3 0.51 V

ACDET

SRN

0.65 0.8 mA

1.5 3 mA

10 mA

70 125 200 mV

100 150 200 mV

120 200 280 mV

40 80 120 mV

1 5 9 mV

25 µA

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Electrical Characteristics (continued)

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4.5 V ≤ V

≤ 24 V, 0°C ≤ TJ≤ 125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)

VCC

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

BATTERY DEPLETION COMPARATOR (BAT_DEPL) [1]

Battery depletion falling threshold,

BATDEPL_FALL

BATDEPL_RHYST

BATDEPL_RDEG

percentage of voltage regulation limit, V falling

Battery depletion rising hysteresis, V rising

Battery depletion rising deglitch (specified Delay to turn off ACFET and turn on BATFET during by design) LEARN cycle

BATTERY LOWV COMPARATOR (BAT_LOWV)

BATLV_FALL

BATLV_RHYST

BATLV

Battery LOWV falling threshold V Battery LOWV rising hysteresis V Battery LOWV charge current limit 10-mΩ current-sensing resistor 0.5 A

THERMAL SHUTDOWN COMPARATOR (TSHUT)

SHUT

SHUT_HYS

Thermal shutdown rising temperature Temperature rising 155 °C Thermal shutdown hysteresis, falling Temperature falling 20 °C

ILIM COMPARATOR

ILIM_FALL

ILIM_RISE

ILIM as CE falling threshold V ILIM as CE rising threshold V

LOGIC INPUT (SDA, SCL)

IN_ LO

IN_ HI

IN_ LEAK

Input low threshold 0.8 V Input high threshold 2.1 V Input bias current V = 7 V –1 1 μA

LOGIC OUTPUT OPEN DRAIN (ACOK, SDA)

OUT_ LO

OUT_ LEAK

Output saturation voltage 5-mA drain current 500 mV Leakage current V= 7 V –1 1 μA

ANALOG INPUT (ACDET, ILIM)

IN_ LEAK

Input bias current V = 7 V –1 1 μA

PWM OSCILLATOR

SW+

SW–

PWM switching frequency ChargeOption() bit [9] = 0 (Default) 600 750 900 kHz PWM increase frequency ChargeOption() bit [10:9] = 11 665 885 1100 kHz PWM decrease frequency ChargeOption() bit [10:9] = 01 465 615 765 kHz

BATFET GATE DRIVER (BATDRV)

BATFET

BATDRV_LOAD

BATDRV_OFF

BATDRV charge pump current limit 40 60 µA Gate drive voltage on BATFET V Minimum load resistance between

BATDRV and SRN BATDRV turnoff resistance I = 30 µA 5 6.2 7.4 kΩ

ACFET GATE DRIVER (ACDRV)

ACFET

ACDRV_LOAD

ACDRV_OFF

ACFET_LOW

ACDRV charge pump current limit 40 60 μA Gate drive voltage on ACFET V Minimum load resistance between ACDRV

and CMSRC ACDRV turnoff resistance I = 30 µA 5 6.2 7.4 kΩ ACDRV turnoff when Vgs voltage is low

(specified by design)

PWM HIGH-SIDE DRIVER (HIDRV)

DS_HI_ON

DS_HI_OFF

High-side driver turnon resistance V High-side driver turnoff resistance V

ChargeOption() bit [12:11] = 00 55.53% 59.19% 63.5% ChargeOption() bit [12:11] = 01 58.68% 62.65% 67.5%

SRN

ChargeOption() bit [12:11] = 10 62.17% 66.55% 71.5% ChargeOption() bit [12:11] = 11 (Default) 66.06% 70.97% 77% ChargeOption() bit [12:11] = 00 225 305 400 ChargeOption() bit [12:11] = 01 240 325 430

SRN

ChargeOption() bit [12:11] = 10 255 345 450 ChargeOption() bit [12:11] = 11 (Default) 280 370 490

falling 2.4 2.5 2.6 V

SRN

rising 200 mV

SRN

falling 60 75 90 mV

ILIM

rising 90 105 120 mV

ILIM

– V

BATDRV

SRN

when V

> UVLO 5.5 6.1 6.5 V

SRN

500 kΩ

ACDRV

– V

CMSRC

when V

> UVLO 5.5 6.1 6.5 V

VCC

500 kΩ

– VPH= 5.5 V, I = 10 mA 6 10 Ω

BTST

– VPH= 5.5 V, I = 10 mA 0.65 1.3 Ω

BTST

600 ms

5.9 V

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Electrical Characteristics (continued)

bq24735

SLUSAK9B –SEPTEMBER 2011–REVISED APRIL 2015

4.5 V ≤ V

≤ 24 V, 0°C ≤ TJ≤ 125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)

VCC

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

BTST_REFRESH

Bootstrap refresh comparator threshold V voltage

– VPHwhen low-side refresh pulse is requested

BTST

3.85 4.3 4.7 V

PWM LOW-SIDE DRIVER (LODRV)

DS_LO_ON

DS_LO_OFF

Low-side driver turnon resistance V Low-side driver turnoff resistance V

= 6 V, I = 10 mA 7.5 12 Ω

REGN

= 6 V, I = 10 mA 0.9 1.4 Ω

REGN

INTERNAL SOFT START

STEP

Soft start current step In CCM mode 10-mΩ current-sensing resistor 64 mA

7.6 Timing Requirements

MIN TYP MAX UNIT

ACOK COMPARATOR

> UVLO, V

VCC

First time OR ChargeOption() bit [15] = 0

ACOK_RISE_DEG

ACOK rising deglitch (specified by design)

> UVLO, V

VCC

(NOT First time) AND ChargeOption() bit [15] = 1 0.9 1.3 1.7 s (Default)

INPUT OVERCURRENT COMPARATOR (ACOC)

ACOC_DEG

ACOC deglitch time (specified by design) 2.3 4.2 6.6 ms

(1)

Voltage across input sense resistor rising to disable charge

BATTERY DEPLETION COMPARATOR (BAT_DEPL) [1]

BATDEPL_RDEG

Battery depletion rising deglitch (specified Delay to turn off ACFET and turn on BATFET during by design) LEARN cycle

PWM DRIVER TIMING

LOW_HIGH

HIGH_LOW

Driver dead time from low side to high side 20 ns Driver dead time from high side to low side 20 ns

INTERNAL SOFT START

STEP

Soft start current step time 240 μs

SMBus TIMING CHARACTERISTICS

W(H)

W(L)

SU(STA)

H(STA)

SU(DAT)

H(DAT)

SU(STOP)

(BUF)

S(CL)

SCLK/SDATA rise time 1 μs SCLK/SDATA fall time 300 ns SCLK pulse width high 4 50 μs SCLK Pulse Width Low 4.7 μs Setup time for START condition 4.7 μs START condition hold time after which first clock pulse is generated 4 μs Data setup time 250 ns Data hold time 300 ns Setup time for STOP condition 4 µs Bus free time between START and STOP condition 4.7 μs Clock Frequency 10 100 kHz

HOST COMMUNICATION FAILURE

timeout

BOOT

SMBus bus release time-out Deglitch for watchdog reset signal 10 ms

(2)

Watchdog time-out period, ChargeOption() bit [14:13] = 01

WDI

Watchdog time-out period, ChargeOption() bit [14:13] = 10 Watchdog time-out period, ChargeOption() bit [14:13] = 11

(1) User can adjust threshold through SMBus ChargeOption() REG0x12. (2) Devices participating in a transfer will time out when any clock low exceeds the 25-ms minimum time-out period. Devices that have

detected a time-out condition must reset the communication no later than the 35-ms maximum time-out period. Both a master and a slave must adhere to the maximum value specified, as it incorporates the cumulative stretch limit for both a master (10 ms) and a slave (25 ms).

(3) User can adjust threshold through SMBus ChargeOption() REG0x12.

rising above 2.4 V,

ACDET

rising above 2.4 V,

ACDET

100 150 200 ms

600 ms

25 35 ms

(3) (3) (3)

(Default) 140 175 210 s

35 44 53 s 70 88 105 s

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7.7 Typical Characteristics

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CH1: VCC, 10 V/div, CH2: ACDET, 2 V/div, CH3: ACOK, 5 V/div,

CH4: REGN, 5 V/div, 40 ms/div

Figure 1. VCC, ACDET, REGN and ACOK Power Up

CH1: Vin, 10 V/div, CH2: LODRV, 5 V/div,

CH3: PHASE, 10 V/div,

CH4: inductor current, 2 A/div, 2 ms/div

Figure 3. Current Soft-Start

CH1: ILIM, 1 V/div, CH4: inductor current, 1 A/div, 20 ms/div

Figure 2. Charge Enable by ILIM

CH1: ILIM, 1 V/div, CH4: inductor current, 1 A/div, 4 µs/div

Figure 4. Charge Disable by ILIM

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Typical Characteristics (continued)

bq24735

SLUSAK9B –SEPTEMBER 2011–REVISED APRIL 2015

CH1: PHASE, 10 V/div, CH2: LODRV, 5 V/div,

CH3: HIDRV, 10 V/div

CH4: inductor current, 2 A/div, 400 ns/div

Figure 5. Continuous Conduction Mode Switching

Waveforms

CH1: PHASE, 10 V/div, CH2: LODRV, 5 V/div,

CH4: inductor current, 2 A/div, 4 µs/div

Figure 7. 100% Duty and Refresh Pulse

CH1: PHASE, 10 V/div, CH2: LODRV, 5 V/div,

CH3: HIDRV, 10 V/div,

CH4: inductor current, 1 A/div, 400 ns/div

Figure 6. Cycle-by-Cycle Synchronous to Nonsynchronous

CH2: battery current, 2 A/div, CH3: adapter current, 2 A/div,

CH4: system load current, 2 A/div, 100 µs/div

Figure 8. System Load Transient (Input DPM)

CH3: adapter current, 2 A/div, CH3: adapter current, 2 A/div,

CH4: battery current, 2 A/div, 10 ms/div CH4: battery current, 2 A/div, 10 ms/div

Figure 9. Buck-to-Boost Mode Figure 10. Boost-to-Buck Mode

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8 Parameter Measurement Information

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Figure 11. SMBus Communication Timing Waveforms

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9 Detailed Description

9.1 Overview

The bq24735 device is a 1- to 4-cell battery charge controller with power selection for space-constrained, multichemistry portable applications such as notebooks and detachable ultrabooks. The device supports wide input range of input sources from 4.5 V to 24 V, and 1- to 4-cell battery for a versatile solution.

The bq24735 device supports automatic system power source selection with separate drivers for N-channel MOSFETS on the adapter side and battery side.

The bq24735 device features Dynamic Power Management (DPM) to limit the input power and avoid AC adapter overloading. During battery charging, as the system power increases, the charging current will reduce to maintain total input current below adapter rating.

The SMBus controls input current, charge current and charge voltage registers with high-resolution, highaccuracy regulation limits.

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135

1.07

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9.2 Functional Block Diagram

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9.3 Feature Description

9.3.1 Adapter Detect and ACOK Output

The bq24735 uses an ACOK comparator to determine the source of power on VCC pin, either from the battery or adapter. An external resistor voltage divider attenuates the adapter voltage before it goes to ACDET. The adapter detect threshold should typically be programmed to a value greater than the maximum battery voltage, but lower than the maximum allowed adapter voltage.

The open-drain ACOK output requires external pullup resistor to system digital rail for a high level. It can be pulled to external rail under the following conditions:

• V

• 2.4 V < V

• V The first time after IC POR always gives 150-ms ACOK rising edge delay no matter what the ChargeOption

register value is. Only after the ACDET pin voltage is pulled below 2.4 V (but not below 0.6 V, which resets the IC and forces the next ACOK rising edge deglitch time to be 1.3 s) and the ACFET has been turned off at least one time, the 1.3 s (or 150 ms) delay time is effective for the next time the ACDET pin voltage goes above 2.4 V. To change this option, the VCC pin voltage must above UVLO, and the ACDET pin voltage must be above 0.6 V which enables the IC SMBus communication and sets ChargeOption() bit [15] to 0 which sets the next ACOK rising deglitch time to be 150 ms. The purpose of the default 1.3 s rising edge deglitch time is to turn off the ACFET long enough when the ACDET pin is pulled below 2.4 V by excessive system current, such as overcurrent or short circuit.

VCC

> UVLO

ACDET

– V

SRN

< 3.15 V (not in ACOVP condition, nor in low input voltage condition)

> 275 mV (not in sleep mode)

9.3.2 Adapter Overvoltage (ACOVP)

When the ACDET pin voltage is higher than 3.15 V, it is considered as adapter overvoltage. ACOK will be pulled low, and charge will be disabled. ACFET will be turned off to disconnect the high voltage adapter to system during ACOVP. BATFET will be turned on if turnon conditions are valid. See System Power Selection for details.

When ACDET pin voltage falls below 3.15 V and above 2.4 V, it is considered as adapter voltage returns back to normal voltage. ACOK will be pulled high by external pullup resistor. BATFET will be turned off and ACFET and RBFET will be turned on to power the system from adapter. The charge can be resumed if enable charge conditions are valid. See Enable and Disable Charging for details.

9.3.3 System Power Selection

The bq24735 automatically switches adapter or battery power to system. The battery is connected to system at POR if battery exists. The battery is disconnected from system and the adapter is connected to system after default 150 ms delay (first time, the next time default is 1.3 s and can be changed to 150 ms) if ACOK goes HIGH. An automatic break-before-make logic prevents shoot-through currents when the selectors switch.

The ACDRV drives a pair of common-source (CMSRC) N-channel power MOSFETs (ACFET and RBFET) between adapter and ACP (see Figure 16 for details). The ACFET separates adapter from battery or system, and provides a limited DI/DT when plugging in adapter by controlling the ACFET turnon time. Meanwhile it protects adapter when system or battery is shorted. The RBFET provides negative input voltage protection and battery discharge protection when adapter is shorted to ground, and minimizes system power dissipation with its low R

compared to a Schottky diode.

DS(on)

When the adapter is not present, ACDRV is pulled to CMSRC to keep ACFET and RBFET off, disconnecting adapter from system. BATDRV stays at V

+ 6 V to connect battery to system if all the following conditions are

SRN

valid:

• V

> UVLO

VCC

> UVLO

SRN

< 200 mV above V

ACN

(ACN_SRN comparator)

SRN

Approximately 150 ms (first time; the next time default is 1.3 s and can be changed to 150 ms) after the adapter is detected (ACDET pin voltage from 2.4 V to 3.15 V), the system power source begins to switch from battery to adapter if all the following conditions are valid:

• Not in LEARN mode or in LEARN mode and V

is lower than battery depletion threshold

SRN

• ACOK high

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+ 32 hidden pages

Texas Instruments BQ24735RGRR Schematic [ru]

1 Features 2 Applications

3 Description

Table of Contents

4 Revision History

5 Description (continued)

6 Pin Configuration and Functions

7 Specifications

7.1 Absolute Maximum Ratings

7.2 ESD Ratings

7.3 Recommended Operating Conditions

7.4 Thermal Information

7.5 Electrical Characteristics

7.6 Timing Requirements

7.7 Typical Characteristics

8 Parameter Measurement Information

9 Detailed Description

9.1 Overview

9.2 Functional Block Diagram

9.3 Feature Description

9.3.1 Adapter Detect and ACOK Output

9.3.2 Adapter Overvoltage (ACOVP)

9.3.3 System Power Selection