TEXAS INSTRUMENTS bq20851-v1p2 Technical data

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

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FEATURES

D Provides Accurate Measurement of Available

Charge in Li-Ion and Li-Polymer Batteries

D Supports the Smart Battery Specification

(SBS) V1.1

D Integrated Time Base Removes Need for

External Crystal

D Works With the TI bq29311 Analog Front End

(AFE) Protection IC to Provide Complete Pack Electronics for 10.8-V or 14.4-V Battery Packs With Few External Components

D Based on a Powerful Low-Power RISC CPU

Core With High-Performance Peripherals

D Integrated Flash Memory Eliminates the Need

for External Configuration EEPROM

D Measures Charge Flow Using a High

Resolution 16-Bit Integrating Converter

− Better Than 3-nVh of Resolution

− Self-Calibrating

− Offset Error Less Than 1-µV

D Uses 16-Bit Delta Sigma Converter for

Accurate Voltage and Temperature Measurements

D Programmable Cell Modeling for Maximum

Battery Fuel Gauge Accuracy

D Drives 3-, 4-, or 5-Segment LED Display for

Remaining Capacity Indication

D 38-Pin TSSOP (DBT)

APPLICATIONS

D Notebook PCs

DESCRIPTION

The bq20851−V1P2 SBS-compliant gas gauge IC for battery pack installation maintains an accurate record of available charge in Li-ion or Li-polymer batteries. The bq20851−V1P2 monitors capacity and other critical parameters of the battery pack and reports the information to the system host controller over a serial communication bus. It is designed to work with the bq29311 analog front-end (AFE) protection IC to maximize functionality and safety and minimize component count and cost in smart battery circuits. Using information from the bq20851−V1P2, the host controller can manage remaining battery power to extend the system run time as much as possible.

BLOCK DIAGRAM

Pack+

SMBus

Temp

Sensor

512 Bytes

Config.

Flash

EPROM

Pack−

semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Supply Voltage

bq20851−V1P2

ADC

Voltage

Integrating

ADC Coulomb Counting

Charge/Discharge

Power FETs

Glueless Interface

Cell Inputs

Safety Control

LDO

bq29311

Level

Translator

− +

Li-Ion

−

Cells

−

Sense Resistor (10 mΩ - 20 mΩ)

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DESCRIPTION (CONTINUED)

The bq20851−V1P2 uses an integrating converter with continuous sampling for the measurement of battery charge and discharge currents. Optimized for coulomb counting in portable applications, the self-calibrating integrating converter has a resolution better than 3-nVh and an offset measurement error of less than 1-µV (typical). For voltage and temperature reporting, the bq20851−V1P2 uses a 16-bit A-to-D converter. In conjunction with the bq29311, the onboard ADC also monitors individual cell voltages in a battery pack and allows the bq20851−V1P2 to generate the control signals necessary to implement the cell balancing and the required safety protection for Li-ion and Li-polymer battery chemistries.

The bq20851−V1P2 supports the Smart Battery Data (SBData) commands and charge-control functions. It communicates data using the System Management Bus (SMBus) 2-wire protocol. The data available include the battery’s remaining capacity, temperature, voltage, current, and remaining run-time predictions. The bq20851−V1P2 provides LED drivers and a push-button input to depict remaining battery capacity from full to empty in 20%, 25%, or 33% increments with a 3-, 4-, or 5-segment display.

The bq20851−V1P2 contains 512 bytes of internal data flash memory, which store configuration information. The information includes nominal capacity and voltage, self-discharge rate, rate compensation factors, and other programmable cell-modeling factors used to accurately adjust remaining capacity for use-conditions based on time, rate, and temperature. The bq20851−V1P2 also automatically calibrates or learns the true battery capacity in the course of a discharge cycle from programmable near full to near empty levels.

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The bq29311 AFE protection IC provides power to the bq20851−V1P2 from a 3 or 4 series Li-ion cell stack, eliminating the need for an external regulator circuit.

TSSOP PACKAGE

(TOP VIEW)

VIN

LED5 LED4 LED3

SCLK

VDDD

SDATA

VSSD

SAFE

SMBC SMBD

DISP

EVENT

VSSD

NC − No internal connection

−20°C to 85°C bq20851DBT−V1P2

(1)

The bq20851−V1P2 is available taped and reeled. Add an R suffix to the device type (e.g., bq20851DBTR−V1P2) to order tape and reel version.

3 4 5 6

N/C

7 8

RBI

9 10 11 12

N/C

14 15 16 17 18 19

AVAILABLE OPTIONS

PACKAGE

38-PIN TSSOP

38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20

(DBT)

VSSD LED1 LED2 CLKOUT VSSA ROSC FILT VDDA VSSA VSSP SR1 SR2 MRST N/C N/C N/C N/C N/C N/C

(1)

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I/O

DESCRIPTION

LED display segments that each may drive an external LED Connections for a small-value sense resistor to monitor the battery charge- and discharge-current flow

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Terminal Functions

TERMINAL

NAME No.

CLKOUT 35 I 32.768-kHz output to the bq29311 DISP 17 I Display control for the LED drivers LED1 through LED5 FILT 32 I Analog input connected to the external PLL filter EVENT 18 I Input from bq29311 XALER T output LED1 37 O LED2 36 O LED3 5 O LED4 4 O LED5 3 O MRST 26 I Master reset input that forces the device into reset when held high

N/C

RBI 9 I ROSC 33 I Internal time base bias input

SAFE 12 O Output for additional level of safety protection; e.g., fuse blow. SCLK 6 O Communication clock to the bq29311 SDATA 10 I/O Data transfer to and from bq29311 SMBC 15 I/O SMBus clock open-drain bidirectional pin used to clock the data transfer to and from the bq20851−V1P2 SMBD 16 I/O SMBus data o p e n - d r ain bidirectional pin used to transfer address and data to and from the bq20851−V1P2 SR1 28 I SR2 27 I TS 2 I Thermistor voltage input connection to monitor temperature VDDA 31 I Positive supply for analog circuitry VDDD 8 I Positive supply for digital circuitry and I/O pins VIN 1 I Single cell voltage input from the bq29311 VSSA 30, 34 I Negative supply for analog circuitry VSSD 11, 19, 38 I Negative supply for digital circuitry VSSP 29 I Negative supply for output circuitry

20−24, 7, 13,

14, 25,

LED display segments that each may drive an external LED

− No connection Register backup that provides backup potential to the bq20851−V1P2 data registers during periods of low

operating voltage. RBI accepts a storage capacitor or a battery input.

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ESD rating

SLUS575 − AUGUST 2003

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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ABSOLUTE MAXIMUM RATINGS

(2)

, and V

(1)

UNITS

−0.3 V to 6 V

−0.3 V to VDD + 0.3 V

−20°C to 85°C

−65°C to 150°C

(SSP).

over operating free-air temperature (unless otherwise noted)

Supply voltage range, VDD relative to V Open-drain I/O pins, V Input voltage range to all other pins, VI relative to VSS Operating free-air temperature range, T Storage temperature range, T

HBM 1.5 kV

ESD rating

(1)

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , a nd functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .

(2)

VSS refers to the common node of V

CDM 1.5 kV MM 50 V

relative to VSS

(IOD)

stg

(SSA)

(2)

, V

(SSD)

ELECTRICAL CHARACTERISTICS

VDD = 3.0 V to 3.6 V , TA = −20°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(SLP)

(OLS)

(ILS)

(IHS)

(AI)

(AI1)

(AI2)

Power-On Reset (see Figure 1)

IT−

hys

Supply voltage V Operating current No flash programming 350 µA Low-power storage mode current Hibernate mode 1 µA Output voltage low: (LED1−LED5) I Input voltage low DISP −0.3 0.8 V Input voltage high DISP 2 VCC + 0.3 V Output voltage low SMBC, SMBD, SDATA, SCLK,

EVENT, SAFE Input voltage low SMBC, SMBD, SDATA, SCLK,

EVENT, SAFE Input voltage high SMBC, SMBD, SDATA, SCLK,

EVENT, SAFE Input voltage range VIN, TS, OC VSS − 0.3 1.0 V Input impedance SR1, SR2 0 V–1.0 V 10 MΩ Input impedance VIN, TS, OC 0 V–1.0 V 8 MΩ

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Negative-going voltage input 2.1 2.3 2.5 V Power-on reset hysteresis 50 125 210 mV

and V

DDA

(OLS)

IOL = 0.5 mA 0.4 V

DDD

= 10 mA 0.4 V

3.0 3.3 3.6 V

−0.3 0.8 V

1.7 6 V

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Frequency error

(1)

2.50

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POR BEHAVIOR

FREE-AIR TEMPERATURE

150

2.45

2.40

2.35

2.30

2.25

2.20

− Negative-Going Input Threshold Voltage − V

2.15

IT−

2.10

−20 −5 10 25 40 55 70 85

IT−

TA − Free-Air Temperature − °C

hys

145

140

135

130

125

120

115

110

− Hysteresis Voltage − mV hys

Figure 1

INTEGRATING ADC CHARACTERISTICS

VDD = 3.0 V to 3.6 V , TA = −20°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(SR)

(SROS)

INL Integral nonlinearity error 0.003% 0.009%

Input voltage range, V Input offset 1 µV

(SR2)

and V

(SR1)

VSR = V

(SR2)

– V

(SR1)

–0.3 1.0 V

PLL SWITCHING CHARACTERISTICS

VDD = 3.0 V to 3.6 V , TA = −20°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Start-up time

(sp)

(1)

The frequency error is measured from 32.768 Hz.

Internal Oscillator

VDD = 3.0 V to 3.6 V , TA = −20°C to 85°C (unless otherwise noted)

(exo)

Start-up time

(sxo)

(1)

The frequency error is measured from 32.768 Hz.

(2)

The start-up time is defined as the time it takes for the oscillator output frequency to be ±1%.

(1)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(2)

±0.5% frequency error 2 5 ms

VDD = 3.3 V −1% 1%

−2% 2%

275 µs

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Data hold time

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SMBUS TIMING SPECIFICATIONS

VDD = 3.0 V to 3.6 V , TA = −20°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SMB

MAS

BUF

hd(STA)

su(STA)

su(STO)

hd(DAT)

su(DA)

TIMEOUT

low

high

low(SEXT)

low(MEXT)

(1)

The bq20851−V1P2 times out when any clock low exceeds t

(2)

Max. is minimum bus idle time. SMBC = 1 for t > 125 ms causes reset of any transaction involving bq20851−V1P2 that is in progress.

high

(3)

low(SEXT)

(4)

low(MEXT

(5)

Rise time, tr = (V

(6)

Fall time, tf = 0.9 VDD to (V

SMBus operating frequency Slave mode, SMBC 50% duty cycle 10 100 kHz SMBus master clock frequency Master mode, no clock low slave extend 51.2 kHz Bus free time between start and stop 4.7 µs Hold time after (repeated) start 4.0 µs Repeated start setup time 4.7 µs Stop setup time 4.0 µs

Receive mode 0

Transmit mode 300 Data setup time 250 ns Error signal/detect See Note 1 25 35 ms Clock low period 4.7 µs Clock high period See Note 2 0.05 125 ms Cumulative clock low slave extend time See Note 3 25 ms Cumulative clock low master extend time See Note 4 10 ms

Clock/data fall time See Note 5 300 ns Clock/data rise time See Note 6 1000 ns

TIMEOUT

is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.

) is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.

ILMAX

− 0.15 V) to (V ILMAX

− 0.15 V)

IHMIN

+ 0.15 V)

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DATA FLASH MEMORY SWITCHING CHARACTERISTICS

VDD = 3.0 V to 3.6 V , TA = −20°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(RETENSION)

(WORDPROG)

(DDPROG)

(1)

Specified by design. Not production tested.

(RBI)

(1)

Specified by design. Not production tested.

Data retention See Note 1 10 Years Flash programming write-cycles See Note 1 10 Word programming time See Note 1 2 ms Flash-write supply current See Note 1 14 16 mA

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

RBI data-retention input current (1) VRB > 3.0 V , VDD < V RBI data-retention voltage 1.3 V

10 100 nA

Cycles

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SMBUS TIMING DIAGRAMS

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SCLK

SDATA

(1)

SCLK

low

hd(STA)

hd(DAT)

is the acknowledge-related clock pulse generated by the master.

ACK

BUF

SCLK

SDATA

Start

low(MEXT)

high

SCLK

low(SEXT)

(ACK)

su(STA)

su(DAT)

(1)

low(MEXT)

hd(STA)

su(STO)

Stop

(ACK)

(1)

low(MEXT)

SCLK

Figure 2. SMBus Timing Diagram

FUNCTIONAL DESCRIPTION

Internal Oscillator

The internal oscillator performance is additionally dependent on the tolerance of the 113k resistor connected between RSOC (pin 33) and VSSA (pin 34). It is recommended that this resistor be as close to the bq20851−V1P2 as possible and that it have a specification of ±0.1% tolerance and ±50 ppm temperature drift or better. The layout of the PCBA is also an additional contributing factor to performance degradation.

The average temperature drift error of the oscillator function over a learning charge or discharge cycle introduces an equal capacity prediction error in a learned full charge capacity (FCC).

General Operation

The bq20851−V1P2 determines battery capacity by monitoring the amount of charge input or removed from a rechargeable battery. In addition to measuring charge and discharge, the bq20851−V1P2 measures battery voltage, temperature, and current, estimates battery self-discharge, and monitors the battery for low-voltage thresholds. The bq20851−V1P2 measures charge and discharge activity by monitoring the voltage across a small-value series sense resistor between the battery’s negative terminal and the negative terminal of the battery pack. The available battery charge is determined by monitoring this voltage and correcting the measurement for environmental and operating conditions.

The bq20851−V1P2 interfaces with the bq29311 to perform battery protection, cell balancing, and voltage translation functions.

The bq20851−V1P2 can accept any NTC thermistor (default is Semitec 103AT) for temperature measurement or can be configured to use its internal temperature sensor. The bq20851−V1P2 uses temperature to monitor the battery pack and to compensate the self-discharge estimate.

Measurements

The bq20851−V1P2 uses an integrating sigma-delta analog-to-digital converter (ADC) for current measurement and a second sigma delta ADC for battery voltage and temperature measurement. Voltage, current, and temperature measurements are made every second.

Charge and Discharge Counting

The integrating ADC measures the charge and discharge flow of the battery by monitoring a small-value sense resistor between the SR1 and SR2 pins as shown in the schematic. The integrating ADC measures bipolar signals from −0.3 to

1.0 V. The bq20851−V1P2 detects charge activity when VSR = V

(SR1)–V(SR2)

is positive and discharge activity when

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VSR = V

(SR1)–V(SR2)

is negative. The bq20851−V1P2 continuously integrates the signal over time, using an internal counter. The fundamental rate of the counter is 2.6 nVh. The bq20851−V1P2 updates Remaining Capacity() with the charge or discharge accumulated in this internal counter once every second.

Offset Calibration

The bq20851−V1P2 provides an autocalibration feature to cancel the voltage offset error across SR1 and SR2 for maximum charge measurement accuracy. The bq20851−V1P2 performs autocalibration when the SMBus lines stay low for a minimum of 20 s. The bq20851−V1P2 is capable of automatic offset calibration down to 1µV.

Digital Filter

The bq20851−V1P2 does not measure charge or discharge counts below the digital filter threshold. The digital filter threshold is programmed in the Digital Filter DF 0x2b and should be set sufficiently high to prevent false signal detection with no charge or discharge flowing through the sense resistor.

Voltage

While monitoring SR1 and SR2 for charge and discharge currents, the bq20851−V1P2 monitors the individual series cell voltages through the bq2931 1. The bq20851−V1P2 configures the bq29311 to present the selected cell to the VCELL pin of the bq29311 which should be connected to VIN of the bq20851−V1P2. The internal ADC of the bq20851−V1P2 then measures the voltage and scales it appropriately. The bq20851−V1P2 then reports the Voltage( ) and the individual cell voltages in VCELL1, VCELL2, VCELL3, and VCELL4 located in 0x3c−0x3f.

Current

The bq20851−V1P2 uses the SR1 and SR2 inputs to measure and calculate the battery charge and discharge current as represented in the data register Current().

Temperature

The TS input of the bq20851−V1P2 in conjunction with an NTC thermistor measures the battery temperature as shown in the schematic. The bq20851−V1P2 reports temperature in Temperature( ).

The bq20851−V1P2 can also be configured to use its internal temperature sensor by setting the IT bit in Misc Configuration DF 0x2a. Data flash locations DF 0xa4 through DF 0xad also have to be changed to prescribed values if the internal temperature sensor option is selected.

Table 1. Data Flash Settings for Internal or External Temperature Sensor

LABEL

Misc. Configuration 42 (0x2a) Bit 7 = 1 Bit 7 = 0

TS Const1 A3 164/5 (0xa4/5) 0 (0x0000) −28285 (0x9183) TS Const2 A2 166/7 (0xa6/7) 0 (0x0000) 20848 (0x5170) TS Const3 A1 168/9 (0xa8/9) −11136 (0xd480) −7537 (0xe28f) TS Const4 A0 170/1 (0xaa/b) 5734 (0x1666) 4012 (0x0fac)

Min temp AD 172/3 (0xac/d) 0 (0x0000) 0 (0x000)

Max temp 174/5 (0xae/f) 5734 (0x1666) 4012 (0x0fac)

LOCATION

Dec (Hex)

INTERNAL TEMP SENSOR SETTING

Dec (Hex)

EXTERNAL TEMP SENSOR SETTING

(Semitec 103AT)

Dec (Hex)

If AD < Min Temp AD then Temp = Max Temp else

Temp = [(A3 × AD × 2^ − 16 + A2) × AD × 2 ^ −16 + A1] × AD × 2 ^ −16 + A0

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Gas Gauge Operation

General

The operational overview in Figure 3 illustrates the gas gauge operation of the bq20851−V1P2. Table 3 describes the bq20851−V1P2 registers.

Inputs

Main Counters and

Capacity Reference (FCC)

Outputs

Charge

Current

Charge

Efficiency

Compensation

Battery Electronics

Load Estimate

− −

− ++

Remaining

Capacity

(RM)

Chip-Controlled

Available Charge

LED Display

≤

Discharge

Current

Full

Charge

Capacity

(FCC)

Temperature, Other Data

Two-Wire

Serial Port

Qualified

Transfer

Self-Discharge

Timer

Temperature

Compensation

Discharge

Count

(DCR)

Figure 3. bq20851−V1P2 Operational Overview

The bq20851−V1P2 accumulates a measure of charge and discharge currents and estimates self-discharge of the battery. The bq20851−V1P2 compensates the charge current measurement for temperature and state-of-charge of the battery . Th e bq20851−V1P2 also adjusts the self-discharge estimation based on temperature.

The main charge counter RemainingCapacity( ) (RM) represents the available capacity or energy in the battery at any given time. The bq20851−V1P2 adjusts RM for charge, self-discharge, and other compensation factors. The information in the RM register is accessible through the SMBus interface and is also represented through the LED display.

The FullChargeCapacity( ) (FCC) register represents the last measured full discharge of the battery. It is used as the battery full-charge reference for relative capacity indication. The bq20851−V1P2 updates FCC after the battery undergoes a qualified discharge from nearly full to a low battery level. FCC is accessible through the SMBus interface.

The Discharge Count Register (DCR) is a non-accessible register that tracks discharge of the battery. The bq20851−V1P2 uses the DCR register to update the FCC register if the battery undergoes a qualified discharge from nearly full to a low battery level. In this way, the bq20851−V1P2 learns the true discharge capacity of the battery under system use conditions.

Main Gas-Gauge Registers

The gas-gauge register functions are described in Table 3.

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(1)

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RemainingCapacity( ) (RM)

RM represents the remaining capacity in the battery. The bq20851−V1P2 computes RM in units of either mAh or 10 mWh depending on the selected mode. See Battery Mode( ) (0x03) for units configuration.

RM counts up during charge to a maximum value of FCC and down during discharge and self-discharge to a minimum of

0. In addition to charge and self-discharge compensation, the bq20851−V1P2 calibrates RM at three low-battery-voltage thresholds, EDV2, EDV1, and EDV0 and three programmable midrange thresholds VOC25, VOC50, and VOC75. This provides a voltage-based calibration to the RM counter.

DesignCapacity( ) (DC)

DC is the user-specified battery full capacity. It is calculated from Pack Capacity DF 0x31-0x32 and is represented in units of mAh or 10 mWh. It also represents the full-battery reference for the absolute display mode.

FullChargeCapacity( ) (FCC)

FCC is the last measured discharge capacity of the battery. It is represented in units of either mAh or 10 mWh, depending on the selected mode. On initialization, the bq20851−V1P2 sets FCC to the value stored in Last Measured Discharge DF 0x35-0x36. During subsequent discharges, the bq20851−V1P2 updates FCC with the last measured discharge capacity of the battery. The last measured discharge of the battery is based on the value in the DCR register after a qualified discharge occurs. Once updated, the bq20851−V1P2 writes the new FCC value to data flash in mAh to Last Measured Discharge. FCC represents the full battery reference for the relative display mode and relative state of charge calculations.

Discharge Count Register (DCR)

The DCR register counts up during discharge, independent of RM. DCR counts discharge activity, battery load estimation, and self-discharge increment. The bq20851−V1P2 initializes DCR, at the beginning of a discharge, to FCC − RM when RM is within the programmed value in Near Full DF 0x2f. The DCR initial value of FCC − RM is reduced by FCC/128 if SC = 1 (bit 5 in Gauge Configuration) and is not reduced if SC = 0. DCR stops counting when the battery voltage reaches the EDV2 threshold on discharge.

Capacity Learning (FCC Update) and Qualified Discharge

The bq20851−V1P2 updates FCC with an amount based on the value in DCR if a qualified discharge occurs. The new value for FCC equals the DCR value plus the programmable nearly full and low battery levels, according to the following equation:

FCC (new) + DCR (final) + DCR (initial) ) Measured Discharge to EDV2 ) (FCC Battery Low%)

Battery Low % = ((value stored in DF 0x2e [MSByte] and 0xE3[LSByte]) x 2.56)/655.36 A qualified discharge occurs if the battery discharges from RM ≥ FCC – Near Full to the EDV2 voltage threshold with the

following conditions:

D No valid charge activity occurs during the discharge period. A valid charge is defined as a charge of 10 mAh into the

battery.

D No more than 256 mAh of self-discharge or battery load estimation occurs during the discharge period. D The temperature does not drop below the low temperature thresholds programmed in Learning Low Temp DF 0x9b

during the discharge period.

D The battery voltage reaches the EDV2 threshold during the discharge period and the voltage is greater than or equal

to the EDV2 threshold minus 256 mV when the bq20851−V1P2 detected EDV2.

D No midrange voltage correction occurs during the discharge period. D Current remains ≥ 3C/32 when EDV2 or Battery Low % level is reached. D No overload condition exists when EDV2 threshold is reached or if RM( ) has dropped to Battery Low% *FCC.

The bq20851−V1P2 sets VDQ=1 in pack status when qualified discharge begins. The bq20851−V1P2 sets VDQ=0 if any disqualifying condition occurs. FCC cannot be reduced by more than 256 mAh or increased by more than 512 mAh during any single update cycle. The bq20851−V1P2 saves the new FCC value to the data flash immediately.

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End-of-Discharge Thresholds and Capacity Correction

The bq20851−V1P2 monitors each cell for four low-voltage thresholds. From highest to lowest, these are EDV2, EDV1, EDV0 and Cell Under Voltage. EDV2 and EDV1 are calculated as a function of the various CEDV coefficients along with the present discharge rate, temperature and relative state of charge (RSOC). EDV2 is the variable voltage threshold that corresponds to the RSOC value stored in Battery Low %. This is typically 3−4%. EDV1 is the variable voltage threshold that corresponds to RSOC = 0%. EDV0 and Cell Under Voltage are typically fixed at 3.0 V and 2.75 V respectively. EDV0 sets the Terminate Discharge Alarm (TDA) bit. Cell Under Voltage causes shutdown of both the bq20851−V1P2 and the bq29311. The various low-voltage thresholds are determined on the basis of the lowest single-cell voltage.

The bq20851−V1P2 disables EDV detection if Current( ) exceeds the Overload Current threshold programmed in DF 0x58

− DF 0x59. The bq20851−V1P2 resumes EDV threshold detection after Current( ) drops below the Overload Current threshold. Any EDV threshold detected is reset after charge is applied and VDQ is cleared after 10 mAh of charge.

Table 2. State of Charge Based on Low Battery Voltage

THRESHOLD RELA TIVE STA TE OF CHARGE

EDV0 0% (Terminate Discharge Alarm) EDV1 0% (Fully Discharged Flag) EDV2 Battery Low %

The bq20851−V1P2 uses the EDV thresholds to apply voltage-based corrections to the RM register according to Table 2. The bq20851−V1P2 adjusts RM as it detects each threshold. If the voltage threshold is reached before the corresponding capacity on discharge, the bq20851−V1P2 reduces RM to the appropriate amount as shown in Table 2. If RM reaches the capacity level before the voltage threshold is reached on discharge, the bq20851−V1P2 prevents RM from decreasing further until the battery voltage reaches the corresponding threshold.

If 0% RSOC occurs before the EDV1 threshold voltage is reached, then the Fully Discharged (FD) bit will be set. This is to accommodate the case of a partial charge/discharge cycle. When a partial charge is performed, the portion of the cell lattice structure that receives the charge has a lower series resistance than the sections that are charged later in the charge cycle. The subsequent discharge therefore provides a higher voltage as a function of remaining capacity than would be the case after a full charge. The coulometric value is more accurate than the voltage in this case.

Table 3. bq20851−V1P2 Register Functions

FUNCTION COMMAND CODE ACCESS UNITS

ManufacturerAccess 0x00 read/write NA RemainingCapacityAlarm 0x01 read/write mAh, 10 mWh RemainingTimeAlarm 0x02 read/write minutes BatteryMode 0x03 read/write NA AtRate 0x04 read/write mA, 10mW AtRateTimeToFull 0x05 read minutes AtRateTimeToEmpty 0x06 read minutes AtRateOK 0x07 read Boolean Temperature 0x08 read 0.1°K Voltage 0x09 read mV Current 0x0a read mA AverageCurrent 0x0b read mA MaxError 0x0c read percent RelativeStateOfCharge 0x0d read percent AbsoluteStateOfCharge 0x0e read percent RemainingCapacity 0x0f read mAh, 10 mWh FullChargeCapacity 0x10 read mAh, 10 mWh RunTimeToEmpty 0x11 read minutes AverageTimeToEmpty 0x12 read minutes AverageTimeToFull 0x13 read minutes

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Table 3. bq20851−V1P2 Register Functions (Continued)

FUNCTION COMMAND CODE ACCESS UNITS

ChargingCurrent 0x14 read mA ChargingVoltage 0x15 read mV Battery Status 0x16 read NA CycleCount 0x17 read cycles DesignCapacity 0x18 read mAh, 10 mWh DesignVoltage 0x19 read mV SpecificationInfo 0x1a read NA ManufactureDate 0x1b read NA SerialNumber 0x1c read integer Reserved 0x1d-0x1f 0 0 ManufacturerName 0x20 read string DeviceName 0x21 read string DeviceChemistry 0x22 read string ManufacturerData 0x23 read string Pack status 0x2f (LSB) read NA Pack configuration 0x2f (MSB) read NA VCELL4 0x3c read mV VCELL3 0x3d read mV VCELL2 0x3e read mV VCELL1 0x3f read mV

Self-Discharge

The bq20851−V1P2 estimates the self-discharge of the battery to maintain an accurate measure of the battery capacity during periods of inactivity. The bq20851−V1P2 makes self-discharge adjustments to RM( ) every 1/4 seconds when awake and periodically when in sleep mode. The period is determined by Sleep Timer DF 0xe7.

The self-discharge estimation rate for 25°C is doubled for each 10 degrees above 25°C or halved for each 10 degrees below 25°C. The following table shows the relation of the self-discharge estimation at a given temperature to the rate programmed for 25°C (Y% per day programmed in DF 0x2c).

Table 4. Self-Discharge for Rate Programmed

TEMPERATURE

(°C)

Temp < 10 1/4 Y% per day 10 ≤ Temp <20 1/2 Y% per day 20 ≤ Temp <30 Y% per day 30 ≤ Temp <40 2Y% per day 40 ≤ Temp <50 4Y% per day 50 ≤ Temp <60 8Y% per day 60 ≤ Temp <70 16Y% per day

70≤ Temp 32Y% per day

SELF-DISCHARGE RATE

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CAPACITY

TIME

1200

1000

800

600

Capacity − mAh

400

200

TA = 35°C

010203040

TA = 45°C

TA = 15°C

TA = 25°C

50 60 70

t − Time − Days

Figure 4. Self-Discharge at 2.5%/Day at 25°C

Figure 4 illustrates how the self-discharge estimate algorithm adjusts RemainingCapacity( ) versus temperature.

Battery Electronic Load Compensation

The bq20851−V1P2 can be configured to compensate for a constant load (as from battery electronics) present in the battery pack at all times. The bq20851−V1P2 applies the compensation continuously when the charge or discharge is below the digital filter . The bq20851−V1P2 applies the compensation in addition to self-discharge. The compensation occurs at a rate determined by the value stored in Electronics Load DF 0x2d. The compensation range is 0 µA–765 µA in steps of approximately 3 µA.

Midrange Capacity Corrections

The bq20851−V1P2 applies midrange capacity corrections when the VCOR bit is set in Gauge Configuration DF 0x29. The bq20851−V1P2 adjusts RM to the associated percentage at three different voltage levels: VOC25, VOC50, and VOC75. The VOC values represent the open circuit battery voltage at which RM corresponds to the associated for each threshold.

For the midrange corrections to occur, the temperature must be in the range of 19°C to 31°C inclusive and the Current( ) and AverageCurrent() must both be between −64 mA and 0. The bq20851−V1P2 makes midrange corrections as shown in Table 5. For a correction to occur, the bq20851−V1P2 must detect the need for correction twice during subsequent 20-s intervals. Wit h t h e V COR bit set, the bq20851−V1P2 makes midrange corrections whenever conditions permit. If the OTVC bit in Gauge Configuration DF 0x29 is set and VCOR = 0, the bq20851−V1P2 makes a single attempt of mid-range correction immediately after device reset and does not require a second validation.

Table 5. Midrange Corrections

CONDITION RESULT

Voltage() ≥ VOC75 and RelativeStateOfCharge( ) ≤ 63% RelativeStateOfCharge()→75%

< VOC75 and RelativeStateOfCharge( ) ≥ 87% RelativeStateOfCharge()→75% ≥VOC50 and RelativeStateOfCharge( ) ≤ 38% RelativeStateOfCharge()→50% <VOC50 and RelativeStateOfCharge( ) ≥ 62% RelativeStateOfCharge()→50% ≥ VOC25 and RelativeStateOfCharge( ) ≤ 13% RelativeStateOfCharge()→25% < VOC25 and RelativeStateOfCharge( ) ≥ 37% RelativeStateOfCharge()→25%

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Charge Control

Charging Voltage and Current Broadcasts

The bq20851−V1P2 supports SBS charge control by broadcasting the ChargingCurrent( ) and ChargingVoltage( ) to the Smart Charger address. The bq20851−V1P2 broadcasts the requests every 10 seconds. The bq20851−V1P2 updates the values used in the charging current and voltage broadcasts based on the battery’s state of charge, voltage, and temperature. The charge voltage is programmed in Charging Voltage DF 0x039-0x3a. The charge current may take any of four different values: Fast Charging Current DF (0x3d–0x3c), Maintenance Charging Current (DF 0x3f), Precharge Current (0x41), or 0. The charge current depends on charge state and operating conditions.

The bq20851−V1P2 internal charge control is compatible with the constant current/constant voltage profile for Li-Ion. The bq20851−V1P2 detects primary charge termination on the basis of the tapering charge current during the constant-voltage phase.

Alarm Broadcasts to Smart Charger and Host

If any of the bits 8−15 in BatteryStatus( ) are set, the bq20851−V1P2 broadcasts an AlarmWarning( ) message to the Host address. If any of the bits 12−15 in BatteryStatus( ) are set, the bq20851−V1P2 also sends an AlarmWarning( ) message to the Smart Charger address. The bq20851−V1P2 repeats the AlarmWarning() messages every 10 seconds until the alarm bits are cleared.

Precharge Qualification

The bq20851−V1P2 sets ChargingCurrent( ) to the precharge rate as programmed in Precharge Current DF 0x41 under the following conditions:

D Voltage: The bq20851−V1P2 requests the precharge charge rate when Voltage( ) drops below the precharge threshold

or when the EDV0 threshold is detected. Once requested, a precharge rate remains until Voltage( ) increases above the precharge threshold and the EDV0 condition does not exist. The precharge threshold is programmed in Precharge Voltage DF 0x3b−0x3c.

D Temperature: The bq20851−V1P2 requests the precharge rate when Temperature( ) is between 0°C and the precharge

threshold programmed in Precharge Temp 0x43. Temperature( ) must be equal to or greater than the precharge threshold to allow the fast-charge rate.

Charge Suspension

The bq20851−V1P2 may temporarily suspend charge if it detects a charging fault. A charging fault includes the following conditions.

D Overcurrent: An overcurrent condition exists when the bq20851−V1P2 measures the charge current to be equal to or

greater than Overcurrent Margin plus ChargingCurrent( ). Overcurrent Margin is programmed in DF 0x5c−0x5d. On detecting an overcurrent condition, the bq20851−V1P2 sets the ChargingCurrent( ) to zero and sets the TERMINATE_CHARGE_ALARM bit in Battery Status( ). The overcurrent condition and TERMINATE_ CHARGE_ALARM are cleared when the measured current drops below Overcurrent Margin.

D Overvoltage: An overvoltage condition exists when the bq20851−V1P2 measures the battery voltage to be more than

Over Voltage Margin plus ChargingV oltage(), or when a cell voltage has exceeded the overvoltage limit programmed in Cell Over Voltage. Over Voltage Margin is programmed in DF 0x5a−0x5b and Cell Over Voltage in DF 0x60. On detecting an overvoltage condition, the bq20851−V1P2 sets the ChargingCurrent( ) to zero and sets the TERMINATE_CHARGE_ALARM bit in BatteryStatus( ). The bq20851−V1P2 clears the TERMINATE_ CHARGE_ALARM bit when it detects that the battery is no longer being charged (DISCHARGING bit set in BatteryStatus( )). The bq20851−V1P2 continues to broadcast zero charging current until the overvoltage condition is cleared. The overvoltage condition is cleared when the measured battery voltage drops below the ChargingVoltage( ) plus the Over Voltage Margin and all cell voltages are less than the Cell Over V oltage Reset threshold in DF 0xcf, 0xd0.

D Overtemperature: An overtemperature condition exists when Temperature( ) is greater than or equal to the Max

Temperature value programmed in DF 0x53, 0x54. On detecting an overtemperature condition, the bq20851−V1P2

sets the ChargingCurrent( ) to zero and sets the OVER_TEMP_ALARM and TERMINATE_CHARGE_ ALARM bit in BatteryStatus( ) and the CVOV bit in pack status. The overtemperature condition is cleared when Temperature( ) is equal to or below (Max Temperature − Temperature Hysteresis DF 0x55, 0x56) or 43°C.

D Overcharge: An overcharge condition exists if the battery is charged more than the Maximum Overcharge value after

RM = FCC. Maximum Overcharge is programmed in DF 0x4e-0x4f. On detecting an overcharge condition, the bq20851−V1P2 sets the ChargingCurrent( ) to zero and sets the OVER_CHARGED_ALARM, TERMINATE_CHARGE_ ALARM, and FULLY_CHARGED bits in BatteryStatus( ). The bq20851−V1P2 clears the

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TERMINATE_CHARGE_ ALARM when it detects that the battery is no longer being charged and clears the OVER_CHARGED_ALARM when 2mAh of discharge are measured. The FULLY_CHARGED bit remains set and the bq20851−V1P2 continues to broadcast zero charging current until RelativeStateOfCharge( ) is less than Fully Charged Clear% programmed in DF 0x47. The counter used to track overcharge capacity is reset with 2 mAh of discharge.

D Undertemperature: An undertemperature condition exists if Temperature( ) < 0°C. On detecting an under temperature

condition, the bq20851−V1P2 sets ChargingCurrent( ) to zero. The bq20851−V1P2 sets ChargingCurrent( ) to the appropriate precharge rate or fast-charge rate when Temperature( ) ≥ 0°C.

Primary Charge Termination

The bq20851−V1P2 terminates charge if it detects a charge-termination condition based on current taper. A charge-termination condition includes the following:

For current taper, ChargingVoltage( ) must be set to the pack voltage desired during the constant-voltage phase of charging. The bq20851−V1P2 detects a current taper termination when the pack voltage is greater than or equal to ChargingVoltage( ) minus Current Taper Qual Voltage in DF 0x4a and the charging current is below a threshold determined by Current Taper Threshold in DF 0x48−0x49 and above 22.5 mA for two consecutive 40-second intervals.

Once the bq20851−V1P2 detects a Primary Charge Termination, the bq20851−V1P2 sets the TERMINATE_CHARGE_ALARM and FULLY_CHARGED bits in BatteryStatus( ), and sets the ChargingCurrent( ) to the maintenance charge rate as programmed in Maintenance Charging Current DF 0x3f, 0x40. On termination, the bq20851−V1P2 also sets RM to a programmed percentage of FCC, provided that RelativeStateOfCharge( ) is below the desired percentage of FCC and the CSYNC bit in Gauge Configuration DF 0x29 is set. The programmed percentage of FCC, Fast Charge Termination %, is set in DF 0x46. The bq20851−V1P2 clears the FULLY_CHARGED bit when RelativeStateOfCharge( ) is less than the programmed Fully Charged Clear %. The bq20851−V1P2 broadcasts the fast-charge rate when the FULLY_CHARGED bit is cleared and voltage and temperature permit. The bq20851−V1P2 clears the TERMINATE_CHARGE_ALARM when it no longer detects that the battery is being charged or it no longer detects the termination condition. See Table 6 for a summary of BatteryStatus( ) alarm and status bit operation.

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V()= CV() + Over Voltage Margin

Capacity added after RM() = FCC() =

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Table 6. Alarm and Status Bit Summary

BATTERY

STATE

Overcurrent C() = CC() + OvercurrentMargin CC() = 0, TCA = 1 C() < OvercurrentMargin Prolonged

Overcurrent Overload AC() = –OverloadCurrent CVUV = 1 AC() < –0 mA

Overvoltage

Overtemperature T() = Max Temperature

Overcharge

Undertemperature T() < 0°C CC() = 0 0°C =>T()

Primary Charge Termination

Fully Discharged Overdischarged V() <= EDV0 or Terminate Voltage TDA = 1 V() > T erminate Voltage and Charging Current > 0

Low Capacity RM() < RCA() RCA = 1 RM() = RCA() Low Run Time ATTE() < R TA() RTA = 1 ATTE() = RTA()

NOTE:AC() = AverageCurrent(), C() = Current(), CV() = ChargingV oltage(), CC() = ChargingCurrent(), V() = Voltage(), T() = Temperature(),

TCA = TERMINATE_CHARGE_ALARM, OTA = OVER_TEMPERATURE_ALARM, OCA = OVER_CHARGED_ALARM, TDA = TERMINATE_DISCHARGE_ALARM, FC = FULLY_CHARGED, FD = FULLY_DISCHARGED, RSOC() = RelativeStateOfCharge(). RM() = RemainingCapacity(), RCA = REMAINING_CAPACITY_ALARM, R TA = REMAINING_TIME_ALARM, ATTE() = AverageTimeToEmpty(), RTA() = RemainingTimeAlarm(), RCA() = RemainingCapacityAlarm(). LTF = Low Temperature Fault threshold FCC() = Full Charge Capacity

AC() = Fast−ChargingCurrent + OvercurrentMargin

VCELL1, 2, 3, or 4 = Cell Over Voltage

MaximumOvercharge

0°C = T() < L TF CC() = Precharge T() = LTF + DF 0x44 (default = 3°C)

Current taper

RM() = 0 % and DISCHARGING = 1

CONDITIONS

Cell Balancing

The bq20851−V1P2 balances the cells during charge by discharging those cells above the threshold set in Cell Balance Threshold DF 0xd7−0xd8, if the maximum dif ference in cell voltages exceeds the value programmed in Cell Balance Min

DF 0xdb. For cell balancing, the bq20851−V1P2 measures the cell voltages at an interval set in Cell Balance Interval DF 0xdc. On the basis of the cell voltages, the bq20851−V1P2 either selects the appropriate cell to discharge or adjusts the cell balance threshold up by the value programmed in Cell Balance Window 0xd9−0xda when all cells exceed the cell balance threshold or the highest cell exceeds the cell balance threshold by the cell balance window .

The cell balance threshold is reset to the value in Cell Balance Threshold at the start of every charge cycle. The threshold can be adjusted no more than once during a balance interval.

DISPLAY PORT

General

The display port drives a 5-LED bar-graph display. The display is activated by a logic signal on the DISP input. The bq20851−V1P2 can display RemainingCapacity() in either a relative or absolute mode with each LED representing a percentage o f the full-battery reference. In relative mode, the bq20851−V1P2 uses FullChargeCapacity() as the full-battery reference; in absolute mode, it uses Design Capacity (DC). The DMODE bit in Pack Configuration DF 0x28 programs the bq20851−V1P2 for the absolute or relative display mode.

Activation

Activation is usually accomplished with a pullup resistor and a pushbutton switch. Detection of the transition activates the display. Reactivation of the display requires that the DISP input return to a logic-high state and then transition low again. The second high-to-low transition can be detected only after the display timer expires. If unused, the DISP input must be pulled up t o VCC. The DISP input is ignored if the bq20851−V1P2 detect charge activity , see charging mode below for further information.

CC() CURRENT AND

STATUS BITS SET

CVOV = 1 CC() = 0, TCA = 1

TCA = 1 DISCHARGING = 1 CC() = 0, CVOV = 1 CC() = 0, OTA = 1,

TCA = 1, CVOV = 1 CC() = 0, FC = 1 RSOC()< Fully Charged Clear %

OCA = 1, TCA = 1

FC = 1, TCA = 1 CC() = Maintenance ChargingCurrent

FD = 1 RSOC() = 20%

AC() < 0 mA

V() < CV() + Over Voltage Margin VCELL(all) = Cell Over Voltage Reset

T() = Max T emperature –Temperature Hysteresis or T()= 43°C

DISCHARGING = 1, and 2 mAh of discharge is measured

RSOC() < Fully Charged Clear%

STATUS CLEAR CONDITION

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