communication interface (HDQ
bus) for critical battery
parameters
➤ Monitors and controls charge FET
in Li-Ion pack protection circuit
➤ Direct drive of remaining capacity
LEDs
➤ Measurements automatically
compensated for rate and
temperature
➤ 16-pin narrow SOIC
-
General Description
The bq2050H Lithium Ion Power
Gauge™ IC is intended for battery-
pack or in-system installation to
maintain an accurate record of
available battery capacity. The IC
monitors a voltage drop across a
sense resistor connected in series
between the negative battery termi
nal and ground to determine
charge and discharge activity of
the battery. Compensations for bat
tery temperature, self discharge,
and rate of discharge are applied to
the charge counter to provide avail
able capacity information across a
wide range of operating conditions.
Battery capacity is automatically re
calibrated, or “learned,” in the
course of a discharge cycle from full
to empty.
Nominal available capacity may be
directly indicated using a fivesegment LED display. These seg-
ments are used to graphically indi
cate available capacity. The
bq2050H also supports a simple
single-line bidirectional serial link
to an external processor (common
ground). The 5kb HDQ bus interface
reduces communications overhead
in the external microcontroller.
Internal registers include available
capacity, temperature, scaled avail
able energy, battery ID, battery
status, and Li-Ion charge FET
status. The external processor may
also overwrite some of the bq2050H
power gauge data registers.
The bq2050H can operate from the
batteries in the pack. The REF out
-
put and an external transistor allow
a simple, inexpensive voltage regulator to supply power to the circuit
from the cells.
-
-
-
Pin Connections
1
LCOM
SEG1/PROG
SEG2/PROG
SEG3/PROG
SEG4/PROG
SEG5/PROG
SLUS150–MAY 1999 D
1
2
3
4
5
CFC
V
SS
16-Pin Narrow SOIC
16
2
15
3
14
4
13
5
12
6
11
7
10
8
Pin Names
LCOMLED common output
/PROG1LED segment 1/
SEG
1
V
CC
REF
PSTAT
HDQ
RBI
SB
DISP
9
SR
PN2050H1.eps
/PROG2LED segment 2/
SEG
2
/PROG3LED segment 3/
SEG
3
/PROG4LED segment 4/
SEG
4
/PROG5LED segment 5/
SEG
5
CFCCharge FET control
program 1 input
program 2 input
program 3 input
program 4 input
program 5 input
output
1
V
SS
System ground
SRSense resistor input
DISP
Display control input
SBBattery sense input
RBIRegister backup input
HDQSerial communications
input/output
PSTATProtector status input
REFVoltage reference output
V
CC
Supply voltage
bq2050H
Pin Descriptions
LCOM
SEG
SEG
PROG
PROG
PROG
PROG
PROG
CFC
V
SS
SR
LED common output
This open-drain output switches V
source current for the LEDs. The switch is
off during initialization to allow reading of
the soft pull-up or pull-down program resis
tors. LCOM is also high impedance when the
display is off.
LED display segment outputs (dual func
–
1
tion with PROG
5
Each output may activate an LED to sink
the current sourced from LCOM.
Programmed full count selection inputs
–
1
(dual function with SEG
2
These three-level input pins define the pro
grammed full count (PFC) thresholds de
scribed in Table 2.
Power gauge scale selection inputs (dual
–
3
function with SEG
4
These three-level input pins define the scale
factor described in Table 2.
Self-discharge rate selection (dual func-
5
tion with SEG
This three-level input pin defines the
self-discharge and battery compensation factors as shown in Table 1.
Charge FET control output
This pin can be used as an additional control
to the charge FET of the Li-Ion pack protec
tion circuitry.
Ground
Sense resistor input
The voltage drop (V
sistor R
time to interpret charge and discharge activ
is monitored and integrated over
S
ity. The SR input is tied between the nega
tive terminal of the battery and the sense re
sistor. V
V
voltage drop, V
is V
SR<VSS
SR>VSS
SR+VOS
CC
–PROG5)
1
–SEG2)
1
–SEG4)
3
)
5
) across the sense re
SR
indicates discharge, and
indicates charge. The effective
, as seen by the bq2050H
SRO
.
to
-
-
-
-
-
-
-
-
-
DISP
SB
RBI
HDQ
PSTAT
REF
V
CC
Display control input
high disables the LED display. DISP
DISP
tied to VCCallows PROGXto connect di
rectly to V
pull-up or pull-down resistor. DISP
or VSSinstead of through a
CC
floating
allows the LED display to be active during
charge. DISP
low activates the display. See
Table 1.
Secondary battery input
This input monitors the battery cell voltage
potential through a high-impedance resis
tive divider network for end-of-discharge
voltage (EDV) thresholds and battery-removed
detection.
Register backup input
This pin is used to provide backup potential to
the bq2050H registers during periods when
V
3V. A storage capacitor or a battery
≤
CC
can be connected to RBI.
Serial communication input/output
This is the open-drain bidirectional communications port.
Protector status input
This input provides overvoltage status from
the Li-Ion protector circuit. It should connect to V
when not used.
SS
Voltage reference output for regulator
REF provides a voltage reference output for
an optional micro-regulator.
Supply voltage input
-
-
2
bq2050H
Functional Description
General Operation
The bq2050H determines battery capacity by moni
toring the amount of current input to or removed
from a rechargeable battery. The bq2050H meas
ures discharge and charge currents, measures bat
tery voltage, estimates self-discharge, monitors the
battery for low battery-voltage thresholds, and com
pensates for temperature and discharge rate. Cur
rent measurement is measured by monitoring the
voltage across a small-value series sense resistor be
tween the negative battery terminal and ground.
Scaled available energy is estimated using the re
maining average battery voltage during the dis
charge cycle and the remaining nominal available
bq2050H
Power Gauge IC
LCOM
SEG1/PROG
SEG2/PROG
SEG3/PROG
SEG4/PROG
SEG5/PROG
CFC
PSTAT
REF
V
CC
SB
1
2
DISP
3
4
SR
5
V
SS
RBI
HDQ
capacity. The scaled available energy measurement
is corrected for environmental and operating condi
tions.
Figure 1 shows a typical battery pack application of the
bq2050H using the LED display capability as a charge-
state indicator. The bq2050H is configured to display
capacity in relative display mode. The relative display
mode uses the last measured discharge capacity of the
battery as the battery “full” reference. A push-button
display feature is available for momentarily enabling
the LED display.
-
The bq2050H monitors the charge and discharge cur
rents as a voltage across a sense resistor. (See R
ure 1.) A filter between the negative battery terminal
and the SR pin is required.
-
R
1
Q1
ZVNL110A
C1
RB
1
V
CC
100K
0.1µF
C2
RB
See note 4
2
R
S
in Fig
S
-
-
-
Notes:
1. Indicates optional.
2. Programming resistors and ESD-protection diodes are not shown.
3. RC on SR is required.
4. A series diode is required on RBI if the bottom series cell is used as the backup source.
If the cell is used, the backup capacitor is not required, and the anode is connected to the
positive terminal of the cell.
In conjunction with monitoring VSRfor charge/discharge
currents, the bq2050H monitors the battery potential
through the SB pin. The voltage is determined through
a resistor-divider network per the following equation:
RB1
RB2
4N=−1
where N is the number of cells, RB1 is connected to the
positive battery terminal, and RB2 is connected to the
negative battery terminal. The single-cell battery volt
age is monitored for the end-of-discharge voltage (EDV)
thresholds. The EDV threshold levels are used to deter
mine when the battery has reached an “empty” state.
The EDV thresholds for the bq2050H are programmable
with the default values fixed at:
EDV1 (first) = 0.76V
EDVF (final) = EDV1-0.025V = 0.735V
If V
is below either of the two EDV thresholds, the as
SB
sociated flag is latched and remains latched, independent of V
also available over the serial port.
, until the next valid charge. The VSBvalue is
SB
During discharge and charge, the bq2050H monitors
V
for various thresholds used to compensate the
SR
charge counter. EDV monitoring is disabled if the discharge rate is greater than 2C (OVLD Flag = 1) and re-
1
sumes
second after the rate falls below 2C.
2
RBI Input
The RBI input pin is intended to be used with a storage
capacitor or external supply to provide backup potential
to the internal bq2050H registers when V
3.0V. V
ing an external supply (such as the bottom series cell) as
is output on RBI when VCCis above 3.0V. If us
CC
drops below
CC
the backup source, an external diode is required for isola
tion.
Reset
The bq2050H can be reset by removing VCCand ground
ing the RBI pin for 15 seconds or by commands over the
serial port. The serial port reset command sequence re
quires writing 00h to register PPFC (address = 1Eh) and
then writing 00h to register LMD (address = 05h).
Temperature
The bq2050H internally determines the temperature in
10°C steps centered from approximately -35°C to +85°C.
The temperature steps are used to adapt charge and dis
charge rate compensations, self-discharge counting, and
available charge display translation. The temperature
range is available over the serial port in 10°C incre
ments as shown in the following table:
TMP (hex)Temperature Range
0x< -30°C
1x-30°C to -20°C
2x-20°C to -10°C
3x-10°C to 0°C
-
-
4x0°C to 10°C
5x10°C to 20°C
6x20°C to 30°C
7x30°C to 40°C
8x40°C to 50°C
-
9x50°C to 60°C
Ax60°C to 70°C
Bx70°C to 80°C
Cx> 80°C
Layout Considerations
The bq2050H measures the voltage differential between
the SR and V
pin) is greatly affected by PC board layout. For optimal
results, the PC board layout should follow the strict rule
of a single-point ground return. Sharing high-current
ground with small signal ground causes undesirable
noise on the small signal nodes. Additionally:
■
The capacitors (C1 and C2) should be placed as
close as possible to the V
-
respectively, and their paths to V
short as possible. A high-quality ceramic capacitor
-
of 0.1µF is recommended for V
■
The sense-resistor capacitor should be placed as close
as possible to the SR pin.
■
The sense resistor (RS) should be as close as possible to
the bq2050H.
-
-
pins. VOS(the offset voltage at the SR
SS
and SB pins,
CC
should be as
SS
.
CC
4
bq2050H
Gas Gauge Operation
The operational overview diagram in Figure 2 illustrates
the operation of the bq2050H. The bq2050H accumu
lates a measure of charge and discharge currents, as
well as an estimation of self-discharge. The accumu
lated charge and discharge currents are adjusted for
temperature and rate to provide the indication of com
pensated available capacity to the host system or user.
The main counter, Nominal Available Capacity (NAC),
represents the available battery capacity at any given
time. Battery charging increments the NAC register,
while battery discharging and self-discharge decrement
the NAC register and increment the DCR (Discharge
Count Register).
The Discharge Count Register is used to update the Last
Measured Discharge (LMD) register only if a complete
battery discharge from full to empty occurs without any
partial battery charges. Therefore, the bq2050H adapts
its capacity determination based on the actual condi
tions of discharge.
Inputs
Charge
Current
Rate and
Temperature
Temperature
Compensation
Compensation
The battery's initial capacity equals the Programmed
Full Count (PFC) shown in Table 2. Until LMD is up
dated, NAC counts up to but not beyond this threshold
during subsequent charges. This approach allows the
gas gauge to be charger-independent and compatible
with any type of charge regime.
-
1.Last Measured Discharge (LMD) or learned
-
-
battery capacity:
LMD is the last measured discharge capacity of the
battery. On initialization (application of V
tery replacement), LMD = PFC. During subsequent
discharges, the LMD is updated with the latest
measured capacity in the Discharge Count Register
representing a discharge from full to below EDV1.
A qualified discharge is necessary for a capacity
transfer from the DCR to the LMD register. The
LMD also serves as the 100% reference threshold
used by the relative display mode.
Discharge
Current
Self-Discharge
Timer
Temperature
Compensation
CC
or bat
-
-
Main Counters
and Capacity
Reference (LMD)
Outputs
--
Nominal
+
Available
Charge
(NAC)
Rate and
Temperature
Compensation
Compensated
Available Charge
LED Display, etc.
<
Last
Measured
Discharged
(LMD)
Serial
Port
Figure 2. Operational Overview
5
+
Discharge
Count
Qualified
Transfer
Temperature Step,
Other Data
Register
(DCR)
FG2050H2.eps
+
bq2050H
2.Programmed Full Count (PFC) or initial bat
tery capacity:
The initial LMD and gas gauge rate values are pro
grammed by using PROG
is configured for a given application by selecting a
–PROG4. The bq2050H
1
PFC value from Table 2. The correct PFC may be
determined by multiplying the rated battery capac
ity in mAh by the sense resistor value:
Battery capacity (mAh)*sense resistor (Ω) =
PFC (mVh)
Selecting a PFC slightly less than the rated capac
ity provides a conservative capacity reference until
-
Example: Selecting a PFC Value
Given:
Sense resistor = 0.05
Number of cells = 2
Capacity = 1000mAh, Li-Ion battery, coke-anode
-
Current range = 50mA to 1A
Relative display mode
Self-discharge =
NAC
Voltage drop over sense resistor = 2.5mV to 50mV
Nominal discharge voltage = 3.6V
Therefore:
-
1000mAh*0.05Ω= 50mVh
the bq2050H “learns” a new capacity reference.
Table 1. Self-Discharge and Capacity Compensation
Pin
Connection
HCoke anode/disabledLEDs disabled
ZCoke anode/
LGraphite anode/
PROG5Compensation/Self-Discharge
(See Tables 3 and 4)
NAC
512
NAC
512
LEDs on when charging
Table 2. bq2050H Programmed Full Count mVh, VSRGain Selections
Ω
per day @ 25°C
512
DISP
Display State
LEDs on for 4 s
Pro-
grammed
PROG
x
12
Full
Count
(PFC)
---
PROG
SCALE =
1/80
PROG
= LPROG4= Z or H
4
= HPROG3= Z PROG3= L PROG3= H PROG3= Z PROG3= L
3
SCALE =
1/160
SCALE =
1/320
SCALE =
1/640
SCALE =
1/1280
SCALE =
1/2560
Units
mVh/
count
HH4915261430715476.838.419.2mVh
HZ4505656328214170.435.217.6mVh
HL4096051225612864.032.016.0mVh
ZH3686446123011557.628.814.4mVh
ZZ3379242221110653.026.413.2mVh
ZL3072038419296.048.024.012.0mVh
LH2764834617386.443.221.610.8mVh
LZ2560032016080.040.020.010.0mVh
LL2252828214170.435.217.68.8mVh
V
equivalent to 2
SR
counts/s (nom.)
904522.511.255.62.8mV
6
bq2050H
Select:
PFC = 30720 counts or 48mVh
= float
PROG
1
PROG
= low
2
PROG
= high
3
PROG
= float
4
PROG
= float
5
The initial full battery capacity is 48mVh (960mAh)
until the bq2050H “learns” a new capacity with a
qualified discharge from full to EDV1.
3.Nominal Available Capacity (NAC):
NAC counts up during charge to a maximum value
of LMD and down during discharge and self-dis
charge to 0. NAC is reset to 0 on initialization and
on the first valid charge following discharge to
EDV1. To prevent overstatement of charge during
periods of overcharge, NAC stops incrementing
when NAC = LMD.
4.Discharge Count Register (DCR):
The DCR counts up during discharge independent
of NAC and could continue increasing after NAC
has decremented to 0. Prior to NAC = 0 (empty
battery), both discharge and self-discharge increment the DCR. After NAC = 0, only discharge
increments the DCR. The DCR resets to 0 when
NAC = LMD. The DCR does not roll over but stops
counting when it reaches FFh.
The DCR value becomes the new LMD value on the
first charge after a valid discharge to V
the following conditions are met:
■
No valid charge initiations (charges greater than
2 NAC updates where V
during the period between NAC = LMD and EDV1.
■
The self-discharge is less than 6% of NAC.
■
The temperature is≥0°C when the EDV1 level
SRO>VSRQ
is reached during discharge.
■
VDQ is set
The valid discharge flag (VDQ) indicates whether
the present discharge is valid for LMD update. If
the DCR update value is less than 0.94 ∗ LMD, LMD
will only be modified by 0.94 ∗ LMD. This prevents
invalid DCR values from corrupting LMD.
5.Scaled Available Energy (SAE):
SAE is useful in determining the available energy
within the battery, and may provide a more useful
capacity reference in battery chemistries with
sloped voltage profiles during discharge. SAE may
be converted to an mWh value using the following
formula:
if all
EDV1
) occurred
E(mWh) =
(SAEHSAEL)∗+∗256
12. ∗∗
SCALE (R+ R )
RR
B1B2
SB2
∗
where RB1,RB2, and RSare resistor values in
ohms, as shown in Figure 1. SCALE is the selected
scale from Table 2.
6. Compensated Available Capacity (CACT)
CACT counts similarly to NAC, but contains the available
capacity compensated for discharge rate and temperature.
Charge Counting
Charge activity is detected based on a positive voltage
-
on the SR input. If charge activity is detected, the
bq2050H increments NAC at a rate proportional to V
and, if enabled, activates an LED display.
The bq2050H counts charge activity when the voltage at
theSRinput(V
threshold (V
has been updated twice without discharging or reaching
SRQ
) exceeds the minimum charge
SRO
). A valid charge is detected when NAC
the digital magnitude filter time-out. Once a valid
charge is detected, charge counting continues until V
including offset, falls below V
SRQ
.
Discharge Counting
Discharge activity is detected based on a negative voltage on the SR input. All discharge counts where V
is less than the minimum discharge threshold (V
cause the NAC register to decrement and the DCR to
increment.
Self-Discharge Counting
The bq2050H continuously decrements NAC and incre
ments DCR for self-discharge based on time and tempera
ture.
Charge/Discharge Current
The bq2050H current-scale registers, VSRH and VSRL,
can be used to determine the battery charge or dis
charge current. See the Current Scale Register descrip
tion for details.
Count Compensations
Compensated Available Capacity
Compensated Available Capacity compensation is based
on the rate of discharge, temperature, and negative
electrode type. Tables 3A and 3B outline the correction
factor typically used for graphite-anode Li-Ion batteries,
and Tables 4A and 4B outline the factors typically used for
coke-anode Li-Ion batteries. The compensation factor is
applied to NAC to derive the CACD and CACT values.
SR
SRO
SRD
SR
,
)
-
-
-
-
7
bq2050H
Table 3A. Graphite Anode
Approximate Discharge
Rate
0.5C0
<
0.5C
≥
Table 3B. Graphite Anode
Temperature
10°C0
≥
0°C to 10°C
-20°C to 0°C
-20°C
≤
Table 4A. Coke Anode
Approximate Discharge
Rate
0.5C0
<
0.5C
≥
Table 4B. Coke Anode
Temperature
10°C0
≥
0°C to 10°C
-20°C to 0°C
-20°C
≤
Available Capacity
Reduction
0.05 ∗ LMD
Available Capacity
Reduction
0.05 ∗ LMD
0.15 ∗ LMD
0.37 ∗ LMD
Available Capacity
Reduction
0.10 ∗ LMD
Available Capacity
Reduction
0.10 ∗ LMD
0.30 ∗ LMD
0.60 ∗ LMD
Charge Compensation
The bq2050H also monitors temperature during charge.
If the temperature is <0°C, NAC will only increment up
to 0.94 * LMD, inhibiting VDQ from being set. This
keeps a “learn” cycle from occurring when the battery is
charged at very low temperatures. If the temperature
rises above 0°C, NAC will be allowed to count up to NAC
= LMD.
Self-Discharge Compensation
The self-discharge compensation is programmed for a
nominal rate of
NAC is reduced for a battery within the 20–30°C tem
perature range. This rate varies across 8 ranges from
<10°C to >70°C, as shown in Table 5.
1
∗ NAC per day. This is the rate that
512
Table 5. Self-Discharge Compensation
Typical Rate
Temperature Range
< 10°C
10–20°C
20–30°C
30–40°C
40–50°C
50–60°C
60–70°C
> 70°C
Self-discharge may be disabled by connecting PROG
PROG
= Z or L
5
NAC
NAC
NAC
NAC
NAC
NAC
NAC
NAC
2048
1024
512
256
128
64
32
16
=H.
5
Digital Magnitude Filter
The bq2050H has a digital filter to eliminate charge and
discharge counting below a set threshold. The minimum
charge (V
) and discharge (V
SRQ
) threshold for the
SRD
bq2050H is 250µV.
Pack Protection Supervision
-
The CACD value is the available charge compensated
for the rate of discharge. At high discharge rates, CACD
is reduced. The reduction is maintained until a valid
charge is detected. The CACT value is the available
charge compensated for the rate of discharge and tem
perature. The CACT value is used to drive the LED dis
play.
The bq2050H can monitor the charge FET in a Li-Ion
pack protector circuit as shown in Figure 3. If the bat
tery voltage is too high or the temperature is out of the
0—60°C range, the bq2050H disables the charge FET
with the CFC output, which turns off the charge to the
pack.
-
-
The PSTAT input is used to monitor the protector state. If
PSTAT is above 2.5V, bit 5 of FLGS1 is set to 1. If PSTAT
is below 0.5V, bit 5 of FLGS1 is cleared to zero. Using this
input, the system can monitor the state of the charge con
8
-
-
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