Texas Instruments BQ2013HSN-A514TR, BQ2013HSN-A514 Datasheet

1
Features
Accurate measurement of available charge in rechargeable batteries
Designed for electric assist bicycles and other applications
Measures a wide dynamic current range
Supports NiCd, NiMH or lead acid
Designed for battery pack inte
-
gration
-
120µA typical standby current (self-discharge estimation mode)
-
Small size enables imple­mentations in as little as
1
2
square inch of PCB
Direct drive of LEDs for capacity
display
Automatic charge and self-
discharge compensation using in­ternal temperature sensor
Simple single-wire serial commu-
nications port for subassembly testing
16-pin narrow SOIC
General Description
The bq2013H Gas Gauge IC is in
­tended for battery-pack installation to maintain an accurate record of a bat
­tery’s available charge. The IC moni
­tors a voltage drop across a sense resis
­tor connected in series between the negative battery terminal and ground to determine charge and discharge ac
­tivity of the battery. The bq2013H is designed for high cpaacity battery packs used in high-discharge rate sys
­tems.
Battery self-discharge is estimated based on an internal timer and tem
­perature sensor. Compensations for battery temperature, rate of charge, and self-discharge are applied to the charge counter to provide available capacity information across a wide range of operating conditions. Initial battery capacity, self-discharge rate, display mode, and charge compensa­tion are set using the PROG
1-6
pins. Actual battery capacity is automati­cally “learned” in the course of a dis­charge cycle from full to empty.
Nominal available charge may be directly indicated using a five-seg
­ment LED display. These segments are used to graphically indicate nominal available charge.
The bq2013H supports a simple single-line bi-directional serial link to an external processor (common ground). The bq2013H outputs bat
­tery information in response to exter
­nal commands over the serial link. To support battery pack testing, the outputs may also be controlled by command. The external processor may also overwrite some of the bq2013H gas gauge data registers.
The bq2013H may operate directly from four nickel cells or three lead acid. With the REF output and an external transistor, a simple, inexpen­sive regulator can be built to provide V
CC
from a greater number of cells.
Internal registers include available charge, temperature, capacity, battery ID,and battery status.
LCOM LED common output
SEG
1
/PROG1LED segment 1/ Program
1 input
SEG
2
/PROG2LED segment 2 / Program
2 input
SEG
3
/PROG3LED segment 3/ Program
3 input
SEG
4
/PROG4LED segment 4/ Program
4 input
SEG
5
/PROG5LED segment 5/ Program
5 input
PROG
6
Program 6 input
REF Voltage reference output
DONE Fast charge complete
input
HDQ Serial communications
input/output
RBI Register backup input
SB Battery sense input
DISP
Display control input
SR Sense resistor input
V
CC
Supply voltage
bq2013H
Pin Connections Pin Names
1
PN2013.eps
16-Pin Narrow SOIC
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
REF
DONE
HDQ
RBI
SB
DISP
SR
LCOM
SEG1/PROG
1
SEG2/PROG
2
SEG3/PROG
3
SEG4/PROG
4
SEG5PROG
5
PROG
6
V
SS
Gas Gauge IC for Power-
Assist Applications
SLUS120–MAY 1999 B
Pin Descriptions
LCOM
LED common
This open-drain output switches V
CC
to source current for the LEDs. The switch is off during initialization to allow reading of PROG
1-5
pull-up or pull-down program resistors. LCOM is also high impedance when the display is off.
SEG
1
SEG
5
LED display segment outputs (dual func
-
tion with PROG
1
–PROG
5
Each output may activate an LED to sink the current sourced from LCOM.
PROG
1
PROG
6
Programmed full count selection inputs (dual function with SEG
1
- SEG5)
These three-level input pins define the pro
­grammed full-count (PFC), display mode, self-discharge rate, offset compensation, overload threshold, and charge compensa
­tion.
SR
Sense resistor input
The voltage drop (V
SR
) across the sense re-
sistor R
S
is monitored and integrated over time to interpret charge and discharge activ­ity. The SR input (see Figure 1) is connected between the negative terminal of the battery and ground. V
SR>VSS
indicates charge, and
V
SR<VSS
indicates discharge. The effective
voltage drop, V
SRO
, as seen by the bq2013H
is V
SR+VOS.
DONE
Charge complete input
This input/output is used to communicate the status of an external charge controller to the bq2013H.
DISP
Display control input
DISP
pulled high disables the display.
DISP
floating allows the LED display to
be active during certain charge and dis
­charge conditions. Transitioning DISP low activates the display.
SB
Secondary battery input
This input monitors the scaled battery volt
­age through a high-impedance resistive di
­vider network for the end-of-discharge volt
­age (EDV) thresholds.
RBI
Register backup input
This input is used to provide backup poten
­tial to the bq2013H registers during periods when V
CC
< 3V. A storage capacitor can be
connected to RBI.
HDQ
Serial I/O pin
This is an open-drain bidirectional commu­nications port.
REF
Voltage reference output for regulator
REF provides a voltage reference output for an optional micro-regulator.
V
CC
Supply voltage input
V
SS
Ground
2
bq2013H
Functional Description
General Operation
The bq2013H determines battery capacity by monitoring the amount of charge input to or removed from a recharge
­able battery. The bq2013H measures discharge and charge currents, estimates self-discharge, monitors the battery for low-battery voltage thresholds, and compensates for tem
­perature and charge rates. The charge measurement is made by monitoring the voltage across a small-value se
­ries sense resistor between the battery’s negative terminal and ground. The available battery charge is determined by monitoring this voltage over time and correcting the measurement for the environmental and operating condi
­tions.
Figure 1 shows a typical battery pack application of the bq2013H using the LED display. The bq2013H can be configured to display capacity in either a relative or an absolute display mode. The relative display mode uses the last measured discharge capacity of the battery as the battery “full” reference. The absolute display mode uses the programmed full count (PFC) as the full refer
­ence, forcing each segment of the display to represent a fixed amount of charge. A push-button display feature is available for enabling the LED display.
The bq2013H monitors the charge and discharge cur
­rents as a voltage across a sense resistor (see R
S
in Fig
­ure 1). A filter between the negative battery terminal and the SR pin is required.
3
bq2013H
FG2013H1.eps
PROG
6
SEG5/PROG
5
SEG4/PROG
4
SEG3/PROG
3
SEG2/PROG
2
SEG1/PROG
1
V
SS
DISP
SB
V
CC
REF
bq2013H
Gas Gauge IC
LCOM
RBI
HDQ
DONE
100K
Q1 ZVNL110A
R
1
C1
R
S
H, Z, or L
To µC
RB
1
0.1µF
RB
2
Load
Charger
To µC or
Fast Charger
2. The battery stack voltage can be directly connect to VCC across 4 nickel cells (4.8V nominal and should not exceed 6.5V) with a resistor and a zener diode to limit voltage during charge. Otherwise, R1and Q1 are needed for regulation of > 4 nickel cells.
3. Programming resistors and ESD-protection diodes are not shown.
4. R-C on SR is required.
SR
1. Indicates optional.
Notes:
Figure 1. Application Diagram: LED Display
Register Backup
The bq2013H RBI input pin is intended to be used with a storage capacitor to provide backup potential to the in
-
ternal bq2013H registers when V
CC
momentarily drops be
-
low 3.0V. V
CC
is output on RBI when VCCis above 3.0V.
After V
CC
rises above 3.0V, the bq2013H checks the internal registers for data loss or corruption. If data has changed, then the NAC register is cleared, and the LMD register is loaded with the initial PFC.
Voltage Thresholds
In conjunction with monitoring VSRfor charge/discharge currents, the bq2013H monitors the battery potential through the SB pin for the end-of-discharge voltage (EDV) thresholds.
The EDV threshold levels are used to determine when the battery has reached an “empty” state.
The EDV thresholds for the bq2013H are set as follows:
EDV1 (first) = 1.00V
EDVF (final) = EDV1 - 100mV
The battery voltage divider (RB1 and RB2 in Figure 1) is used to scale these values to the desired threshold.
If VSB is below either of the two EDV thresholds for the specified delay times in Table 1, the associated flag is latched and remains latched, independent of VSB, until the next valid charge. EDV monitoring is disabled if the OVLD bit in FLGS2 is set.
Table 1. Delay Time in Seconds
Capacity
Temperature
< 10°C10°C to 30°C > 30°C
> 40% 7 6 5
20% to 40% 4 3 2
< 20% 2 2 2
Reset
The bq2013H can be reset by removing VCCand ground
­ing the RBI pin for 15 seconds or with a command over the serial port. The serial port reset command sequence requires writing 00h to register PPFC (address = leh) and the writing 00h to register LMD (address = 05h.)
Temperature
The bq2013H internally determines the temperature in 10°C steps centered from -35°C to +85°C. The tempera
­ture steps are used to adapt charge rate compensations and self-discharge counting. The temperature range is available over the serial port in 10°C increments as shown in the following table:
TMPGG (hex) Temperature Range
0x < -30°C
1x -30°C to -20°C
2x -20°C to -10°C
3x -10°C to 0°C
4x 0°C to 10°C
5x 10°C to 20°C
6x 20°C to 30°C
7x 30°C to 40°C
8x 40°C to 50°C
9x 50°C to 60°C
Ax 60°C to 70°C
Bx 70°C to 80°C
Cx > 80°C
Layout Considerations
The bq2013H measures the voltage differential between the SR and V
SS
pins. VOS(the offset voltage at the SR pin) is greatly affected by PC board layout. For optimal results, the PC board layout should follow the strict rule of a single-point ground return. Sharing high-current ground with small signal ground causes undesirable noise on the small signal nodes. Additionally:
The capacitors should be placed as close as possible to the SB and V
CC
pins and their paths to VSSshould be as short as possible. A high-quality ceramic capacitor of 0.1µf is recommended for V
CC
.
The sense resistor (RS) should be as close as possible to the bq2013H.
The R-C on the SR pin should be located as close as possible to the SR pin. The maximum R should not exceed 100K.
Gas Gauge Operation
The operational overview diagram in Figure 2 illus
-
trates the operation of the bq2013H. The bq2013H ac
­cumulates a measure of charge and discharge currents, as well as an estimation of self-discharge. The bq2013H compensates charge current for charge rate and tem
-
4
bq2013H
perature. Discharge current is load compensated based on the value stored in location LCOMP (address = 0eh). LCOMP allows the bq2013H to automatically adjust for continuous small discharge currents. The bq2013H com
-
pensates self discharge for the load value as well as tem
-
perature.
The main counter, Nominal Available Capacity (NAC), represents the available battery capacity at any given time. Battery charging increments the NAC register, while battery discharging, self-discharge decrement the NAC register and increment the DCR (Discharge Count Register). NAC is also corrected automatically for offset error based on the value in the offset location OFFSET (address = 0bh.)
The Discharge Count Register (DCR) is used to update the Last Measured Discharge (LMD) register only if a complete battery discharge from full to empty occurs without any partial battery charges. Therefore, the bq2013H adapts its capacity determination based on the actual conditions of discharge.
The battery’s initial capacity is equal to the Pro
­grammed Full Count (PFC) shown in Table 2. Until LMD is updated, NAC counts up to but not beyond this threshold during subsequent charges. This approach al­lows the gas gauge to be charger-independent and com­patible with any type of charge regime.
1. Last Measured Discharge (LMD) or learned battery capacity:
LMD is the last measured discharge capacity of the battery. On initialization (application of V
CC
or bat
­tery replacement), LMD = PFC. During subsequent discharges, the LMD is updated with the latest measured capacity in the Discharge Count Register (DCR) representing a discharge from full to below EDV. The maximum decrease in LMD because of a DCR update is 25% of LMD. A qualified discharge is necessary for a capacity transfer from the DCR to the LMD register. The LMD also serves as the 100% reference threshold used by the relative dis
­play mode.
2. Programmed Full Count (PFC) or initial bat
­tery capacity:
The initial LMD and gas gauge rate values are pro
­grammed by using PFC. The PFC also provides the 100% reference for the absolute display mode. The bq2013H is configured for a given application by se
­lecting a PFC value from Table 2. The correct PFC may be determined by multiplying the rated bat­tery capacity in mAh by the sense resistor value:
Battery capacity (mAh)*sense resistor (Ω) =
PFC (mVh)
Selecting a PFC slightly less than the rated capac­ity for absolute mode provides capacity above the full reference for much of the battery’s life.
5
bq2013H
FG2013H2.eps
Load and
Temperature
Compensation
Charge Current
Discharge
Current
Self-Discharge
Timer
Temperature
Translation
Nominal
Available
Charge
(NAC)
(offset corrected)
Last
Measured
Discharged
(LMD)
Discharge
Count
Register
(DCR)
<
Qualified Transfer
+
Rate and
Temperature
Compensation
Rate and
Temperature
Compensation
Temperature Step, Other Data
+
-
Inputs
Main Counters
and Capacity
Reference (LMD)
Outputs
Serial
Port
Chip-Controlled
Available Charge
LED Display
-
+
Load
Compensation
Figure 2. Operational Overview
Example: Selecting a PFC Value
Given:
Sense resistor = 0.0075 Number of cells = 14 Capacity = 5000mAh, NiCd cells Current range = 1A to 30A Relative display mode with 4 second timer Self-discharge = 1% per day Trickle charge compensation = 0.85 Typical offset = -75µV Voltage drop across sense resistor = 5mV to 150mV
Therefore:
5000mAh*0.0075= 37.5mVh
Select:
PFC = 448000 counts or 35mVh PROG
1
, PROG2=Z,L
PROG
3
=Z
PROG
4
=H
PROG
5
=L
PROG
6
=Z
6
bq2013H
Programmed
Full Count (PFC) mVh Scale PROG
1
PROG
2
27136 84.8
1
320
HH
24064 75.2
1
320
HZ
41472 64.8
1
640
HL
35072 54.8
1
640
ZH
28672 44.8
1
640
ZZ
44800 35
1
1280
ZL
30720 24
1
1280
LH
38400 15
1
2560
LZ
12800 5
1
2560
LL
Table 2. bq2013H Programmed Full Count mVh Selections
PROG
3
Self-Discharge
H 1.6% per day
Z 0.8% per day
L 0.2% per day
Table 3. Programmed Self-Discharge
7
bq2013H
PROG
4
Overload Threshold Display Mode
HV
OVLD
= -75mV Relative/4s timer after push-button release
ZV
OVLD
= -75mV Relative/4s timer after push-button release
LV
OVLD
= -25mV Absolute/4s timer after push-button release
Table 4. Programmed Display Mode
PROG
5
Trickle Fast
<30°C30°C—50°C >50°C <30°C30°C—50°C >50°C
H 0.80 0.75 0.70 0.95 0.90 0.85
Z 1.00 1.00 1.00 1.00 1.00 1.00
L 0.85 0.80 0.75 0.95 0.90 0.85
Table 5. Programmed Charge Compensation
PROG
6
Offset
H
-150µV
Z
-75µV
L
0µV
Table 6. Programmed Discharge Offset Adjustment
The initial full battery capacity is 35mVh (4667mAh) until the bq2013H “learns” a new capacity with a qualified dis
-
charge from full to EDV1.
3.
Nominal Available Capacity (NAC):
NAC counts up during charge to a maximum value of LMD and down during discharge and self dis
­charge to 0. NAC is reset to 0 on initialization and on the first valid charge following discharge to EDV1. To prevent overstatement of charge during periods of overcharge, NAC stops incrementing when NAC = LMD. When the DONE input is as
­serted high, indicating full charge completion, NAC is set to LMD.
4.
Discharge Count Register (DCR):
The DCR counts up during discharge independent of NAC and could continue increasing after NAC has decremented to 0. Prior to NAC = 0 (empty battery), both discharge and self-discharge incre
­ment the DCR. After NAC = 0, only discharge in
­crements the DCR. The DCR resets to 0 when NAC = LMD. The DCR does not roll over but stops counting when it reaches FFFFh.
The DCR value becomes the new LMD value on the first charge after a valid discharge to EDV1 if all of the following conditions are met:
No valid charge initiations (charges greater than 2 NAC updates) occurred during the period be­tween NAC = LMD and EDV1.
The self-discharge count is less than 6% of NAC.
The temperature is≥0°C when the EDV1 level is reached during discharge.
VDQ is set.
Charge Counting
Charge activity is detected based on a positive voltage on the V
SR
input. If charge activity is detected, the
bq2013H increments NAC at a rate proportional to V
SRO
(VSR+VOS) and, if enabled, activates an LED display if V
SRO
> 500µV. Charge actions increment the NAC af
-
ter compensation for charge rate and temperature.
The bq2013H detects charge activity with V
SRO
> 250µV.
A valid charge equates to a sustained charge activity greater than 2 NAC updates. Once a valid charge is de
-
tected, charge counting continues until V
SRO
drops be
-
low 250µV.
Discharge Counting
All discharge counts where V
SRO
< -250µV cause the
NAC register to decrement and the DCR to increment. If enabled, the display is activated when V
SRO
< -2mV.
The display remains active for 10 seconds after V
SRO
rises above - 2mV.
Self-Discharge Estimation
The bq2013H decrements NAC and increments DCR for self-discharge based on time and temperature. The self­discharge count rate is programmed per Table 3. This is the rate for a battery temperature between 20–30°C. The NAC register cannot be decremented below 0.
Count Compensations
The bq2013H determines fast charge when the NAC up
-
dates at a rate of≥2 counts/s. Charge activity is com
­pensated for temperature and rate before updating NAC. Self-discharge estimation is compensated for tem
­perature before updating NAC or DCR.
Charge Compensation
Charge efficiency factors are selected using Table 5 for trickle charge and fast charge. Fast charge is defined as a rate of charge resulting in≥2 NAC counts/s (0.16C to
0.6C, depending on PFC selections; see Table 2).
Temperature adapts the charge rate compensation factors over three ranges between nominal, warm, and hot temperatures. Program pin 5 is used to select one of three compensation programs. These values are shown in Table 5.
8
bq2013H
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