Voltage Thresholds
In conjunction with monitoring VSRfor charge/discharge
currents, the bq2012 monitors the single-cell battery po
-
tential through the SB pin. The single-cell voltage po
tential is determined through a resistor/divider network
per the following equation:
RB
RB
N
1
2
1=−
where N is the number of cells, RB
1
is connected to the
positive battery terminal, and RB
2
is connected to the
negative battery terminal. The single-cell battery volt
age is monitored for the end-of-discharge voltage (EDV)
and for maximum cell voltage (MCV). EDV threshold
levels are used to determine when the battery has
reached an “empty” state, and the MCV threshold is used
for fault detection during charging.
Two EDV thresholds for the bq2012 are fixed at:
EDV1 (early warning) = 1.05V
EDVF (empty) = 0.95V
If V
SB
is below either of the two EDV thresholds, the associated flag is latched and remains latched, independent of V
SB
, until the next valid charge.
During discharge and charge, the bq2012 monitors V
SR
for various thresholds. These thresholds are used to
compensate the charge and discharge rates. Refer to the
count compensation section for details. EDV monitoring
is disabled if V
SR
≤
-250mV typical and resumes
1
2
sec-
ond after V
SR
> -250mV.
EMPTY Output
The EMPTY output switches to high impedance when
V
SB<VEDF
and remains latched until a valid charge oc
-
curs. The bq2012 also monitors V
SB
relative to V
MCV
,
2.25V. V
SB
falling from above V
MCV
resets the device.
Reset
The bq2012 recognizes a valid battery whenever VSBis
greater than 0.1V typical. V
SB
rising from below 0.25V
or falling from above 2.25V resets the device. Reset can
also be accomplished with a command over the serial
port as described in the Register Reset section.
Temperature
The bq2012 internally determines the temperature in
10°C steps centered from -35°C to +85°C. The tempera
ture steps are used to adapt charge and discharge rate
compensations, self-discharge counting, and available
charge display translation. The temperature range is
available over the serial port in 10°C increments as
shown below:
Layout Considerations
The bq2012 measures the voltage differential between
the SR and V
SS
pins. VOS(the offset voltage at the SR
pin) is greatly affected by PC board layout. For optimal
results, the PC board layout should follow the strict rule
of a single-point ground return. Sharing high-current
ground with small signal ground causes undesirable
noise on the small signal nodes. Additionally:
■
The capacitors (SB and VCC) should be placed as
close as possible to the SB and V
CC
pins, respectively,
and their paths to V
SS
should be as short as possible.
A high-quality ceramic capacitor of 0.1µf is
recommended for V
CC
.
■
The sense resistor (RS) should be as close as possible
to the bq2012.
■
The R-C on the SR pin should be located as close as
possible to the SR pin. The maximum R should not
exceed 100K.
4
bq2012
TMPGG (hex) Temperature Range
0x < -30°C
1x -30°C to -20°C
2x -20°C to -10°C
3x -10°C to 0°C
4x 0°C to 10°C
5x 10°C to 20°C
6x 20°C to 30°C
7x 30°C to 40°C
8x 40°C to 50°C
9x 50°C to 60°C
Ax 60°C to 70°C
Bx 70°C to 80°C
Cx > 80°C