Texas Instruments DV2005S1, DV2005L1, BQ2005S, BQ2005PN, BQ2005STR Datasheet

Features

➤

Sequential fast charge and con

­ditioning of two NiCd or NiMH
nickel cadmium or nickel-metal
hydride battery packs

➤

Hysteretic PWM switch-mode
current regulation or gated con

­trol of an external regulator

➤

Easily integrated into systems
or used as a stand-alone charger

➤

Pre-charge qualification of tem

­perature and voltage

➤

Direct LED outputs display
battery and charge status

➤ Fast-charge termination by

∆

temperature/∆ time, -∆V, maxi­mum voltage, maximum tem­perature, and maximum time

➤ Optional top-off and pulse-

trickle charging

General Description

The bq2005 Fast-Charge IC provides
comprehensive fast charge control
functions together with high-speed
switching power control circuitry on a
monolithic CMOS device for sequential
charge management in dual battery
pack applications.

Integration of closed-loop current
control circuitry allows the bq2005
to be the basis of a cost-effective so

­lution for stand-alone and system­integrated chargers for batteries of
one or more cells.

Switch-activated discharge-before­charge allows bq2005-based chargers
to support battery conditioning and
capacity determination.

High-efficiency power conversion is
accomplished using the bq2005 as a
hysteretic PWM controller for
switch-mode regulation of the charg­ing current. The bq2005 may alterna-

tively be used to gate an externally
regulated charging current.

Fast charge may begin on application
of the charging supply, replacement
of the battery, or switch depression.
For safety, fast charge is inhibited
unless/until the battery tempera

-

ture and voltage are within config

-

ured limits.

Temperature, voltage, and time are
monitored throughout fast charge.
Fast charge is terminated by any of
the following:

n

Rate of temperature rise
(∆T/∆t)

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

After fast charge, optional top-off
and pulsed current maintenance
phases are available.

1

Fast-Charge IC

for Dual-Battery Packs

bq2005

Pin Connections

Pin Names

SLUS079–JUNE 1999 F

DCMDADischarge command input,

battery A

DVEN -∆V enable

TM

1

Timer mode select 1

TM

2

Timer mode select 2

TCO Temperature cut-off

TS

A

, Temperature sense input,

TS

B

battery A/B

BAT

A

, Battery voltage input,

BAT

B

battery A/B

SNSA, Sense resistor input ,
SNSB battery A/B

1

PN200501.eps

20-Pin DIP or SOIC

2
3

4
5
6
7
8

20
19

18

17
16
15
14

13
9
10

12

11

DCMD

A

DVEN

TM

1

TM

2

TCO

TS

A

TS

B

BAT

A

BAT

B

SNS

A

FCC

B

CH

B

MOD

B

MOD

A

V

CC

V

SS

FCC

A

CH

A

DIS

A

SNS

B

DIS

A

Discharge control output,
battery A

CH

A

, Charge status output,

CH

B

battery A/B

FCC

A

, Fast charge complete output,

FCC

B

battery A/B

V

SS

System ground

V

CC

5.0V±10% power

MOD

A

, Charge current control

MOD

B

output, battery A/B

Pin Descriptions

DCMD

A

Discharge-before-charge control input,
battery A

DCMD

A

controls the discharge-before-charge
function of the bq2005. A negative-going
pulse on DCMD

A

initiates a discharge to
EDV followed by a charge if conditions allow.
By tying DCMD

A

to ground, automatic
discharge-before-charge is enabled on every
new charge cycle start.

DVEN

-∆V enable input

This input enales/disables -∆V charge termina

­tion. If DVEN is high, the -∆V test is enabled.
If DVEN is low, -∆V test is disabled. The state
of DVEN may be changed at any time.

TM

1

–

TM

2

Timer mode inputs

TM

1

and TM2are three-state inputs that con

­figure the fast charge safety timer, -∆V hold­off time, and that enhance/disable top-off.
See Table 2.

TCO

Temperature cutoff threshold input

Input to set maximum allowable battery
temperature. If the potential between TS

A

and SNSAor TSB and SNSBis less than the
voltage at the TCO input, then fast charge or
top-off charge is terminated for the corre­sponding battery pack.

TS

A

,

TS

B

Temperature sense inputs

Input, referenced to SNS

A

or SNSB,respec

­tively, for an external thermistor monitoring
battery temperature.

BAT

A

,

BAT

B

Voltage inputs

The battery voltage sense input, referenced to
SNS

A,B

, respectively. This is created by a

high-impedance resistor divider network con

­nected between the positive and the negative
terminals of the battery.

SNS

A

,

SNS

B

Charging current sense inputs,

SNS

A,B

controls the switching of MOD

A,B

based on the voltage across an external
sense resistor in the current path of the bat

­tery. SNS is the reference potential for the
TS and BAT pins. If SNS is connected to
V

SS

, MOD switches high at the beginning of

charge and low at the end of charge.

DIS

A

Discharge control output

Push-pull output used to control an external
transistor to discharge battery A before
charging.

CH

A

,

CH

B

Charge status outputs

Push-pull outputs indicating charging status
for batteries A and B, respectively. See Fig

-

ure 1 and Table 2.

FCC

A

,

FCC

B

Fast charge complete outputs

Open-drain outputs indicating fast charge
complete for batteries A and B, respectively.
See Figure 1 and Table 2.

MOD

A

,

MOD

B

Charge current control outputs

MOD

A,B

is a push-pull output that is used to
control the charging current to the battery.
MOD

A,B

switches high to enable charging
current to flow and low to inhibit charging
current flow to batteries A and B,
respectively.

V

CC

VCCsupply input

5.0 V, ±10% power input.

Vss

Ground

2

bq2005

Functional Description

Figure 3 shows a block diagram and Figure 4 shows a
state diagram of the bq2005.

Battery Voltage and Temperature
Measurements

Battery voltage and temperature are monitored for maxi

-

mum allowable values. The voltage presented on the bat

-

tery sense input, BAT

A,B

, must be divided down to be

-

tween 0.95 ∗ V

CC

and 0.475 ∗ VCCfor proper operation. A

resistor-divider ratio of:

RB1
RB2N2.375

=−1

is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat

-

tery terminal. See Figure 1.

Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient ther­mistor placed in proximity to the battery may be used as a
low-cost temperature-to-voltage transducer. The tempera­ture sense voltage input at TS

A,B

is developed using a

resistor-thermistor network between V

CC

and VSS. See

Figure 1. Both the BAT

A,B

and TS

A,B

inputs are refer-

enced to SNS

A,B

, so the signals used inside the IC are:

V

BAT(A,B)-VSNS(A,B)=VCELL(A,B)

and

V

TS(A,B)-VSNS(A,B)=VTEMP(A,B)

Discharge-Before-Charge

The DCMDAinput is used to command discharge­before-charge via the DIS

A

output. Once activated,

DIS

A

becomes active (high) until V

CELL

falls below V

EDV

where:

V

EDV

= 0.475 ∗ VCC± 30mV

at which time DIS

A

goes low and a new fast charge cycle

begins.

The DCMD

A

input is internally pulled up to VCC(its in

­active state). Leaving the input unconnected, therefore,
results in disabling discharge-before-charge. A negative
going pulse on DCMD

A

initiates discharge-before-charge
at any time regardless of the current state of the
bq2005. If DCMD

A

is tied to VSS, discharge-before­charge will be the first step in all newly started charge
cycles.

Starting A Charge Cycle

A new charge cycle is started by (see Figure 2):

1. V

CC

rising above 4.5V

2. V

CELL

falling through the maximum cell voltage,

V

MCV

where:

V

MCV

= 0.95 ∗ VCC± 30mV

If DCMD

A

is tied low, a discharge-before-charge will be
executed as the first step of the new charge cycle. Oth­erwise, pre-charge qualification testing will be the first
step.

The battery must be within the configured temperature
and voltage limits before fast charging begins.

3

bq2005

Fg2005-1.eps

N
T
C

bq2005

V

CC

PACK +

PACK -

TS

A,B

SNS

A,B

RT1

RT2

RB2

RB1

bq2005

Negative Temperature

Coefficient Thermister

PACK+

PACK-

BAT

A,B

SNS

A,B

Figure 1. Voltage and Temperature Monitoring

The valid battery voltage range is V

EDV<VBAT<VMCV.

The valid temperature range is V

HTF<VTEMP<VLTF

,

where:

V

LTF

= 0.4 ∗ VCC± 30mV

V

HTF

= [(1/4 ∗ V

LTF

) + (3/4 ∗ V

TCO

)] ± 30mV

V

TCO

is the voltage presented at the TCO input pin, and is

configured by the user with a resistor divider between V

CC

and ground. The allowed range is 0.2 to 0.4 ∗ VCC.

If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al

-

lowed limits. The MOD

A,B

output is modulated to pro

­vide the configured trickle charge rate in the charge
pending state. There is no time limit on the charge

pending state; the charger remains in this state as long
as the voltage or temperature conditons are outside of
the allowed limits. If the voltage is too high, the chip
goes to the battery absent state and waits until a new
charge cycle is started.

Fast charge continues until termination by one or more
of the five possible termination conditions:

n

Delta temperature/delta time (∆T/∆t)

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

4

bq2005

Fast Charging

Top-Off

(Optional)

T200501.eps

Dis-

charge

(Optional
Battery A)

Charge

Pending*

(Pulse-Trickle)

DIS

A

MOD

A,B

MOD

A,B

Discharge-Before-Charge started

or

Battery discharged to 0.475 * V

CC.

Battery outside

temperature/voltage limits.

Battery within temperature/voltage limits.

Pulse-Trickle

Switch-mode
Configuration

External
Regulation

CH

A,B

Status Output

FCC

A,B

Status Output

4s

4s

34s

34s

260 s

Note*

260 s

Note*

*See Table 3 for pulse-trickle period.

Figure 2. Charge Cycle Phases

-∆V Termination

If the DVEN input is high, the bq2005 samples the volt­age at the BAT pin once every 34s. If V

CELL

is lower
than any previously measured value by 12mV ±4mV,
fast charge is terminated. The -∆V test is valid in the
range V

MCV

- (0.2 ∗ VCC)<V

CELL<VMCV

.

Voltage Sampling

Each sample is an average of 16 voltage measurements
taken 57µs apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging.
During the hold-off period, -∆V termination is disabled.
This avoids premature termination on the voltage spikes
sometimes produced by older batteries when fast-charge
current is first applied. ∆T/∆t, maximum voltage and
maximum temperature terminations are not affected by
the hold-off period.

∆T/∆t Termination

The bq2005 samples at the voltage at the TS pin every
34s, and compares it to the value measured two samples
earlier. If V

TEMP

has fallen 16mV ±4mV or more, fast
charge is terminated. The ∆T/∆t termination test is
valid only when V

TCO<VTEMP<VLTF

.

Temperature Sampling

Each sample is an average of 16 voltage measurements
taken 57µs apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime V

CELL

rises above V

MCV,

CHG goes high (the LED
goes off) immediately. If the bq2005 is not in the voltage
hold-off period, fast charging also ceases immediately. If
V

CELL

then falls back below V

MCV

before t

MCV

=1s
(maximum), the chip transitions to the Charge Complete
state (maximum voltage termination). If V

CELL

remains

above V

MCV

at the expiration of t

MCV,

the bq2005 transi

­tions to the Battery Absent state (battery removal). See
Figure 4.

Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold V

TCO.

Charge will also be terminated if V

TEMP

rises above the minimum temperature fault threshold,
V

LTF,

after fast charge begins.

Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/4, C/2, 1C, and 2C. Maximum time-out termi

­nation is enforced on the fast-charge phase, then reset,
and enforced again on the top-off phase, if selected.
There is no time limit on the trickle-charge phase.

Top-off Charge

An optional top-off charge phase may be selected to
follow fast charge termination for the C/2 through 4C
rates. This phase may be necessary on NiMH or other

5

Corresponding

Fast-Charge Rate TM1 TM2

Typical Fast-Charge

and Top-Off

Time Limits

Typical -∆V/MCV

Hold-Off

Time (seconds)

Top-Off

Rate

C/4 Low Low 360 137 Disabled
C/2 Float Low 180 820 Disabled

1C High Low 90 410 Disabled
2C Low Float 45 200 Disabled
4C Float Float 23 100 Disabled

C/2 High Float 180 820 C/16

1C Low High 90 410 C/8
2C Float High 45 200 C/4
4C High High 23 100 C/2

Note: Typical conditions = 25°C, VCC= 5.0V.

Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table

bq2005