Texas Instruments APA100 User Manual
APA100
100−W Analog Input Class-D Amplifier
TPA2001D1/TAS5111
User’ s Gu ide
August 2004 Audio Power Amplifiers
SLOU170
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About This Manual
Information About Cautions and Warnings
Preface
Read This First
This user’s guide describes the characteristics, operation, and the use of the
APA100 reference design board. It covers all pertinent areas involved to
properly use this reference design board along with the devices that it
supports. The physical PCB layout, schematic diagram, and circuit
descriptions are included.
This reference design demonstrates how to make the TPA2001D1 and
T AS5111 into a 100-W class-D amplifier. The user’s guide discusses how the
TPA2001D1 is used as an analog input class-D modulator. The analog
modulator is input to the TAS5111, which is an H−bridge that effectively
extends the supply range from the TPA2001D1’s 3-V rails to 29.5 V with the
TAS5111. The user’s guide also goes into detail on the external feedback using
the TLV2464A quad operational amplifier to add power supply rejection. The
user’s guide shows the measured audio results including: total harmonic
distortion plus noise (THD+N) versus frequency, THD+N versus output power,
signal-to-noise ratio (SNR), output power versus supply voltage, output power
versus load, and supply rejection ratio versus frequency.
How to Use This Manual
- Chapter 1 — EVM Overview
- Chapter 2 — PCB Design
- Chapter 3 — EVM Operation
- Chapter 4 — Technical Information
- Chapter 5 — Measured Results
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
iii
Related Documentation From Texas Instruments
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you
The information in a caution or a warning is provided for your protection. Read
each caution and warning carefully.
.
Related Documentation From Texas Instruments
To obtain a copy of any of the following TI documents, call the Texas
Instruments Literature Response Center at (800) 47–8924 or the Product
Information Center (PIC) at (972) 644–5580. When ordering, identify this
manual by its title and literature number. Updated documents can also be
obtained through the TI Web site at www.ti.com
Data Sheets: Literature Number:
TPA2001D1 SLOS338
TAS5111 SLES049
TLV2464A SLOS220
.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
iv
Contents
Contents
1 EVM Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.1 Supply Voltage 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.2 TPA2001D1 and TLV2464A Supply Voltage (3-V Reference) 1-3. . . . . . . . . . . . . .
1.3 EVM Basic Function/Block Diagram 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 PCB Design 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 PCB Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 Split Ground Plane 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2 H-Bridge Layout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3 Analog Section Layout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.4 PCB Layers 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Bill of Materials 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Schematic 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 EVM Operation 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Quick Start 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Power−Up/Down Sequence 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Reset Button/Mute 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Error Signals 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Changing the Gain 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Technical Information 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Feedback System Design 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 TPA2001D1 (Class-D Modulator) 4-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 TAS5111 (H-Bridge) 4-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 TLV2464A (Gain Setting and Feedback) 4-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 LC Filter 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 Thermal 4-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Measured Results 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Total Harmonic Distortion + Noise 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Output Power 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Efficiency 5-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 Gain and Phase Response 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5 Signal-to-Noise Ratio (SNR) 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6 Supply Ripple Rejection 5-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
v
Contents
Figures
1−1 THD+N vs Output Power (a), THD+N vs Frequency (b) 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−2 APA100 EVM Block Diagram 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−1 APA100 Split Plane Top Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−2 APA100 Split Plane Bottom Layout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−3 Top Copper and Silkscreen 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−4 Bottom Copper and Silkscreen 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−5 Drill Drawing 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1 Quick Start Module Map 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 APA100 Block Diagram 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−2 Open- and Closed-Loop Frequency Response 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−3 Open- and Closed-Loop Frequency Response With TPA2001D1 Pole and
4−4 APA100 Integrator Design 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−5 PSPICE Circuit for Simulating the Feedback 4-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−6 PSPICE Simulation of Open−Loop Response 4-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−7 TPA2001D1 Block Diagram 4-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−8 TPA2001D1 Inputs and Outputs With 20-kHz Sine Wave 4-8. . . . . . . . . . . . . . . . . . . . . . . . . . .
4−9 APA100 Output Filter 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−1 APA100 THD+N vs Frequency With 4-W Load 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−2 APA100 THD+N vs Frequency With 8-W Load 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−3 APA100 THD+N vs Output Power With 4-W Load 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−4 APA100 THD+N vs Output Power With 8-W Load 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−5 APA100 Output Power vs Supply Voltage With 4-W Load 5-4. . . . . . . . . . . . . . . . . . . . . . . . . .
5−6 APA100 Output Power vs Supply Voltage With 8-W Load 5-4. . . . . . . . . . . . . . . . . . . . . . . . . .
5−7 APA100 Efficiency vs Output Power With 4-W Load 5-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−8 APA100 Gain vs Frequency With 4-W and 8-W Load 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−9 APA100 Supply Ripple Rejection Ratio vs Frequency With 8-W Load 5-7. . . . . . . . . . . . . . .
Canceling Zero 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
2−1 Parts List 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1 TAS5111 Error Decoding 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 TAS5111 Thermal Table 4-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
vi
Chapter 1
EVM Overview
This reference design demonstrates how to make the TPA2001D1 and the
T AS5111 into a 100-W class-D amplifier. The user’s guide discusses how the
TPA2001D1 is used as an analog input class-D modulator. The analog
modulator is input to the TAS5111, which is an H-bridge that ef fectively extends
the supply range from the TPA2001D1’s 3-V rails to 29.5 V with the TAS5111.
The 18-V to 29.5-V power supply is applied across the power supply banana
plugs J3 and J4. Apply 18 V to 29.5 V to J3 and 0 V (ground) to J4. A simple
zener diode and NPN transistor circuit is used to create the 3-V supply for the
TPA2001D1 and TLV2464A; therefore, the user only needs to apply the
single-supply voltage.
The analog single-ended input is received through the phono jack, J5. The
user should connect the load across the differential output banana jacks, J1
and J2.
Topic Page
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 EVM Basic Function/Block Diagram 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . .
EVM Overview
1-1
Features
1.1 Features
This reference design or evaluation module (EVM) features the TPA2001D1,
TAS5111, and TLV2464A. For simplicity, this EVM is referred to as the APA100
EVM to cover all parts that are supported in this user’s guide. The APA100
EVM is an evaluation module designed for a quick and easy way to evaluate
the functionality and performance of the 100−W analog input class−D
amplifier.
The features of this amplifier follow.
- Wide supply range of 18 V to 29.5 V
- >85% efficiency into 4 Ω and 8 Ω
- 100 W at 4% THD+N with 29.5-V supply and 4-Ω load
- 100 W at 10% THD+N with 28-V supply and 4-Ω load
- 63 W at 10% THD+N with 29.5-V supply and 8-Ω load
- THD+N = 0.04% at 1 W with 29.5-V supply and 4-Ω load
- THD+N = 0.03% at 1 W with 29.5-V supply and 8-Ω load
- SNR = 95 dB
- Supply rejection = 63 dB at 1 kHz
- Internal short circuit and thermal protection
- Onboard 3−V supply for TPA2001D1 and TLV2464A
- Module gain set to 31.4 dB typical and easily adjusted.
Figure 1−1 shows the amplifier’s (a) THD+N vs output power and (b) THD+N
vs frequency with a 4-Ω load, respectively. More graphs are shown in Chapter
5, Measured Results.
Figure 1−1.THD+N vs Output Power (a), THD+N vs Frequency (b)
20
f = 1 kHz,
10
PVDD = 15 V, 18 V,
20 V, 28 V, 29.5 V
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
THD+N − Total Harmonic Distortion + Noise − %
100 m 500 m 1 5 10 20 50 100 200
PO − Output Power − W
(a) (b)
100
50
20
10
5
2
1
1 W
0.5
0.2
0.1
0.05
0.02
0.01
THD+N − Total Harmonic Distortion + Noise − %
20 50 100 200 1 k 2 k 10 k 20 k
10 W
f − Frequency − Hz
1.2 Power Requirements
The following sections describe the power requirements of this EVM.
40 W
70 W
1.2.1 Supply Voltage
1-2
The 18-V to 29.5-V supply (A+) is applied across the power supply banana
plugs J3 and J4. Apply 18 V to 29.5 V to J3 and ground to J4. A zener diode
EVM Basic Function/Block Diagram
and NPN transistor circuit is used to create the 3-V supply for the TPA2001D1
and TLV2464A; therefore, the user only needs to apply the single-supply
voltage. A+ supply is used for powering the TAS5111 and is input for the zener
diode/NPN transistor circuit used to generate the 3-V supply for the
TPA2001D1 and TLV2464A.
To avoid potential damage to the EVM board, make sure that the
correct cables are connected to their respective terminals as
labeled on the EVM board.
Stresses above 29.5-V maximum voltage rating may cause
permanent damage to the TAS5111.
1.2.2 TPA2001D1 and TLV2464A Supply Voltage (3-V Reference)
The 3-V supply is generated by a 3.9-V zener diode, an NPN transistor, and
a few resistors to supply VDD for the TPA2001D1 and TLV2464A. The 3-V
supply voltage goes through a 20-Ω resistor to filter any noise. Test point 3V
is placed after the 20-Ω resistor to allow the user to remove the 20-Ω resistor
and insert an external 3-V supply. If an external supply is inserted, the voltage
needs to be g r e ater than 2.75 V to enable proper operation of the TPA2001D1
and less than 3.6 V to allow proper voltage levels to the inputs of the T AS5111.
When applying an external voltage reference through test point 3V,
ensure that it does not exceed +3.6 V. Otherwise, this can
permanently damage the installed device under test (DUT).
1.3 EVM Basic Function/Block Diagram
The APA100 EVM uses the TPA2001D1 as the analog modulator. The
TAS5111 level shifts the 3-V, peak-to-peak output to the 18-V to 29.5-V,
peak-to-peak output level of the TAS5111 enabling high−power output. The
TLV2464A is used for the input gain stage, to provide a buffered midsupply
voltage (1.5 V) and as feedback. The feedback improves total harmonic
distortion (THD) and gives the amplifier power supply rejection, which allows
the amplifier to have excellent audio performance even with a noisy power
supply. Chapter 4, Technical Information provides more details about the
component selection and feedback. A block diagram of the reference design
is shown in Figure 1−2.
EVM Overview
1-3
EVM Basic Function/Block Diagram
Figure 1−2.APA100 EVM Block Diagram
(TLV2464)
Audio Input
Gain
Analog Input
Class-D
Modulator
TPA2001D1
Feedback
and
Integrator
(TLV2464)
H-Bridge
(TAS5111)
Audio
Output
1-4
Chapter 2
PCB Design
This chapter gives layout guidelines for the APA100 reference design.
Topic Page
2.1 PCB Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Bill of Materials 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Schematic 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Design
2-1
PCB Layout
2.1 PCB Layout
The critical part of the design lies particularly in the layout process. The EVM
layout should be followed exactly for optimal performance. The main concern
is the placement of components and the proper routing of signals. Place the
bypass/decoupling capacitors as close as possible to the pins; properly
separate the linear and switching signals from each other. Because of its
importance, carefully consider the ground plane in the layout process. A split
ground plane is ideally preferred.
2.1.1 Split Ground Plane
The split plane used in the EVM separates the ground plane for the H−bridge
and a separate plane for everything else. The ground plane plays an important
role in controlling the noise and other effects that contribute to distortion and
noise on the output. To ensure that the return currents are handled properly,
route the appropriate signals only in their respective sections; this means that
the analog traces should only lay directly above or below the analog ground
section and the H-bridge traces in the H-bridge ground section. Minimize the
length of the traces. Figure 2−1 shows the top layer labeled with Analog
Section and H-Bridge Section to demonstrate how the board is split. The
bottom layer is split along the same line, as shown in Figure 2−2.
Figure 2−1.APA100 Split Plane Top Layout
2-2
Figure 2−2.APA100 Split Plane Bottom Layout
PCB Layout
2.1.2 H-Bridge Layout
The H-bridge is laid out based on recommendations from the TAS5111 data
sheet and follows the same pattern as the DAVREF100 EVM board.
1) Keep local decoupling and bootstrap capacitors and resistors close to
pins.
J Minimize trace length to C29, and use wide traces.
J Local PVDD decoupling R35, C35, R36, and C36 traces should be as
short and as wide as possible.
2) Use a ground plane.
3) Use trace impedance from bulk decoupling to PVDD pin, making the trace
50 mm long and 1 mm wide, with separate traces for PVDDA and PVDDB
To ensure proper H-bridge layout, measure the TAS5111 output waveforms at
the pins with a short ground lead on the scope probe to PGND. See application
report Voltage Spike Measurement Technique and Specification (SLEA025).
2.1.3 Analog Section Layout
The analog section is carefully laid out to keep the switching currents from the
TAS5111 away from it. The EVM layout followed these general rules.
1) Keep the operational amplifier away from TAS5111 output and power
traces.
2) Minimize nodes connected to IN− pin of the TLV2464A. This is the most
sensitive node of the reference design.
PCB Design
2-3
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