Texas Instruments AN-1650 LM34919 User Manual

1 Introduction

The LM34919EVAL evaluation board provides the design engineer with a fully functional buck regulator,
employing the constant on-time (COT) operating principle. This evaluation board provides a 5V output
over an input range of 8V to 40V. The circuit delivers load currents to 600 mA, with current limit set at a
nominal 700 mA. The board is populated with all components except R5, C9 and C10. These components
provide options for managing the output ripple as described later in this document.

The board’s specification are:

• Input Voltage: 8V to 40V

• Output Voltage: 5V

• Maximum load current: 600 mA

• Minimum load current: 0A

• Current Limit: 640 mA to 730 mA

• Measured Efficiency: 92.7% (VIN= 8V, I

• Nominal Switching Frequency: 800 kHz

• Size: 2.6 in. x 1.6 in. x 0.5 in

User's Guide

SNVA250A–June 2007–Revised April 2013

AN-1650 LM34919 Evaluation Board

= 300 mA)

OUT

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SNVA250A–June 2007–Revised April 2013 AN-1650 LM34919 Evaluation Board

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Figure 1. Evaluation Board - Top Side

1

Copyright © 2007–2013, Texas Instruments Incorporated

tON =

VIN - 1.5V

1.13 x 10

-10

x

(R1 + 1.4 k:)

+ 100 ns

Theory of Operation

2 Theory of Operation

Refer to the evaluation board schematic in Figure 5, which contains a simplified block diagram of the
LM34919. When the circuit is in regulation, the buck switch is on each cycle for a time determined by R1
and VIN according to the equation:

The on-time of this evaluation board ranges from ≊875 ns at VIN = 8V, to ≊231 ns at VIN = 40V. The on­time varies inversely with VIN to maintain a nearly constant switching frequency. At the end of each on­time the Minimum Off-Timer ensures the buck switch is off for at least 155 ns. In normal operation, the off­time is much longer. During the off-time, the load current is supplied by the output capacitor (C7, C8).
When the output voltage falls sufficiently that the voltage at FB is below 2.5V, the regulation comparator
initiates a new on-time period. For stable, fixed frequency operation, a minimum of 25 mV of ripple is
required at FB to switch the regulation comparator. The current limit threshold, is ≊640 mA at Vin = 8V,
and ≊730 mA at Vin = 40V. The variation is due to the change in ripple current amplitude as Vin varies.
Refer to the LM34919 data sheet for a more detailed block diagram, and a complete description of the
various functional blocks.

3 Board Layout and Probing

The pictorial in Figure 1 shows the placement of the circuit components. The following should be kept in
mind when the board is powered:

1) When operating at high input voltage and high load current, forced air flow may be necessary.

2) The LM34919, and diode D1 may be hot to the touch when operating at high input voltage and high
load current.

3) Use CAUTION when probing the circuit at high input voltages to prevent injury, as well as possible
damage to the circuit.

4) At maximum load current (0.6A), the wire size and length used to connect the load becomes important.
Ensure there is not a significant drop in the wires between this evaluation board and the load.

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4 Board Connection/Start-up

The input connections are made to the J1 connector. The load is connected to the J2 (OUT) and J3
(GND) terminals. Ensure the wires are adequately sized for the intended load current. Before start-up a
voltmeter should be connected to the input terminals, and to the output terminals. The load current should
be monitored with an ammeter or a current probe. It is recommended that the input voltage be increased
gradually to 8V, at which time the output voltage should be 5V. If the output voltage is correct with 8V at
VIN, then increase the input voltage as desired and proceed with evaluating the circuit. DO NOT EXCEED
40V AT VIN.

5 Output Ripple Control

The LM34919 requires a minimum of 25 mVp-p ripple at the FB pin, in phase with the switching waveform
at the SW pin, for proper operation. The required ripple can be supplied from ripple at V
feedback resistors as described in Options A and B below, or the ripple can be generated separately
(using R5, C9, and C10) in order to keep the ripple at V

Option A) Lowest Cost Configuration: This evaluation board is supplied with R4 installed in series with
the output capacitance (C7, C8). Since ≥25 mVp-p are required at the FB pin, R4 is chosen to generate
≥50 mVp-p at V
Using 0.39Ω for R4, the ripple at V
range. If the application can accept this ripple level, this is the most economical solution. The circuit is
shown in Figure 2 and Figure 8.

, knowing that the minimum ripple current in this circuit is ≊155 mAp-p at minimum VIN.

OUT

, through the

OUT

at a minimum (Option C).

OUT

ranges from ≊60 mVp-p to ≊140 mVp-p over the input voltage

OUT

2

AN-1650 LM34919 Evaluation Board SNVA250A–June 2007–Revised April 2013

Copyright © 2007–2013, Texas Instruments Incorporated

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Cff t

t

ON (max)

(R2//R3)

FB

SW

BST

VCC

ISEN

SGND

VIN

R1

43.2k

SS

RTN

Gnd

D1

A1

A2

On

Timer

Minimum

Off

Timer

Logic

Regulation
Comparator

B3

A3

Current Limit

Detect

D3

C3

0.18:

C1

IN

Gnd

C2

1PF

8

V to

40V

RON/SD

C6

0.022

PF

0.1

PF

C3

1PF

0.

1

PF

C4

B1

V

IN

V

OUT

C5

D1

D2

C1

2.49k

R3

2.49k

R2

1000 pF

PF10

PF10

5V

LM34919

15 PH

L1

R

6 0:

C8C7

2.5V

0.022

PF

Cff

R

4

FB

SW

BST

VCC

ISEN

SGND

VIN

R1

43.2k

SS

RTN

Gnd

D1

A1

A2

On

Timer

Minimum

Off

Timer

Logic

Regulation
Comparator

B3

A3

Current Limit

Detect

D3

C3

0.39:

C1

IN

Gnd

C2

1PF

8

V to

40V

RON/SD

C6

0.022

PF

0.1

PF

C3

1PF

0.

1

PF

C4

B1

V

IN

V

OUT

C5

D1

D2

C1

2.49k

R3

2.49k

R2

PF10

PF10

5V

LM34919

15 PH

L1

R

6 0:

C8C7

2.5V

0.022

PF

R

4

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Output Ripple Control

Figure 2. Lowest Cost Configuration

Option B) Intermediate Ripple Configuration: This configuration generates less ripple at V

OUT

than

option A above by the addition of one capacitor (Cff) across R2, as shown in Figure 3.

Figure 3. Intermediate Ripple Configuration

Since the output ripple is passed by Cff to the FB pin with little or no attenuation, R4 can be reduced so
the minimum ripple at V

is ≊25 mVp-p. The minimum value for Cff is calculated from:

OUT

where t
feedback resistors. See Figure 8.

Option C) Minimum Ripple Configuration: To obtain minimum ripple at V
C9, and C10 are added to generate the required ripple for the FB pin. In this configuration, the output
ripple is determined primarily by the ESR of the output capacitance and the inductor’s ripple current.

The ripple voltage required by the FB pin is generated by R5, C10, and C9 since the SW pin switches
from -1V to VIN, and the right end of C10 is a virtual ground. The values for R5 and C10 are chosen to
generate a 50-100 mVp-p triangle waveform at their junction. That triangle wave is then coupled to the FB
pin through C9. The following procedure is used to calculate values for R5, C10 and C9:

SNVA250A–June 2007–Revised April 2013 AN-1650 LM34919 Evaluation Board

is the maximum on-time (at minimum VIN), and R2//R3 is the parallel equivalent of the

ON(max)

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, R4 is set to 0Ω, and R5,

OUT

(2)

3

FB

SW

R4

BST

VCC

ISEN

SGND

VIN

R1

43.2k

SS

RTN

Gnd

D1

A1

A2

On

Timer

Minimum

Off

Timer

Logic

Regulation
Comparator

B3

A3

Current Limit

Detect

D3

C3

0:

C1

IN

Gnd

C2

R5

1PF

8

V to

40V

RON/SD

C6

0.022

PF

0.1

PF

C3

1PF

0.

1

PF

C4

B1

V

IN

V

OUT

3300

pF

C10

C5

D1

D2

C1

2.49k

R3

2.49k

R2

C9

0.1

P

F

PF10

PF10

5V

LM34919

15 PH

L1

R

6 0:

C8C7

2.5V

0.022

PF

8.87

k:

R5 x C10 =

(8V - 4.63V) x 875 ns

0.1V

= 29.5 x 10

-6

R5 x C10 =

(VIN ± VA) x t

ON

'V

Monitor The Inductor Current

1) Calculate the voltage VA:

VA= V

– (VSWx (1 – (V

OUT

where VSWis the absolute value of the voltage at the SW pin during the off-time (typically 1V), and VINis
the minimum input voltage. For this circuit, VAcalculates to 4.63V. This is the approximate DC voltage at
the R5/C10 junction, and is used in the next equation.

2) Calculate the R5 x C10 product:

where tONis the maximum on-time (≊875 ns), VINis the minimum input voltage, and ΔV is the desired
ripple amplitude at the R5/C10 junction, 100 mVp-p for this example.

R5 and C10 are then chosen from standard value components to satisfy the above product. Typically C10
is 3000 to 5000 pF, and R5 is 10kΩ to 300 kΩ. C9 is chosen large compared to C10, typically 0.1 µF. See

Figure 4 and Figure 8.

))) (3)

OUT/VIN

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(4)

(5)

Figure 4. Minimum Output Ripple Configuration

6 Monitor The Inductor Current

The inductor’s current can be monitored or viewed on a scope with a current probe. Remove R6, and
install an appropriate current loop across the two large pads where R6 was located. In this way the
inductor’s ripple current and peak current can be accurately determined.

7 Scope Probe Adapters

Scope probe adapters are provided on this evaluation board for monitoring the waveform at the SW pin,
and at the circuit’s output (V
switching waveforms. The probe adapters are suitable for Tektronix P6137 or similar probes, with a 0.135”
diameter.

8 Minimum Load Current

The LM34919 requires a minimum load current of ≊1 mA to ensure the boost capacitor (C5) is recharged
sufficiently during each off-time. In this evaluation board, the minimum load current is provided by the
feedback resistors allowing the board’s minimum load current at V

4

AN-1650 LM34919 Evaluation Board SNVA250A–June 2007–Revised April 2013

), without using the probe’s ground lead which can pick up noise from the

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to be specified at zero.

OUT

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