User's Guide
SNVA248–October 2007
AN-1646 LM3102 Demonstration Board Reference Design
1 Introduction
The LM3102 Step Down Switching Regulator features all required functions to implement a cost effective,
efficient buck power converter capable of supplying 2.5A to loads. The Constant On-Time (COT)
regulation scheme requires no loop compensation, results in a fast load transient response and simple
circuit implementation that allows a low component count, and consequently very small overall board
space is required for a typical application. The regulator can function properly even with an all ceramic
output capacitor network, and does not rely on the output capacitor’s ESR for stability. The operating
frequency remains constant with line variations due to the inverse relationship between the input voltage
and the on-time. Protection features include output over-voltage protection, thermal shutdown, VCCundervoltage lock-out, gate drive under-voltage lock-out. The LM3102 is available in the thermally enhanced
eTSSOP-20 package.
This user's guide details the design of a demonstration board which provides a 3.3V output voltage with
2.5A load capability for a wide input voltage range from 8V to 42V. The demonstration board schematic,
PCB layout, Bill of Materials, and circuit design descriptions are shown. Typical performance and
operating waveforms are also provided for reference.
2 Demonstration Board Schematic
Figure 1. LM3102 Demonstration Board Schematic
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Quick Setup Procedures
3 Quick Setup Procedures
Table 1. Demonstration Board Quick Setup Procedures
Step Description Notes
1 Connect a power supply to VIN terminals VINrange: 8V to 42V
2 Connect a load to VOUT terminals I
3 SD (JP1) should be left open for normal operation. Short this jumper to shutdown
4 Set VIN= 18V, with 0A load applied, check V
5 Apply 2.5A load and check V
6 Short output terminals and check the short circuit current with an ammeter Nominal 2.95A
7 Short SD (JP1) to check the shutdown function
4 Performance Characteristics
Table 2. Demonstration Board Performance Characteristics
Description Symbol Condition Min Typ Max Unit
Input Voltage V
Output Voltage V
Output Current I
Output Voltage Ripple V
Output Voltage Regulation ΔV
Efficiency VIN= 8V 84 92 %
Output Short Current Limit I
OUT
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range: 0A to 2.5A
OUT
with a voltmeter Nominal 3.3V
OUT
Nominal 3.3V
OUT
OUT
OUT
IN
8 18 42 V
3.2 3.3 3.4 V
0 - 2.5 A
(Ripple) - - 50 mVp-p
OUT
ALL VINand I
Conditions -3 3 %
OUT
VIN= 24V 73 85
VIN= 42V 62 79
(I
= 0.1A to 2.5A)
OUT
LIM-SC
2.95 A
5 Design Procedure
The LM3102 is easy to use compared with other devices available on the market because it integrates all
key components, including both the main and synchronous power MOSFETs, in a single package and
requires no loop compensation owing to the use of the Constant On-Time (COT) hysteretic control
scheme. The design of the demonstration board is detailed below.
Design Parameters:
VIN= 8V to 42V, typical 18V
V
= 3.3V
OUT
I
= 2.5A
OUT
2
AN-1646 LM3102 Demonstration Board Reference Design SNVA248–October 2007
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V
OUT
x (VIN - V
OUT
)
ILR x f
SW
x V
IN
L =
R1 t
1.3 x 10
-10
V
IN(MAX)
x 150 ns
V
OUT
1.3 x 10
-10
x f
SW
R1 =
R3 = 2.21 k:
- 1
V
OUT
0.8
= 6.91 k:
=
V
OUT
0.8
R3
R4
- 1
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Step 1: Calculate the feedback resistors
The ratio of the feedback resistors can be calculated from the following equation:
As a general practice, R3 and R4 should be chosen from standard 1% resistor values in the range of
1.0 kΩ to 10 kΩ satisfying the above ratio. Now, select R4 = 2.21 kΩ, with V
Step 2: Calculate the on-time setting resistor
The switching frequency fSWof the demonstration board is affected by the on-time tonof the LM3102, which
is determined by R1. If fSWand V
For this demonstration board design, V
R1 = 50.8 kΩ. To ensure that the on-time is larger than the minimum limit, which is 150 ns, the value of
R1 must satisfy the following equation:
Now the maximum VINis 42V, the calculated R1 satisfies Equation 4.
OUT
are determined, R1 can be calculated as follows:
OUT
= 3.3V and fSW= 500 kHz are chosen. As a result,
OUT
Design Procedure
(1)
= 3.3V,
(2)
(3)
(4)
Step 3: Determine the inductance
The main parameter affected by the inductor is the amplitude of the inductor current ripple ILR. Once ILRis
selected, L can be determined by:
For this demonstration board design, ILR= 0.5A is selected. Now VIN= 18V, V
= 3.3V, and
OUT
fSW= 500 kHz. As a result, L = 10.78 µH.
(5)
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Figure 2. Inductor Selection for V
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OUT
= 3.3V
3
C5 x 0.8V
t
SS
=
8 PA
I
OUT
x t
on
'V
IN
CIN =
Design Procedure
Step 4: Determine the value of other components
C1 and C2: The function of the input capacitor is to supply most of the main MOSFET current during the
on-time, and limit the voltage ripple at the VIN pin, assuming that the voltage source feeding to the VIN pin
has finite output impedance. If the voltage source’s dynamic impedance is high (effectively a current
source), the input capacitor supplies the average input current, but not the ripple current. At maximum
load current, when the main MOSFET turns on, the current to the VIN pin suddenly increases from zero to
the lower peak of the inductor’s ripple current and ramps up to the higher peak value. It then drops to zero
at turn-off. The average current during the on-time is the load current. For a worst case calculation, the
input capacitor must be capable of supplying this average load current during the maximum on-time. The
input capacitor is calculated from:
where:
CIN= C1 + C2 is the input capacitor
I
is the load current
OUT
tonis the maximum on-time
ΔVINis the allowable ripple voltage at V
In this demonstration board, two 10 µF capacitors connecting in parallel are used.
C3: C3’s purpose is to help avoid transients and ringing due to long lead inductance at the VIN pin. A low
ESR 0.1 µF ceramic chip capacitor located close to the LM3102 is used in this demonstration board.
C4: A 33 nF high quality ceramic capacitor with low ESR is used for C4 since it supplies a surge current to
charge the main MOSFET gate driver at turn-on. Low ESR also helps ensure a complete recharge during
each off-time.
C5: The capacitor at the SS pin determines the soft-start time, that is, the time for the reference voltage at
the regulation comparator and the output voltage to reach their final value. The time is determined from
the following equation:
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(6)
IN
(7)
In this demonstration board, a 10 nF capacitor is used, and the corresponding soft-start time is about
1 ms.
C8: The capacitor on the VCCoutput provides not only noise filtering and stability, but also prevents false
triggering of the VCCUVLO at the main MOSFET on/off transitions. C8 should be no smaller than 680 nF
for stability, and should be a good quality, low ESR, ceramic capacitor. In this demonstration board, a 1 µF
capacitor is used.
C9: If the output voltage is higher than 1.6V, C9 is needed in the Discontinuous Conduction Mode to
reduce the output ripple. In this demonstration board, a 10 nF capacitor is used.
C10 and C11: The output capacitor should generally be no smaller than 10 µF. Experimentation is usually
necessary to determine the minimum value for the output capacitor, as the nature of the load may require
a larger value. A load which creates significant transients requires a larger output capacitor than a fixed
load. In this demonstration board, two 47 µF capacitors are connected in parallel to provide a low output
ripple.
C12: C12 is a small value ceramic capacitor located close to the LM3102 to further suppress high
frequency noise at V
. A 100 nF capacitor is used in this demonstration board.
OUT
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6 PC Board Layout
The LM3102 regulation, over-voltage, and current limit comparators are very fast so they will respond to
short duration noise pulses. Layout is therefore critical for optimum performance. It must be as neat and
compact as possible, and all external components must be as close to their associated pins of the
LM3102 as possible. The loop formed by the input capacitors (C1 and C2), the main and synchronous
MOSFET internal to the LM3102, and the PGND pin should be as small as possible. The connection from
the PGND pin to the input capacitors should be as short and direct as possible. Vias should be added to
connect the ground of the input capacitors to a ground plane, located as close to the capacitor as
possible. The bootstrap capacitor C4 should be connected as close to the SW and BST pins as possible,
and the connecting traces should be thick. The feedback resistors and capacitor R3, R4, and C9 should
be close to the FB pin. A long trace running from V
impedance node. Ground R4 directly to the AGND pin (pin 7). The output capacitor C10, C11 should be
connected close to the load and tied directly to the ground plane. The inductor L1 should be connected
close to the SW pin with as short a trace as possible to reduce the potential for EMI (electromagnetic
interference) generation. If it is expected that the internal dissipation of the LM3102 will produce excessive
junction temperature during normal operation, making good use of the PC board’s ground plane can help
considerably to dissipate heat. The exposed pad on the bottom of the LM3102 IC package can be
soldered to the ground plane, which should extend out from beneath the LM3102 to help dissipate heat.
The exposed pad is internally connected to the LM3102 IC substrate. Additionally the use of thick traces,
where possible, can help conduct heat away from the LM3102. Using numerous vias to connect the die
attached pad to the ground plane is a good practice. Judicious positioning of the PC board within the end
product, along with the use of any available air flow (forced or natural convection) can help reduce the
junction temperature.
PC Board Layout
to R3 is generally acceptable since this is a low
OUT
Figure 3. LM3102 Demonstration Board PCB Top Overlay
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PC Board Layout
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Figure 4. LM3102 Demonstration Board PCB Top View
Figure 5. LM3102 Demonstration Board PCB Bottom View
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7 Bill of Materials
Designation Description Size Manufacturer Part # Vendor
C1, C2 Cap 10µF 50V Y5V 1210 GRM32DF51H106ZA01L muRata
C3 Cap MLCC 0.1µF 50V X7R 0603 ECJ1VB1H104K Panasonic
C4 0603/X7R/33000pF/25V 0603 GRM188R71E333KA01B muRata
C5, C9 0603/X7R/10000pF/50V 0603 GRM188R71H103KA01B muRata
C8 0603/X5R/1µF/10V 0603 GRM188R61A105KA61B muRata
C10, C11 Cap MLCC 47µF 6.3V X5R 1210 ECJ4YB0J476M Panasonic
C12 0603/X7R/0.1µF/25V 0603 GRM188R71E104KA01B muRata
R1 Resistor Chip 51.1kΩ F 0603 CRCW06035112F Vishay
R3 Resistor Chip 6.81kΩ F 0603 CRCW06036811F Vishay
R4 Resistor Chip 2.21kΩ F 0603 CRCW06032211F Vishay
L1 Inductor 10µH 4.40A POWER-CHOKE 10.3 × 10.5 × 4 CDRH104RNP-100NC Sumida
SMD-Power Choke WE-TPC 3.6A Type XLH 10 × 10 × 3.8 744066100 Wurth
U1 IC LM3102 eTSSOP-20 LM3102MH Texas
PCB LM3102 demo board Texas
Bill of Materials
Instruments
Instruments
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Typical Performance and Waveforms
8 Typical Performance and Waveforms
All curves and waveforms are taken at VIN= 18V with the demonstration board and TA= 25°C unless
otherwise specified.
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Efficiency vs Load Current V
(V
= 3.3V) (V
OUT
Regulation vs Load Current
OUT
OUT
= 3.3V)
Continuous Mode Operation Discontinuous Mode Operation
(V
= 3.3V, 2.5A Loaded) (V
OUT
= 3.3V, 0.1A Loaded)
OUT
8
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Typical Performance and Waveforms
DCM to CCM Transition (V
(V
= 3.3V, 0.1A - 2.5A Load) Current slew-rate: 2.5A/µs)
OUT
= 3.3V, 0.25A - 2.5A Load,
OUT
Power Up Enable Transient
(V
Load Transient
= 3.3V, 2.5A Loaded) (V
OUT
= 3.3V, 2.5A Loaded)
OUT
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Shutdown Transient
(V
= 3.3V, 2.5A Loaded)
OUT
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