Texas Instruments AN-1504 LP38853S-ADJ User Manual

1 Introduction
This board is designed to allow the evaluation of the LP38853S-ADJ Voltage Regulator. Each board is assembled and tested in the factory. This evaluation board has the TO-263 7-lead package mounted, and the output voltage is set to 1.20V.
2 General Description
The device has been designed to work with 10 µF input and output ceramic capacitors, and 1µF bias capacitor. Footprints areas for CINand C
3 Operation
User's Guide
SNVA178C–November 2006–Revised April 2013
AN-1504 LP38853S-ADJ Evaluation Board
will allow for a variety of sizes.
OUT
The input voltage, applied between VINand GND, should be at least 1.0V greater than V than the applied V
The bias voltage, applied between V no more than the maximum of 5.5V.
Loads can be connected to V V
and VINtest points are provided on the board to allow accurate measurements directly onto the input
OUT
and output pins of the device, eliminating any voltage drop on the PCB traces or connecting wires to the load.
4 Setting V
OUT
The output voltage is set using the external resistive divider R1 and R2. The output voltage is given by the formula:
V
= V
OUT
It is recommended that the values selected for R1 and R2 are such that the parallel value is less than 10 k. This is to prevent internal parasitic capacitances on the ADJ pin from interfering with the FZpole set by R1 and CFF.
The LP38853S-ADJ Evaluation board is assembled with a 1.40 k±1% resistor for R1, and a 1.00 k ±1% resistor for R2. This sets V
5 Selecting C
A capacitor placed across the gain resistor R1 will provide additional phase margin to improve load transient response of the device. This capacitor, CFF, in parallel with R1, will form a zero in the loop response given by the formula:
FZ= (1 / (2 × π × CFF× R1) ) (2)
The value for CFFshould be selected to set a zero frequency (FZ) between 10 kHz and 15 kHz using the formula:
CFF= 1 / (2 × π × FZ× R1) (3)
and no greater
voltage.
BIAS
and GND should be above the minimum bias voltage of 3.0V, and
BIAS
with reference to GND.
OUT
× (1 + (R1 / R2)) (1)
ADJ
to 1.20V.
OUT
FF
OUT
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SNVA178C–November 2006–Revised April 2013 AN-1504 LP38853S-ADJ Evaluation Board
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Enable Function
The closest standard 10% value is usually adequate for CFF. The LP38853-ADJ Evaluation board is assembled with a 0.01 μF capacitor for CFF. This sets FZto
approximately 11.4 kHz.
Figure 1. 10mA to 3A Load Transient Response Figure 2. 1A to 3A Load Transient Response
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6 Enable Function
ON/OFF control is provided by supplying a logic level signal to the Enable pin. A minimum VENvalue of
1.3V is typically required at this pin to enable the LDO output. The LDO output will be shutdown when the VENvalue is typically 1.0V or less. The VENthreshold incorporates approximately 100mV of hysteresis.
In applications where the LP38853 is operated continuously the Enable pin can be connected directly to V
, or left open. The Enable pin has a 200 kΩ internal resistor to V
BIAS
care should be taken to minimize any capacitance on the Enable pin, as any capacitance will introduce an RC delay time on the Enable function.
. If the Enable pin is left open,
BIAS
2
AN-1504 LP38853S-ADJ Evaluation Board SNVA178C–November 2006–Revised April 2013
Figure 3. Enable Thresholds
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7 Soft-Start Function
V
will rise at an RC rate defined by the internal resistance of the SS pin (rSS), and the external capacitor
REF
(CSS) connected to the SS pin. This allows the output voltage to rise in a controlled manner until steady­state regulation is achieved. Typically, five time constants are recommended to assure that the output voltage is sufficiently close to the final steady-state value. During the soft-start time the output current can rise to the built-in current limit.
The LP38853S-ADJ Evaluation board is assembled with a 0.01 μF capacitor for CSS. This sets the soft­start time to approximately 750 μs.
Soft-Start Function
8 Power Dissipation
The TO-263 package alone has a junction to ambient thermal resistance (θJA) rating of 60°C/W. When mounted on the LP38853S evaluation board the θJArating is approximately 40°C/W.
Although there is only approximately 0.30 square inches of 1 ounce copper area immediately under the tab, the top copper surface area is extended to additional copper area on the bottom of the board by nine thermal vias.
With the 40°C/W thermal rating the LP38853S-ADJ evaluation board will dissipate a maximum of 2.5W with TA= 25°C.
Figure 4. V
Soft-Start
OUT
Figure 5. Maximum Power Dissipation vs Ambient Temperature
SNVA178C–November 2006–Revised April 2013 AN-1504 LP38853S-ADJ Evaluation Board
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IN (3)
BIAS (7)
GND (4)
(6) OUT
V
OUT
(J6)VIN (J3)
V
BIAS
(J7)
C
IN
10 PF
C
OUT
10 PF
C
BIAS
1 PF
GND (J4)
LP38853S-ADJ
(5) ADJ
R1
1.40 k:
R2
1.00 k:
C
FF
0.01 PF
VEN (J2)
SS (1)
C
SS
0.01 PF
EN (2)
TP3 TP7 TP2 TP1 TP4 TP5 TP6
TAB
IS
GND
LP38853S-ADJ
BIAS
OUT
GND
SS 1
2 3 4 5
IN
6 7
ADJ
EN
Pin Out
9 Pin Out
10 Schematic Diagram
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Figure 6. Pin Out
4
AN-1504 LP38853S-ADJ Evaluation Board SNVA178C–November 2006–Revised April 2013
Figure 7. Evaluation Board Schematic.
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R1
1.40 k:
R2
1.00 k:
V
BIAS
V
OUT
TP3
TP4
TP6
TP5
TP2
TP1
TP7
C5
C4 R1
R2
C2
C1
C3
VIN
EN
VOUT
BIAS
GND
U1
LP38853S
-ADJ
C
BIAS
(C2)
1 PF
C
IN
(C1)
10 PF
C
OUT
(C3)
10 PF
CSS (C5)
0.01 PF
CFF (C4)
0.01 PF
J2
J3
J4
J6
GND
V
IN
V
EN
J7
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11 PCB Layout
PCB Layout
Figure 8. Evaluation Board Component and Pin Layout
SNVA178C–November 2006–Revised April 2013 AN-1504 LP38853S-ADJ Evaluation Board
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5
Bill of Materials
12 Bill of Materials
ID Name Description Manufacturer Part Number
U1 U1 LP38853 Texas Instruments LP38853 C1 C
C2 C
C3 C
C4 C
C5 C
J2 V
J3 V
J4 GND Johnson Components 108-0903-001
J6 V
J7 V
R1 R1 CRCW 0805 1401 F
R2 R2
TP1 TP TP2 TP TP3 TP TP4 TP TP5 TP TP6 TP TP7 TP
BIAS
OUT
FF
SS
EN
IN
OUT
BIAS
GND
OUT
BIAS
IN
SS
EN
ADJ
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Capacitor: 10 µF; ±10%; MLCC; 10V;
X7R; 1210
Capacitor: 1 µF;, ±10%; MLCC; 10V;
X7R; 0805
Capacitor: 10 µF;, ±10%; MLCC; 10V;
X7R; 1210
Capacitor: 0.01 µF;, ±10%; MLCC;
10V; X7R; 0805
Capacitor: 0.01 µF; ±10%;, MLCC;
10V; X7R; 0805
Banana Jack : Insulated Solder
Terminal; White
Banana Jack : Insulated Solder
Terminal; Red
AVX 1210ZC106KAT2A
1210ZC106KAT2A
0805ZC105KAT2A
0805YC103KAT2A
0805YC103KAT2A
108-0901-001
108-0902-001
Banana Jack : Insulated Solder
Terminal; Black
Banana Jack : Insulated Solder
Terminal; Orange
Banana Jack : Insulated Solder
Terminal; Blue
108-0906-001
108-0910-001
Resistor: 1.40 k, ±1%; Thick Film;
250 mW; ±100 ppm; 0805
Resistor: 1.00 k, ±1%; Thick Film; CRCW 0805 1001 F
VISHAY DALE
250 mW; ±100 ppm; 0805
IN
Turret Terminal : Mounting Hole
Diameter = 0.062”
Keystone 1593–2
6
AN-1504 LP38853S-ADJ Evaluation Board SNVA178C–November 2006–Revised April 2013
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