SN54CBT16209, SN74CBT16209A
18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006K – NOVEMBER 1992 – REVISED MA Y 1998
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
5-Ω Switch Connection Between Two Ports
D
TTL-Compatible Input Levels
D
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), 300-mil Shrink
Small-Outline (DL), and 380-mil Fine-Pitch
Ceramic Flat (WD) Packages
description
The SN54CBT16209 and SN74CBT16209A
devices provide 18 bits of high-speed
TTL-compatible bus switching or exchanging.
The low on-state resistance of the switches allows
connections to be made with minimal propagation
delay .
The devices operate as an 18-bit bus switch or a
9-bit bus exchanger, which provides data
exchanging between the four signal ports via the
data-select (S0, S1, S2) terminals.
The SN54CBT16209 is characterized for
operation over the full military temperature range
of –55°C to 125°C. The SN74CBT16209A is
characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
INPUTS/OUTPUTS
S2 S1 S0 A1 A2
FUNCTION
L L L Z Z Disconnect
L LH B1 Z A1 port = B1 port
L HL B2 Z A1 port = B2 port
L HH Z B1 A2 port = B1 port
H LL Z B2 A2 port = B2 port
H LH Z Z Disconnect
H HL B1 B2
A1 port = B1 port
A2 port = B2 port
H H H B2 B1
A1 port = B2 port
A2 port = B1 port
Copyright 1998, Texas Instruments Incorporated
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S0
1A1
1A2
GND
2A1
2A2
V
CC
3A1
3A2
GND
4A1
4A2
5A1
5A2
GND
6A1
6A2
7A1
7A2
GND
8A1
8A2
9A1
9A2
S1
S2
1B1
1B2
2B1
2B2
GND
3B1
3B2
GND
4B1
4B2
5B1
5B2
GND
6B1
6B2
7B1
7B2
GND
8B1
8B2
9B1
9B2
SN54CBT16209 ...WD PACKAGE
SN74CBT16209A . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54CBT16209, SN74CBT16209A
18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006K – NOVEMBER 1992 – REVISED MA Y 1998
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
9B2
9B1
1B2
1B1
9A2
9A1
1A2
1A1
S0
S1
S2
2
3
23
24
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48
47
46
45
26
25
SN54CBT16209, SN74CBT16209A
18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006K – NOVEMBER 1992 – REVISED MA Y 1998
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 2): DGG package 89°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 93°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 94°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
SN54CBT16209 SN74CBT16209A
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 4 5.5 4 5.5 V
V
IH
High-level control input voltage 2 2 V
V
IL
Low-level control input voltage 0.8 0.8 V
T
A
Operating free-air temperature –55 125 –40 85 °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP‡MAX UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 0, VI = 5.5 V 10
I
I
VCC = 5.5 V, VI = 5.5 V or GND ±1
µ
A
I
CC
VCC = 5.5 V, IO = 0, VI = VCC or GND 3 µA
∆I
CC
§
Control inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND 2.5 mA
C
i
Control inputs VI = 3 V or 0 4 pF
C
io(OFF)
VO = 3 V or 0, S0, S1, or S2 = V
CC
7.5 pF
VCC = 4 V,
TYP at VCC = 4 V
VI = 2.4 V, II = 15 mA
r
¶
II = 64 mA 4 8
Ω
on
VCC = 4.5 V
V
I
=
0
II = 30 mA 4 8
VI = 2.4 V, II = 15 mA 6 15
‡
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
§
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
¶
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
SN54CBT16209, SN74CBT16209A
18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006K – NOVEMBER 1992 – REVISED MA Y 1998
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN54CBT16209 SN74CBT16209A
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V
VCC = 5 V
± 0.5 V
VCC = 4 V
VCC = 5 V
± 0.5 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
t
pd
†
A or B B or A 0.8* 0.35 0.25 ns
t
pd
S A or B 14 2 13.1 9.9 1.5 9 ns
t
en
S A or B 16 1.7 15.3 10.3 1.5 9.8 ns
t
dis
S A or B 14.5 1 13.2 9.3 1.5 8.8 ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
V
OH
V
OL
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500 Ω
500 Ω
t
PLH
t
PHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5 V1.5 V
1.5 V 1.5 V
3 V
0 V
1.5 V 1.5 V
V
OH
V
OL
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH – 0.3 V
0 V
Input
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
Open
7 V
Open
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as ten.
G. t
PLH
and t
PHL
are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 1999, Texas Instruments Incorporated
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