TERIDIAN Semiconductor 73S8024C Technical data
73S8024C
Smart Card Interface
Simplifying System Integration™
DATA SHEET
April 2009
DESCRIPTION
The Teridian 73S8024C is a single smart card
interface IC. It provides full electrical compliance
with ISO-7816-3, EMV 4.0 and NDS specifications
1
Interfacing with the system controller is done through
the control bus, composed of digital inputs to control
the interface, and one interrupt output to inform the
system controller of the card presence and faults.
Data exchange with the card is managed from the
system controller using the I/O line (and eventually
the auxiliary I/O lines). Hardware support for
auxiliary I/O lines, C4 / C8 contacts, is provided.
The card clock signal can be generated by an on-chip
oscillator using an external crystal or by connection to
a clock signal coming from the sy stem co ntrolle r.
The Teridian 73S8024C device incorporates an
ISO-7816-3 activation/deactivation sequencer that
controls the card signals. Level shifters drive the
card signals with the selected card voltage (3 V or
5 V), coming from an internal DC-DC converter.
With its high-efficiency DC-DC converter, the
Teridian 73S8024C is a cost-effective solution for
any smart card reader application to be powered
from a single 2.7 V to 3.6 V power supply.
Emergency card deactivation is initiated upon card
extraction or upon any fault generated by the
protection circuitry. The fault can be a V
power supply) or a V
a card over-current,
(card power supply) failure,
CC
an over-heating fault.
or
(digital
DD
ADVANTAGES
• The only smart card interface IC firmwar e
compatible with the TDA8004 operating with a
single 2.7 V to 3.6 V power supply (allows
removal of 5 V from the system)
• The inductor-based DC-DC converter provides
higher current and efficiency than the usual
charge-pump capacitor-based converters
Ideal for battery-powered applications
Suitable for high current cards and SAMs:
(100 mA max)
• Power down mode: 2 µA typical
FEATURES
• Card Interface:
Complies with ISO-7816-3, EMV 4.0 and NDS
.
A DC-DC Converter provides 3V / 5V to the
card from an external power supply input
High-efficiency converter: > 80% @
=3.3 V, VCC=5 V and I
V
DD
CC
Up to 100 mA supplied to the card
ISO-7816-3 Activation / Deactivation
sequencer with emergency automated
deactivation on card removal or fault
detected by the protection circuitry
Protection includes 2 voltage supervisors
which detect voltage drops on card V
on V
The V
power supplies
DD
voltage supervisor threshold value
DD
can be externally adjusted
True over-current detection (150 mA max.)
2 card detection inputs, 1 for each possible
user polarity
Auxiliary I/O lines, for C4/C8 contact signals
Card clock up to 20 MHz
• System Controller Interface:
3 Digital inputs control the card activ ation /
deactivation, card reset and card voltage
4 Digital inputs control the card clock
(division rate and card clock stop modes)
1 Digital output, interrupt to the syst em
controller, allows the system controller to
monitor the card presence and faults.
Crystal oscillator or host clock, up to 27 MHz
• Power Supply: V
2.7 V to 3.6 V
DD
• Power Down mode
• 6 kV ESD Protection on the card interface
• Package: SO28
APPLICATIONS
• Set-Top-Boxes , DVD / HDD Recorders
• Point of Sales and Transaction Terminals
• Control Access and Identification
1
Pending NDS approval.
= 65 mA
CC
and
1
Rev. 1.3 © 2009 Teridian Semiconductor Corporation 1
73S8024C Data Sheet DS_8024C_023
ICC I/O BUFFERS
VDD VOLTAGE SUPERVISOR
VOLTAGE REFERENCE
XTAL
OSC
CLOCK
GENERATION
DIGITAL
CIRCUITRY
&
FAULT LOGIC
VDD FAULT
V
CC
FAULT
Int_Clk
VDD VDD
VCC
RST
CLK
PRES
PRES
XTALIN
XTALOUT
CLKDIV1
CLKDIV2
GND
TEMP FAULT
NC
1
2
3
5
6
7
9
10
11
12
13
14
15
17
16
21
20
19
18
26
25
24
23
28
27
ISO-7816-3
SEQUENCER
R-C
OSC.
DC-DC
CONVERTER
ICC RESET
BUFFER
ICC CLOCK
BUFFER
OVER
TEMP
PWRDN
I/O
AUX1
AUX2
IOUC
AUX1UC
AUX2UC
VDDF_ADJ
RSTIN
CMDVCC
5V/#V
OFF
8
GND
4
6
LIN
6
22
GND
ICC FAULT
FUNCTIONAL DIAGRAM
Pin number reference to SO28 Package
Figure 1: 73S8024C Block Diagram
2 Rev. 1.3
DS_8024C_023 73S8024C Data Sheet
Table of Contents
1 Pin Description .................................................................................................................................... 4
1.1
Card Interface ............................................................................................................................... 4
Miscellaneous Inputs and Outputs ................................................................................................ 4
1.2
Power supply and ground ............................................................................................................. 4
1.3
Microcontroller Interface ............................................................................................................... 5
1.4
System Controller Interface ............................................................................................................... 6
2
Oscillator .............................................................................................................................................. 6
3
DC-DC Converter – Card Power Supply ........................................................................................... 7
4
Over-temperature Monitor .................................................................................................................. 7
5
Voltage Supervision ........................................................................................................................... 8
6
Power Down ......................................................................................................................................... 8
7
Activation Sequence ........................................................................................................................... 9
8
Deactivation Sequence ..................................................................................................................... 10
9
OFF and Fault Detection .................................................................................................................. 11
10
I/O Circuitry and Timing ................................................................................................................... 12
11
Typical Application Schematic ........................................................................................................ 13
12
Electrical Specification ..................................................................................................................... 14
13
13.1
Absolute Maximum Ratings ........................................................................................................ 14
Recommended Operating Conditions ......................................................................................... 14
13.2
Card Interface Characteristics .................................................................................................... 15
13.3
Digital Signals ............................................................................................................................. 18
13.4
DC Characteristics ...................................................................................................................... 18
13.5
Voltage / Temperature Fault Detection Circuits .......................................................................... 18
13.6
Mechanical Drawings (28-SO) .......................................................................................................... 19
14
Package Pin Designation (28-SO) ................................................................................................... 20
15
Ordering Information ........................................................................................................................ 21
16
Related Documentation .................................................................................................................... 21
17
Contact Information .......................................................................................................................... 21
18
Revision History
Figures
........................................................................................................................................ 22
Figure 1: 73S8024C Block Diagram ............................................................................................................. 2
Figure 2: Power Down Mode Operation
Figure 3: Activation Sequence – RSTIN low when CMDVCC goes low
Figure 4: Activation Sequence – RSTIN high when CMDVCC goes low
Figure 5: Deactivation Sequence ............................................................................................................... 11
Figure 6: Timing Diagram – Management of the Interrupt Line OFF
Figure 7: I/O and I/OUC State Diagram
Figure 8: I/O – I/OUC Delays: Timing Diagram
Figure 9: 73S8024C Typical Application Schematic
Figure 10: DC – DC Converter efficiency (V
Figure 11: DC – DC Converter Efficiency (V
Figure 12: 28 Lead SO
= 5 V) ................................................................................ 16
CC
= 3 V) ................................................................................ 16
CC
........................................................................................................ 9
....................................................... 9
................................................... 10
.......................................................... 11
...................................................................................................... 12
........................................................................................... 12
................................................................................... 13
................................................................................................................................ 19
Table
Table 1: Choice of VCC Pin Capacitor .......................................................................................................... 7
Rev. 1.3 3
73S8024C Data Sheet DS_8024C_023
1 Pin Description
1.1 Card Interface
Name
IO 11 Card I/O: Data signal to/from card. Includes a pull-up resistor to V
Pin
(SO)
Description
CC.
AUX1 13 AUX1: Auxiliary data signal to/from card. Includes a pull-up resistor to V
AUX2 12 AUX2: Auxiliary data signal to/from card. Includes a pull-up resistor to V
RST 16 Card reset: provides reset (RST) signal t o card.
CLK 15
Card clock: provides clock (CLK) signal to card. The rate of this clock is
determined by crystal oscillator frequency and CLKDIV selections.
PRES 10
Card Presence switch: active high indicates card is present. Includes a pulldown current source.
PRES 9
Card Presence switch: active low indicates c ard is present. Includes a pull-up
current source.
VCC 17
Card power supply: logically controlled by t he sequencer, output of DC-DC
converter. Requires an external filter capacitor to the card GND.
GND 14 Card ground.
1.2 Miscellaneous Inputs and Outputs
Name
XTALIN
XTALOUT
VDDF_ADJ
NC
Pin
(SO)
24
25
18
7
Description
Crystal oscillator input: can either be conne ct ed to crystal or driven as a source
for the card clock.
Crystal oscillator output: connected to crystal. Left open if XTALIN is being
used as an external clock input.
VDD fault threshold adjustment input: this pin can be used to adjust the V
value (that controls deactivation of the card). Must be left open if unused.
Non-connected pin.
1.3 Power supply and ground
CC.
CC.
DDF
Name
VDD 6, 21
Pin
(SO)
Description
System controller interface supply volt age, supply voltage for internal power
supply and DC-DC converter power supply source.
GND 4 DC-DC converter ground.
GND 22 Digital ground.
LIN 5 External inductor. Connect external inductor from pin 5 to VDD. Keep the
inductor close to pin 5.
4 Rev. 1.3
DS_8024C_023 73S8024C Data Sheet
1.4 Microcontroller Interface
Name
CMDVCC 19
5V/#V
Pin
(SO)
3
Description
Command V
converter to ramp the V
(negative assertion): Logic low on this pin causes the DC-DC
CC
supply to the card and initiates a card activation sequence.
CC
5 volt / 3 volt card sel ecti on: Logi c one select s 5 volt s fo r V
and card interface, logic
CC
low selects 3 volt operation. Whe n the part i s to be use d wit h a sin gle c ard voltage,
this pin should be tie d to e ither GND o r V
. However, it includes a high impedance
DD
pull-up resistor to default this pin hig h (sele ction of 5 V card) when unconnected.
PWRDN 8
Power Down control input (active high): When Power Down (PD) mode is
activated; all internal analog functions are disabled to place the 73S8024C in its
lowest power consumption mode. The PD mode is allowed only out of a card
session (= PWRDN high is not taken into account when CMDVCC = 0). Must be
tied to ground when the power down function is not used.
CLKDIV1
CLKDIV2
Sets the divide ratio from the XTALIN oscillator (or external clock input) to the card
1
clock. These pins include pull-down resistors.
2
CLKDIV1 CLKDIV2 Clock Rate
0 0 XTALIN/8
0 1 XTALIN/4
1 1 XTALIN/2
1 0 XTALIN
OFF 23
Interrupt signal to the processor (active low): Multi-function indicating fault
conditions and card presence. Open drain output configuration; it includes an
internal 20 kΩ pull-up to V
DD.
RSTIN 20 Reset Input: This signal is the res et command to the card.
I/OUC 26 System controller data I/O to/from the card. Includes internal pull-up resistor to V
AUX1UC 27
AUX2UC 28
System controller auxiliary data I/O to/from the card. Includes internal pull-up
resistor to V
DD.
System controller auxiliary data I/O to/from the card. Includes internal pull-up
resistor to V
DD.
DD.
Rev. 1.3 5
73S8024C Data Sheet DS_8024C_023
2 System Controller Interface
• 2 digital inputs allow direct control of the card int erface from the host as follows:
Pin CMDVCC: When low, starts an activation sequence if a card is present.
Pin 5V/#V: Defines the card voltage.
• The card I/O and Reset signals have their corresponding controller I/Os to be connected directly to
the host:
Pin RSTIN: controls the card reset signal (when enabled by the sequencer).
Pin I/OUC: data transfer to card I/O contact.
Pins AUX1UC and AUX2UC (auxiliary I/O l i nes as sociated to the auxiliary I/O lines to be
connected to the C4 and C8 card connector contact s).
• 2 digital inputs control the card clock frequen cy di vision rate: CLKDIV1 and CLKDIV2 define the card
clock frequency, from the input clock fre quency (crystal or external clock). The division rate is defined
as follows:
CLKDIV2 CLKDIV1 CLK
0 0
0 1 XTAL
1 0 ¼ XTAL
1 1 ½ XTAL
When the division rate is equal to 1 (CLKDIV2 =0 and CLKDIV 1 = 1), the duty-cycle of the
card clock depends on the duty-cycle and wavefor m of the signal applied on the pin XTALIN.
When other division rates are used, the 73S8024C circuitry guarantees a duty-cycle in the
range 45% to 55%, conforming to ISO-7816-3, E M V 4.0 and NDS specifications.
• Interrupt output to the host: As long as the car d i s not activated, the OFF pin informs the host about
the card presence only (low = no card in the reader). When CMDVCC is set low (Card activation
sequence requested from the host), a low level on OFF means a fault has been detected (e.g. card
removed during a card session, or voltage fault , or thermal / over-current fault) that automatically
initiates a deactivation sequence.
• Power Down: The PWRDN pin is a digit al input that allows the host controller to put the 73S8024C in
its Power Down state. This pin can only be activated out of a card session.
⅛ XTAL
3 Oscillator
The 73S8024C device has an on-chip oscillator that c an generate the smart card clock using an external
crystal (connected between the pins XTALI N and XTALOUT) to set the oscillator frequency. When the
card clock signal is available from another source, i t can be connected to the pin XTALIN, and the pin
XTALOUT should be left unconnected.
6 Rev. 1.3
DS_8024C_023 73S8024C Data Sheet
4 DC-DC Converter – Card Power Supply
An internal DC-DC converter provides the card powe r supply. This converter is able to provide either 3 V
or 5 V card voltage from the power supply applied on the V
controls the converter. Card voltage selection is carried out by the digital input 5V/#V.
The circuit is an inductive step-up converter/regulator. The external components required are 2 filter
capacitors on the power-supply input V
output filter capacitor on the card power supply V
step-up operation when V
and the input supply V
= 3.6 V, VCC =3 V) the circuit operates as a linear regulator.
(V
DD
is below a set point of 5.0 or 3.0 volts minus a comparator hysteresis voltage
CC
is less than the set point for VCC. When VDD is greater than the set point for VCC
DD
(next to the LIN pin, 100 nF + 10 µF), an inductor, and an
DD
. The circuit performs regulation by activat ing the
CC
Depending on the inductor values, the voltage converter can provide current on V
The circuit provides over-current protect i on and l im i ts I
sensed, the circuit initiates a deactivation sequence from the control logic and reports back to the host
controller a fault on the interrupt output OFF.
Choice of the inductor
The nominal inductor value is 10 µH, rated for 400 mA. The inductor is connected between LIN (pin 5 in
the SO package, pin 2 in the QFN package) and the V
meet a particular configuration (I
). The inductor should be located on the PCB as close as possible
CC_MAX
DD
to the LIN pin of the IC.
Choice of the V
capacitor
CC
Depending on the applications, the requirements in terms of both the V
transient currents that the interface must provide to the card are different. shows the
recommended capacitors for each V
power supply configuration and applicabl e specification.
CC
Table 1: Choice of VCC Pin Capaci to r
pin. The digital ISO-7816-3 sequencer
DD
as high as 100 mA.
to 150 mA. When an over-current condition is
CC
CC
voltage. The inductor value can be optimized to
minimum voltage and the
CC
Table 1
Specification Requirement Application
Min V
Specification
Allowed During
Transient Current
EMV 4.0 4.6 V 30 nAs
ISO-7816-3 4.5 V 20 nAs
Voltage
CC
Max Transient
Current Charge
Capacitor
Type
X5R/X7R w/
ESR < 100 mΩ
Capacitor
Value
3.3 µF
1 µF
Table 1: Choice of VCC Pin Capacitor
5 Over-temperature Monitor
A built-in detector monitors die temperature. When an over-temperature condition occurs, a card
deactivation sequence is initiated, and an error or fault condition is reported to the system controller.
Rev. 1.3 7
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