Terid i an Semic onductor Corporation makes no warranty for the use of it s products, other t han expressl y
contained in the Comp any’s warrant y detailed i n the Teridian Semiconduct or Corporation stan dard Terms
and C ondit ions. The company assumes no res ponsibility for an y errors which m ay appear in this
document, reserves the right to c hange devices or specific ations detailed herein at an y time without
notice and does not make any commitment to updat e the i nform ation contained herein . Accord in gly, the
reader is cau tioned to verify that this docum ent i s c urren t by comp ar i ng it to the latest vers ion on
http://www.teridian.com or by checking with your sal es representat i ve.
Terid i an Semic onductor Corp., 6440 Oak C anyon, Su ite 100 , Irvine, CA 92618
TEL (714) 508-8800, FAX (714) 508-8877, http://www.teridian.com
3.5.1 731 922 Mic r oD AA Pinout ............................................................................................ 15
4 Related Documentation ............................................................................................................... 15
5 Contact Information ..................................................................................................................... 15
Rev. 5.1 3
73M1922 Demo Board User M anual UM_1922_006
Figures
Figure 1 : MicroDAA S ystem Block Di agram
Figure 2 : 73M1922 Micr oDAA 20-Pin TS SOP Dem o Board Schematic Di agram
Figure 3: 73M1922 20-Pin TSSOP Demo Boar d: Top Sign al Layer
Figure 4: 73M1922 20-Pin TSSOP Demo Boar d: Laye r 2, Ground Plane
Figure 5: 73M1922 20-Pin TSSOP Dem o Board: Layer 3, Supply Plane
Figure 6: 73M1922 20-Pin TSSOP Demo Boar d: Bottom Signal Layer
Figure 7: 73M1922 20-Pin TSSOP Demo Boar d: Silk Sc r een Top
Figure 8: 73M1922 20-Pin TSSOP Demo Board: Silk Screen Bottom
Figure 9: 73M1902/73M1912 20-Pin TSS OP Pac kages: Pinout (top view)
Tables
Table 1: 73M1922 Demo Board Connectors
Table 2: 73M1922 Demo Board Configuration Settings
Table 3: JS 1 Host Interface Con nect or
Table 4: 73M1922 20-Pin TSSO P D emo B oar d Bi ll of Materials
Table 5: 73M1902 HIC 20-Pin TSSOP Package Pin Definitions
Ta bl e 6: 73M1912 LIC 20-Pi n TSSOP Package Pin Definitions
Shaded pins and names are optional depending on packages
1 Introduction
The 73M1922 MicroDAA Chipset D em o Board integrates sil icon D ata Access Ar r angem ent (DA A)
function along with Analog Fr o nt E nd functio ns chipsets for worldwide c omp lianc e.
The 73M1922 MicroDAA chipset co nsists of a 73M1902 and a 73M1912. The 73M1902 is the Host
Interface Chip ( HIC) providi ng a host microprocessor or DS P in terface by a synchronous serial port
(Modem Analog Front En d ( M AFE ) ) and the 73M1912 is the Line Interfac e C hip ( LIC) t o connect to a
telephone line.
The 73M1922 chipset is packaged in two 20-pin TSSOP or two 32-pin QFN pack ages for a v ery small
ph ysical dimension and offers l ow cost global DA A design.
The 73M1922 performs a modem codec funct i on that interfac es a Host/ D SP and the PSTN (Pu blic
Switc hed Telephone Network). The codec suppor ts data rat es up t o V.92 with cal l progress signal i ng. In
add i tion to the c odec functi o n, t he 73M192 2 Mic r oD AA ch ipset also performs other necessary DAA
functions, such as CI D (caller i dentification) , rin g detection, tip/ring polar ity reversal detecti on, on/off hook
switch contr ol, p ulse di al ing , regu l ation of loop current (DC-I V), l ine impedance matching, line in use and
parall el p ickup det ection.
All data and control inform ation between the LIC and the HIC is transferred across a low cost pulse
transformer barrier. Also all clock and synchronization information needed in LIC is embedded in this
data and control bit stream acros s the b ar r ier transfor mer rec eived from H IC an d recons tructed within
LIC. The LIC interface to tip/ring of the PSTN significantly lowers the number of external components and
their cost.
The DAA feature integrated in this chipset offers a configurable US, ETSI ES 203 021-2, or other World
Wide DAA capability to t he tel ephone line interface an d an auxiliary DAC with gain con trol for line
monitoring during the call pr ogress period.
Rev. 5.1 5
Figure 1: MicroDAA System Block Diagram
73M1922 Demo Board User M anual UM_1922_006
1.1 Package Contents
The 73M1922 Demo Board Kit includes:
• A 73 M 1922 D em o Board ( R ev. D1)
• The follo wing documents on CD:
• 73M1922 Demo Board User Manual (this document)
• 73M1822/73M1922 Data Sheet
• 73M1822/73M1922 Layout Guideline
• 73M 1x2 2 Wor ldwide Design Guide
1.2 Safety an d ES D Notes
Connecting live voltag es to the Demo Board syst em will result in potential l y hazard ous volt ages on the
boards.
Extreme caution should be taken when handling the Demo Boards after connection to
live voltages!
The Demo Boards are ESD sensitive! ESD precautions should be taken when handling
these boards!
1.3 Demo Board Options
The 73M1922 Demo Board has 20-pin right angle connect or s to plug on to a target DSP or CPU system.
Each has a 3 .3 V power recep tacle for powering on-b oar d cir cuits from target system or ext er nal p ower
supply, or power can be supplied through the 20-pin connector along with the other signals. The
73M1922 Demo Boar d allows the evaluat ion of the 73M1922 chipset for un iversal mod em , voice
app l icati on and inter fac e to a general DSP or C PU system use.
6 Rev. 5.1
UM_1922_006 73M1922 Demo Board User Manual
2 Connectors
Table 1 shows all the connectors and jumper s available on 73M192 2 M i croDAA Demo Board. JS1 is the
main connector for i nterfacing to a host proces sor or DSP b oar d. Li ne mon i tor/C al l progress mon it or
speaker and dri ver c ircu i ts are also on board. J1 is a mod ular connector for phone li ne connec tion and J4
is for power connection from the main board or an external power supply.
Table 1: 73M1922 Demo Board Connectors
Sche matic and PCB
Reference
JS1 3M CONN.
Name Description
20-pin connect or to interface 73M1922 Demo Boar d to a
10X2
HOS T controller m ai n boar d.
J1 RJ-11 Telephone l ine connector.
J2 3.3 V suppl y Plug for connectin g external 3.3 V DC power supply.
0 Ω population: Late FSB (Default for Samsung ARM9
Interface).
None: Early FSB.
R64 (32 QFN DB only) MODE SCLK mode:
0 Ω population: 32 Clock.
None: Continuous SCLK. (Default for Samsung ARM9
Interface)
* NOTE: Due to the packag e r estrictions, the MODE pin i s not available in a 20-pin TSSOP package.
And neither the Mode pin nor the TYP E pi n is avail able in 42-pin QFN package. User should choose the
right device opti on when or dering parts depending on th e clock m ode (32 clock or continuous ) and Frame
sync type (early or l ate frame sync) required. Refer to the ordering information section of the
73M1822/73M1922 Data Sheet.
Table 3: JS1 Host Interface Connector
PIN Number Name Description PIN Number Name Description
The following 73M1x22 documents ar e availab le from Teridian Semiconductor Corp or ation:
73M1822/73M1922 Dat a Sheet
73M1922 Demo Board User Manual (this document)
73M1822/73M1922 Layout Guideline
73M1x22 Worldw ide Design G uide
73M1822/73M1922 Evaluation System with Linux Softmodem User’s Guide
73M1x22/73M1x66B MicroDAA DC Control Loop Operation
73M1x22/ 73 M 1x 6 6 Mi cr oDAA Hy bri d O p er ation
5 Contact Information
For m or e i nform ation about Teridian Sem i conductor p r oduct s or to c heck the availability of the 73M1922,
contact us at:
644 0 Oak Canyon Road
Suite 100
Irvin e, CA 92618-5201