Telit Communications S p A GE864 Users Manual

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Page 1

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

Contents

1 OVERVIEW 5

2 HARDWARE COMMANDS 6

2.1 Turning ON the GE863-QUAD/PY 6

2.2 Turning OFF the GE863-QUAD/PY 8

2.2.1 Hardware shutdown 8

2.3 Hardware Unconditional Reboot 8

3 POWER SUPPLY 10

3.1 Power Supply Requirements 10

3.2 General Design Rules 11

3.2.1 Electrical design Guidelines 11

3.2.1.1 + 5V input Source Power Supply Design Guidelines 11

3.2.1.2 + 12V input Source Power Supply Design Guidelines 13

3.2.1.3 Battery Source Power Supply Design Guidelines 14

3.2.1.4 Battery Charge control Circuitry Design Guidelines 14

3.2.2 Thermal Design Guidelines 16

3.2.3 Power Supply PCB layout Guidelines 17

4 ANTENNA 18

4.1 GSM Antenna Requirements 18

4.2 GSM Antenna - PCB line Guidelines 19

4.3 GSM Antenna - installation Guidelines 20

5 SERIAL PORTS 20

5.1 MODEM SERIAL PORT 20

5.2 MODEM SERIAL PORT 2 (DEBUG) 22

5.3 RS232 level translation 23

5.4 5V UART level translation 25

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

6 MICROPHONE 27

6.1 Microphone line Characteristic and requirements 27

6.2 General Design Rules 30

6.3 Microphone Biasing 30

6.3.1 Balanced Microphone biasing 31

6.3.2 Unbalanced Microphone biasing 33

6.4 Microphone buffering 34

6.4.1 Buffered Balanced Mic. 34

6.4.2 Buffered Unbalanced (Single Ended) Mic. 37

7 SPEAKER 40

7.1 Speaker lines characteristics and requirements 40

7.2 General Design rules 42

7.2.1 Noise Filtering 43

7.3 Handset earphone design 43

7.4 Hands Free earphone (low power) design 45

7.5 Car Kit speakerphone design 45

8 GENERAL PURPOSE I/O 47

8.1 Using a GPIO pad as INPUT 47

8.2 Using a GPIO pad as OUTPUT 47

8.3 Using the Alarm Output GPIO6 48

8.4 Using the Buzzer Output GPIO7 48

9 CAMERA 49

9.1 Transchip Camera 49

9.1.1 Camera interface connectors 49

9.1.2 EVB for Transchip camera support 52

9.1.3 Block Diagram for supported cameras 53

9.1.4 Schematic Diagrams for supported cameras 54

9.1.5 Example usage script for camera 55

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

10 CONFORMITY ASSESSMENT ISSUES 57

11 SAFETY RECOMMANDATIONS 59

DOCUMENT CHANGE LOG 61

12 EVK 2 SCHEMATICS 62

13 EVB CAMERA SCHEMATICS 68

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

1 Overview

The aim of this document is the description of some hardware solutions useful for developing a

product with the Telit GE863-QUAD/PY module.

In this document all the basic functions of a mobile phone will be taken into account; for each one of them a proper hardware solution will be suggested and eventually the wrong solutions and common errors to be avoided will be evidenced. Obviously this document cannot embrace the whole hardware solutions and products that may be designed. The wrong solutions to be avoided shall be considered as mandatory, while the suggested hardware configurations shall not be considered mandatory, instead the information given shall be used as a guide and a starting point

for properly developing your product with the Telit GE863-QUAD/PY module. For further

hardware details that may not be explained in this document refer to the Telit GE863-QUAD/PY Product Description document where all the hardware information is reported.

NOTICE

The information presented in this document is believed to be accurate and reliable. However, no responsibility is assumed by Telit Communication S.p.A. for its use, nor any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent rights of Telit Communication S.p.A. other than for circuitry embodied in Telit products. This document is subject to change

without notice

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

2 Hardware Commands

2.1 Turning ON the GE863-QUAD/PY

To turn on the GE863-QUAD/PY the pad ON# must be tied low for at least 1 second and then released.

The maximum current that can be drained from the ON# pad is 0,1 mA.

A simple circuit to do it is:

ON#

Power ON impulse

GND

NOTE: don't use any pull up resistor on the ON# line, it is internally pulled up. Using pull up resistor may bring to latch up problems on the GE863-QUAD/PY power regulator and improper power on/off of the module. The line ON# must be connected only in open collector configuration.

NOTE: In this document all the lines that are inverted, hence have active low signals are labeled with a name that ends with a "#" or with a bar over the name.

NOTE: The GE863-QUAD/PY turns fully on also by supplying power to the Charge pad (provided there's a battery on the VBATT pads).

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Hardware User guide

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For example:

1- Let's assume you need to drive the ON# pad with a totem pole output of a +3/5 V microcontroller (uP_OUT1):

2- Let's assume you need to drive the ON# pad directly with an ON/OFF button:

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2.2 Turning OFF the GE863-QUAD/PY

The turning off of the device can be done in two ways:

• by software command (see GE863-QUAD/PY Software User Guide)

• by hardware shutdown

When the device is shut down by software command or by hardware shutdown, it issues to the network a detach request that informs the network that the device will not be reachable any more.

2.2.1 Hardware shutdown

To turn OFF the GE863-QUAD/PY the pad ON# must be tied low for at least 1 second and then released.

The same circuitry and timing for the power on shall be used.

The device shuts down after the release of the ON# pad.

TIP: To check if the device has powered off, the hardware line PWRCTL should be monitored. When PWRCTL goes low, the device has powered off.

2.3 Hardware Unconditional Reboot

To unconditionally Reboot the GE863-QUAD/PY, the pad RESET# must be tied low for at least 200 milliseconds and then released.

The maximum current that can be drained from the ON# pad is 0,15 mA.

A simple circuit to do it is:

Unconditional Reboot impulse

RESET#

GND

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Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

NOTE: don't use any pull up resistor on the RESET# line nor any totem pole digital output. Using pull up resistor may bring to latch up problems on the GE863-QUAD/PY power regulator and improper functioning of the module. The line RESET# must be connected only in open collector configuration.

TIP: The unconditional hardware reboot should be always implemented on the boards and software should use it as an emergency exit procedure.

For example:

1- Let's assume you need to drive the RESET# pad with a totem pole output of a +3/5 V microcontroller (uP_OUT2):

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Hardware User guide

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3 Power Supply

The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product overall performances, hence read carefully the requirements and the guidelines that will follow for a proper design.

3.1 Power Supply Requirements

The GE863-QUAD/PY power requirements are:

• Nominal Supply Voltage: 3.8 V

• Max Supply Voltage: 4.2 V

• Supply voltage range: 3.4 V - 4.2 V

• Max Peak current consumption (impulsive): 1.9 A

• Max Average current consumption during GPRS transmission (rms): 500 mA

• Max Average current consumption during VOICE/CSD transmission (rms): 270 mA

• Average current during Power Saving: ≈ 4 mA

• Average current during idle (Power Saving disabled) ≈ 19 mA

The GSM system is made in a way that the RF transmission is not continuous, else it is packed into bursts at a base frequency of about 216 Hz, the relative current peaks can be as high as about 2A. Therefore the power supply has to be designed in order to withstand with these current peaks without big voltage drops; this means that both the electrical design and the board layout must be designed for this current flow.

If the layout of the PCB is not well designed a strong noise floor is generated on the ground and the supply; this will reflect on all the audio paths producing an audible annoying noise at 216 Hz; if the voltage drop during the peak current absorption is too much, then the device may even shutdown as a consequence of the supply voltage drop.

TIP: The electrical design for the Power supply should be made ensuring it will be capable of a peak current output of at least 2 A.

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Hardware User guide

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3.2 General Design Rules

The principal guidelines for the Power Supply Design embrace three different design steps:

- the electrical design

- the thermal design.

- the PCB layout.

3.2.1 Electrical design Guidelines

The electrical design of the power supply depends strongly from the power source where this power is drained. We will distinguish them into three categories:

• +5V input (typically PC internal regulator output)

• +12V input (typically automotive)

• Battery

3.2.1.1 + 5V input Source Power Supply Design Guidelines

• The desired output for the power supply is 3.8V, hence there's not a big difference between the input source and the desired output and a linear regulator can be used. A switching power supply will not be suited because of the low drop out requirements.

• When using a linear regulator, a proper heat sink shall be provided in order to dissipate the power generated.

• A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks close to the GE863-QUAD/PY, a 100μF tantalum capacitor is usually suited.

• Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is rated at least 10V.

• A protection diode should be inserted close to the power input, in order to save the GE863QUAD/PY from power polarity inversion.

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An example of linear regulator with 5V input is:

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

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3.2.1.2 + 12V input Source Power Supply Design Guidelines

• The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suited and shall not be used. A switching power supply will be preferable because of its better efficiency especially with the 2A peak current load represented by the GE863-QUAD/PY.

• When using a switching regulator, a 500kHz or more switching frequency regulator is preferable because of its smaller inductor size and its faster transient response. This allows the regulator to respond quickly to the current peaks absorption.

• For car PB battery the input voltage can rise up to 15,8V and this should be kept in mind when choosing components: all components in the power supply must withstand this voltage.

• A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks, a 100μF tantalum capacitor is usually suited.

• Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is rated at least 10V.

• For Car applications a spike protection diode should be inserted close to the power input, in order to clean the supply from spikes.

• A protection diode should be inserted close to the power input, in order to save the GE863QUAD/PY from power polarity inversion. This can be the same diode as for spike protection.

An example of switching regulator with 12V input is:

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3.2.1.3 Battery Source Power Supply Design Guidelines

• The desired nominal output for the power supply is 3.8V and the maximum voltage allowed is 4.2V, hence a single 3.7V Li-Ion cell battery type is suited for supplying the power to the Telit GE863-QUAD/PY module.

The three cells Ni/Cd or Ni/MH 3,6 V Nom. battery types or 4V PB types MUST NOT BE USED DIRECTLY since their maximum voltage can rise over the absolute maximum

voltage for the GE863-QUAD/PY and damage it.

NOTE: DON'T USE any Ni-Cd, Ni-MH, and Pb battery types directly connected with GE863-QUAD/PY. Their use can lead to overvoltage on the GE863-QUAD/PY and damage it. USE ONLY Li-Ion battery types.

• A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks, a 100μF tantalum capacitor is usually suited.

• Make sure the low ESR capacitor (usually a tantalum one) is rated at least 10V.

• A protection diode should be inserted close to the power input, in order to save the GE863-

QUAD/PY from power polarity inversion. Otherwise the battery connector should be done in a way to avoid polarity inversions when connecting the battery.

• The battery capacity must be at least 500mAh in order to withstand the current peaks of 2A; the suggested capacity is from 500mAh to 1000mAh.

3.2.1.4 Battery Charge control Circuitry Design Guidelines

The charging process for Li-Ion Batteries can be divided into 4 phases:

• Qualification and trickle charging

• Fast charge 1 - constant current

• Final charge - constant voltage or pulsed charging

• Maintenance charge

The qualification process consists in a battery voltage measure, indicating roughly its charge status. If the battery is deeply discharged, that means its voltage is lower than the trickle charging threshold, then the charge must start slowly possibly with a current limited precharging process where the current is kept very low with respect to the fast charge value: the trickle charging.

During the trickle charging the voltage across the battery terminals rises; when it reaches the fast charge threshold level the charging process goes into fast charge phase.

During the fast charge phase the process proceeds with a current limited charging; this current limit depends on the required time for the complete charge and from the battery pack capacity. During this phase the voltage across the battery terminals still raises but at a lower rate.

Once the battery voltage reaches its maximum voltage then the process goes into its third state: Final charging. The voltage measure to change the process status into final charge is very

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important. It must be ensured that the maximum battery voltage is never exceeded, otherwise the battery may be damaged and even explode. Moreover for the constant voltage final chargers, the constant voltage phase (final charge) must not start before the battery voltage has reached its maximum value, otherwise the battery capacity will be highly reduced.

The final charge can be of two different types: constant voltage or pulsed. GE863-QUAD/PY uses constant voltage.

The constant voltage charge proceeds with a fixed voltage regulator (very accurately set to the maximum battery voltage) and hence the current will decrease while the battery is becoming charged. When the charging current falls below a certain fraction of the fast charge current value, then the battery is considered fully charged, the final charge stops and eventually starts the maintenance.

The pulsed charge process has no voltage regulation, instead the charge continues with pulses. Usually the pulse charge works in the following manner: the charge is stopped for some time, let's say few hundreds of ms, then the battery voltage will be measured and when it drops below its maximum value a fixed time length charging pulse is issued. As the battery approaches its full charge the off time will become longer, hence the duty-cycle of the pulses will decrease. The battery is considered fully charged when the pulse duty-cycle is less than a threshold value, typically 10%, the pulse charge stops and eventually the maintenance starts.

The last phase is not properly a charging phase, since the battery at this point is fully charged and the process may stop after the final charge. The maintenance charge provides an additional charging process to compensate for the charge leak typical of a Li-Ion battery. It is done by issuing pulses with a fixed time length, again few hundreds of ms, and a duty-cycle around 5% or less.

This last phase is not implemented in the GE863-QUAD/PY internal charging algorithm, so that the battery once charged is left discharging down to a certain threshold so that it is cycled from full charge to slight discharge even if the battery charger is always inserted. This guarantees that anyway the remaining charge in the battery is a good percentage and that the battery is not damaged by keeping it always fully charged (Li-Ion rechargeable battery usually deteriorate when kept fully charged).

Last but not least, in some applications it is highly desired that the charging process restarts when the battery is discharged and its voltage drops below a certain threshold, GE863QUAD/PY internal charger does it.

As you can see, the charging process is not a trivial task to be done; moreover all these operations should start only if battery temperature is inside a charging range, usually 5°C - 45°C.

The GE863-QUAD/PY measures the temperature of its internal component, in order to satisfy this last requirement, it's not exactly the same as the battery temperature but in common application the two temperature should not differ too much and the charging temperature range should be guaranteed.

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NOTE: For all the threshold voltages, inside the GE863-QUAD/PY all threshold are fixed in order to maximize Li-Ion battery performances and do not need to be changed.

NOTE: In this application the battery charger input current must be limited to less than 400mA. This can be done by using a current limited wall adapter as the power source.

3.2.2 Thermal Design Guidelines

The thermal design for the power supply heat sink should be done with the following specifications:

• Average current consumption during transmission @PWR level max (rms): 500mA

• Average current consumption during transmission @ PWR level min (rms): 100mA

• Average current during Power Saving: 4mA

• Average current during idle (Power Saving disabled) 19mA

• Average GPS current during Power Saving: 1mA

• Average GPS current during Tracking (Power Saving disabled) 60mA

NOTE: The average consumption during transmissions depends on the power level at which the device is requested to transmit by the network. The average current consumption hence varies significantly.

TIP: The thermal design for the Power supply should be made keeping an average consumption at the max transmitting level during calls of 500mA rms plus 60mA rms for GPS in tracking mode.

Considering the very low current during idle, especially if Power Saving function is enabled, it is possible to consider from the thermal point of view that the device absorbs current significantly only during calls.

If we assume that the device stays into transmission for short periods of time (let's say few minutes) and then remains for a quite long time in idle (let's say one hour), then the power supply has always the time to cool down between the calls and the heat sink could be smaller than the calculated one for 500mA maximum RMS current, or even could be the simple chip package (no heat sink).

Moreover in the average network conditions the device is requested to transmit at a lower power level than the maximum and hence the current consumption will be less than the 500mA, being usually around 150mA.

For these reasons the thermal design is rarely a concern and the simple ground plane where the power supply chip is placed can be enough to ensure a good thermal condition and avoid overheating.

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For the heat generated by the GE863-QUAD/PY, you can consider it to be during transmission 1W max during CSD/VOICE calls and 2W max during class10 GPRS upload.

This generated heat will be mostly conducted to the ground plane under the GE863-QUAD/PY, you must ensure that your application can dissipate it.

3.2.3 Power Supply PCB layout Guidelines

As seen on the electrical design guidelines the power supply shall have a low ESR capacitor on the output to cut the current peaks and a protection diode on the input to protect the supply from spikes and polarity inversion. The placement of these components is crucial for the correct working of the circuitry. A misplaced component can be useless or can even decrease the power supply performances.

• The Bypass low ESR capacitor must be placed close to the Telit GE863-QUAD/PY power input pads or in the case the power supply is a switching type it can be placed close to the inductor to cut the ripple provided the PCB trace from the capacitor to the GE863-QUAD/PY is wide enough to ensure a dropless connection even during the 2A current peaks.

• The protection diode must be placed close to the input connector where the power source is drained.

• The PCB traces from the input connector to the power regulator IC must be wide enough to ensure no voltage drops occur when the 2A current peaks are absorbed. Note that this is not made in order to save power loss but especially to avoid the voltage drops on the power line at the current peaks frequency of 216 Hz that will reflect on all the components connected to that supply, introducing the noise floor at the burst base frequency. For this reason while a voltage drop of 300-400 mV may be acceptable from the power loss point of view, the same voltage drop may not be acceptable from the noise point of view. If your application doesn't have audio interface but only uses the data feature of the Telit GE863-QUAD/PY, then this noise is not so disturbing and power supply layout design can be more forgiving.

• The PCB traces to the GE863-QUAD/PY and the Bypass capacitor must be wide enough to ensure no significant voltage drops occur when the 2A current peaks are absorbed. This is for the same reason as previous point. Try to keep this trace as short as possible.

• The PCB traces connecting the Switching output to the inductor and the switching diode must be kept as short as possible by placing the inductor and the diode very close to the power switching IC (only for switching power supply). This is done in order to reduce the radiated field (noise) at the switching frequency (100-500 kHz usually).

• The use of a good common ground plane is suggested.

• The placement of the power supply on the board should be done in such a way to guarantee

that the high current return paths in the ground plane are not overlapped to any noise sensitive circuitry as the microphone amplifier/buffer or earphone amplifier.

• The power supply input cables should be kept separate from noise sensitive lines such as microphone/earphone cables.

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4 Antenna

The antenna connection and board layout design are the most important part in the full product design and they strongly reflect on the product overall performances, hence read carefully and follow the requirements and the guidelines for a proper design.

4.1 GSM Antenna Requirements

As suggested on the Product Description the antenna and antenna line on PCB for a Telit GE863-QUAD/PY device shall fulfil the following requirements:

ANTENNA REQUIREMENTS

Frequency range

Bandwidth

Gain

Impedance

Input power

VSWR absolute max

VSWR recommended

When using the Telit GE863-QUAD/PY, since there's no antenna connector on the module, the antenna must be connected to the GE863-QUAD/PY through the PCB with the antenna pad.

Standard Dual Band GSM/DCS frequency range or

Standard Quad Band GSM/DCS/PCS frequency range if used for all four bands

80 MHz in GSM & 170 MHz in DCS & 140 MHz PCS band

Gain < 3dBi

50 ohm

> 2 W peak power

<= 10:1

<= 2:1

In the case that the antenna is not directly developed on the same PCB, hence directly connected at the antenna pad of the GE863-QUAD/PY, then a PCB line is needed in order to connect with it or with its connector.

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This line of transmission shall fulfil the following requirements:

ANTENNA LINE ON PCB REQUIREMENTS

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Impedance

Max Attenuation

No coupling with other signals allowed

Cold End (Ground Plane) of antenna shall be equipotential to the GE863-QUAD/PY ground pins

Furthermore if the device is developed for the US market and/or Canada market, it shall comply to the FCC and/or IC approval requirements:

This device is to be used only for mobile and fixed application. The antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. End-Users must be provided with transmitter operation conditions for satisfying RF exposure compliance. OEM integrators must ensure that the end user has no manual instructions to remove or install the GE863-QUAD/PY module. Antennas used for this OEM module must not exceed 3dBi gain for mobile and fixed operating configurations.

50 ohm

0,3 dB

4.2 GSM Antenna - PCB line Guidelines

• Ensure that the antenna line impedance is 50 ohm;

• Keep the antenna line on the PCB as short as possible, since the antenna line loss shall be

less than 0,3 dB;

• Antenna line must have uniform characteristics, constant cross section, avoid meanders and abrupt curves;

• Keep, if possible, one layer of the PCB used only for the Ground plane;

• Surround (on the sides, over and under) the antenna line on PCB with Ground, avoid having

other signal tracks facing directly the antenna line track;

• The ground around the antenna line on PCB has to be strictly connected to the Ground Plane by placing vias once per 2mm at least;

• Place EM noisy devices as far as possible from GE863-QUAD/PY antenna line;

• Keep the antenna line far away from the GE863-QUAD/PY power supply lines;

• If you have EM noisy devices around the PCB hosting the GE863-QUAD/PY, such as fast

switching ICs, take care of the shielding of the antenna line by burying it inside the layers of PCB and surround it with Ground planes, or shield it with a metal frame cover.

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• If you don't have EM noisy devices around the PCB of GE863-QUAD/PY, by using a stripline on the superficial copper layer for the antenna line, the line attenuation will be lower than a buried one;

4.3 GSM Antenna - installation Guidelines

• Install the antenna in a place covered by the GSM signal.

• The Antenna must be installed to provide a separation distance of at least 20 cm from all

persons and must not be co-located or operating in conjunction with any other antenna or transmitter;

• Antenna shall not be installed inside metal cases

• Antenna shall be installed also according Antenna manufacturer instructions.

5 Serial Ports

The serial port on the Telit GE863-QUAD/PY is the core of the interface between the module and OEM hardware.

2 serial ports are available on the module:

• MODEM SERIAL PORT

• MODEM SERIAL PORT 2 (DEBUG)

• GPS SERIAL PORT A (SIRF BINARY)

• GPS SERIAL PORT B (NMEA)

5.1 MODEM SERIAL PORT

Several configurations can be designed for the serial port on the OEM hardware, but the most common are:

- RS232 PC com port

- microcontroller UART @ 2.8V - 3V (Universal Asynchronous Receive Transmit)

- microcontroller UART@ 5V or other voltages different from 2.8V

Depending from the type of serial port on the OEM hardware a level translator circuit may be needed to make the system work. The only configuration that doesn't need a level translation is the 2.8V UART.

The serial port on the GE863-QUAD/PY is a +2.8V UART with all the 7 RS232 signals. It differs from the PC-RS232 in the signal polarity (RS232 is reversed) and levels. The levels for the GE863-QUAD/PY UART are the CMOS levels:

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Absolute Maximum Ratings -Not Functional

Parameter Min Max

Input level on any digital pad when on

Input voltage on analog pads when on

Operating Range - Interface levels (2.8V CMOS)

Level Min Max

Input high level V

Input low level VIL 0V 0.5V

Output high level VOH2.2V 3.0V

Output low level VOL0V 0.35V

The signals of the GE863-QUAD/PY serial port are:

RS232

Number

Signal GE863-

QUAD/PY

Pad Number

-0.3V +3.75V

-0.3V +3.0 V

2.1V 3.3V

Name Usage

1 DCD -

dcd_uart

2 RXD -

tx_uart

3 TXD -

rx_uart

4 DTR -

dtr_uart

5 GND 8-17-28-36-

6 DSR -

dsr_uart

7 RTS -

rts_uart

42 Data Carrier Detect Output from the GE863-QUAD/PY that

indicates the carrier presence

38 Transmit line *see Note Output transmit line of GE863-QUAD/PY

UART

37 Receive line *see Note Input receive of the GE863-QUAD/PY

UART

39 Data Terminal Ready Input to the GE863-QUAD/PY that

controls the DTE READY condition

Ground ground

45-48-50-56

43 Data Set Ready Output from the GE863-QUAD/PY that

indicates the module is ready

40 Request to Send Input to the GE863-QUAD/PY that

controls the Hardware flow control

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8 CTS -

cts_uart

9 RI -

ri_uart

NOTE: According to V.24, RX/TX signal names are referred to the application side, therefore on the GE863-QUAD/PY side these signal are on the opposite direction: TXD on the application side will be connected to the receive line (here named TXD/ rx_uart ) of the GE863-QUAD/PY serial port and viceversa for RX.

TIP: For a minimum implementation, only the TXD and RXD lines can be connected, the other lines can be left open provided a software flow control is implemented.

The signals in the UART connector on the EVK are:

41 Clear to Send Output from the GE863-QUAD/PY that

controls the Hardware flow control

44 Ring Indicator Output from the GE863-QUAD/PY that

indicates the incoming call condition

DCD RXD

TXD DTR

GND DSR

RTS CTS

RI GND

5.2 MODEM SERIAL PORT 2 (DEBUG)

It is available on the following pins:

PIN # NAME DESCRIPTION TYPE

25 TX_TRACE TX Data CMOS 2.8V 26 RX_TRACE RX Data CMOS 2.8V

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5.3 RS232 level translation

In order to interface the Telit GE863-QUAD/PY with a PC com port or a RS232 (EIA/TIA-232) application a level translator is required. This level translator must

- invert the electrical signal in both directions

- change the level from 0/3V to +15/-15V

Actually, the RS232 UART 16450, 16550, 16650 & 16750 chipsets accept signals with lower levels on the RS232 side (EIA/TIA-562) , allowing for a lower voltage-multiplying ratio on the level translator. Note that the negative signal voltage must be less than 0V and hence some sort of level translation is always required.

The simplest way to translate the levels and invert the signal is by using a single chip level translator. There are a multitude of them, differing in the number of driver and receiver and in the levels (be sure to get a true RS232 level translator not a RS485 or other standards).

By convention the driver is the level translator from the 0-3V UART level to the RS232 level, while the receiver is the translator from RS232 level to 0-3V UART.

In order to translate the whole set of control lines of the UART you will need:

- 5 driver

- 3 receiver

NOTE: The digital input lines working at 2.8VCMOS have an absolute maximum input voltage of 3,75V; therefore the level translator IC shall not be powered by the +3.8V supply of the module. Instead it shall be powered from a +2.8V / +3.0V (dedicated) power supply.

This is because in this way the level translator IC outputs on the module side (i.e. GE863-QUAD/PY inputs) will work at +3.8V interface levels, stressing the module inputs at its maximum input voltage.

This can be acceptable for evaluation purposes, but not on production devices.

NOTE: In order to be able to do in circuit reprogramming of the GE863-QUAD/PY firmware, the serial port on the Telit GE863-QUAD/PY shall be available for translation into RS232 and either it's controlling device shall be placed into tristate, disconnected or as a gateway for the serial data when module reprogramming occurs.

Only RXD, TXD, GND and the On/off module turn on pad are required to the reprogramming of the module, the other lines are unused.

All applicator shall include in their design such a way of reprogramming the GE863-QUAD/PY.

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An example of level translation circuitry of this kind is:

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The RS232 serial port lines are usually connected to a DB9 connector with the following layout:

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5.4 5V UART level translation

If the OEM application uses a microcontroller with a serial port (UART) that works at a voltage different from 2.8 - 3V, then a circuitry has to be provided to adapt the different levels of the two set of signals. As for the RS232 translation there are a multitude of single chip translators, but since the translation requires very few components, then also a discrete design can be suited. For example a possible inexpensive translator circuit for a 5V driver can be:

and for a 5V receiver:

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NOTE: The UART input line TXD (rx_uart) of the GE863-QUAD/PY is NOT internally pulled up with a resistor, so there may be the need to place an external 47KΩ pull-up resistor, either the DTR (dtr_uart) and RTS (rts_uart) input lines are not pulled up internally, so an external pull-up resistor of 47KΩ may be required.

A power source of the internal interface voltage corresponding to the 2.8VCMOS high level is available at the VAUX pad, whose absolute maximum output current is 50mA.

If VAUX is also used to supply a Camera no additional devices could be connected.

Pull-up resistors can be connected to the VAUX pad provided that the pulled-up lines are GE863-QUAD/PY input lines connected to open collector outputs in order to avoid latch-up problems on the GE863-QUAD/PY.

Care must be taken to avoid latch-up on the GE863-QUAD/PY and the use of this output line to power electronic devices shall be considered with care, especially for devices that generate spikes and noise such as level translators, digital ICs or microcontroller, failure in any of these condition can severely compromise the GE863-QUAD/PY functionality.

NOTE: The input lines working at 2.8VCMOS can be pulled-up with 47KΩ resistors that can be connected directly to the VAUX line.

NO disturbing devices should be powered with the VAUX line; otherwise the module functionality may be compromised.

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6 Microphone

The microphone circuitry is the more noise sensitive and its design and layout must be done with particular care.

6.1 Microphone line Characteristic and requirements

The Telit GE863-QUAD/PY provides two audio paths for the microphone and the earpiece: the internal and the external audio paths. Only one of the two paths can be active at a time and it is selectable by hardware line AXE or by AT command. The audio characteristics of the two paths are slightly different and this should be kept in mind when designing. The internal audio path should be used for handset function, while the external audio path is suited for hands free function (car kit).

Both microphone paths from the Telit GE863-QUAD/PY are balanced and the OEM circuitry should be designed balanced to reduce the common mode noise typically generated on the ground plane, however for particular OEM application needs also an unbalanced circuitry can be used.

The microphone input lines characteristics are:

internal microphone path

• line coupling: AC ( 100nF cond.)

• line type: balanced

• differential input resistance: 25kΩ

• line nominal sensitivity: 50 mV

• max input voltage: 360 mV

• microphone nominal sensitivity/analog gain suggested: -45 dB

• echo canceller type: handset

external microphone path

• line coupling: AC ( 100nF cond.)

• line type: balanced

rms

Vrms/Pa

/ +24dB

• differential input resistance: 25kΩ

• line nominal sensitivity: 3 mV

• max input voltage: 22 mV

• microphone nominal sensitivity/analog gain suggested: -45 dB

rms

Vrms/Pa

/ +10dB

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• echo canceller type: car kit hands free

TIP: Due to the difference in the echo canceller type, the internal audio path is suited for handset applications while the external audio path is suited for car kit hands free. The headset applications should be made by using the external audio path but DISABLING the echo canceller by software AT command. If the echo canceller is left active with the headset, then some echo might be introduced by the echo cancel algorithm.

The nominal sensitivity of the line indicates the voltage level on the GE863-QUAD/PY pads that should be present during "normal spoken" conditions: for a handset a voice signal coming from the mouth of the talker at 7 cm of distance from the microphone, producing an acoustic pressure of -4,7 dBPa (@ 1 kHz) on the microphone membrane.

For example:

With the internal mic. having the suggested nominal sensitivity -45dB

at the "normal spoken" conditions: -4.7dB

on the microphone membrane.

Vrms/Pa

At that acoustic pressure the voltage output from the microphone is:

Voltage Output (dB) = ( -45) + (-4.7) = -49.7 dB

Vrms

corresponding to:

Voltage Output = 10

( -49.7 / 20 )

= 3.3* 10 -3 V

rms

by having the microphone gain set to +24 dB (corresponding to 15.8 times) the signal in the nominal conditions on the input mic. pads of the GE863-QUAD/PY will be:

Voltage @ GE863-QUAD/PY_mic = 3.3 * 10

-3

* 15.8 = 51 mV

rms

During the spoken conditions the signal varies according to the volume of the voice of the talker, usually a rough thumb rule for the dynamic range may be considered:

* +20dB (10 times) at maximum voice level (talker screaming)

* -50 dB (1/300 times) at minimum voice level (talker whispering).

For the handsfree/car kit microphone the voice attenuation due to the distance between the microphone and the talker must be taken into account when designing the microphone amplifier.

For a car cabin usually the distance between the talker and the mic. is about 50cm; in these conditions the attenuation can be considered as a thumb rule around 20dB.

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Another thing to consider, especially for cabin car use, is the fact that the external mic. will pick up also ambient noise; to overcome this problem it is preferable to set the gain of the microphone 10dB lower with respect to the calculated value for a nominal sensitivity. The corresponding reduction in signal level will be compensated by an increased voice volume of the talker which will speak louder because of the ambient noise.

For the headset we shall distinguish two different types: the headsets having the microphone sustained close to the mouth and the headsets having the microphone on the earpiece cable.

The same considerations for the additional voice attenuation due to the distance from the microphone and the noise pick up can be made for the headset having the microphone on the earpiece cable, while the other kind of headset shall be threaten as an handset.

For example:

With the external mic. having the suggested nominal sensitivity -45dB

at the "normal spoken" conditions: -4.7dB

at 7 cm from the mouth of the talker and with a

Vrms/Pa

further attenuation of 20dB due to the distance from the microphone (about 50 cm).

At that acoustic pressure the voltage output from the microphone is:

Voltage Output (dB) = ( -45) + (-4.7) - 20 = -69.7 dB

Vrms

corresponding to:

Voltage Output = 10

( -69.7 / 20 )

= 3.3* 10 -4 V

rms

by having the microphone gain set to +10 dB (corresponding to 3 times) the signal in the nominal conditions on the input external mic. pads of the GE863-QUAD/PY will be:

Voltage @ GE863-QUAD/PY__extmic = 3.3 * 10 -4 * 3 = 1 mV

rms

Hence in these conditions the signal level on the input pads of the external mic. of the GE863QUAD/PY is 10 dB (3 times) lower than the nominal, as suggested.

The microphones usually need a biasing network that provides the necessary DC current to the mic., this will be explained further on.

In the EVK2 all the microphone input jacks have the hot wire connected to the central pole.

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6.2 General Design Rules

There are several configurations for the audio path, but the most effective difference is between balanced and unbalanced microphone.

It is highly recommended to keep the whole microphone path balanced even if this means having 2 wires connecting the microphone instead of one needed (plus ground) in the unbalanced case. The balanced circuitry is more suited because of its good common mode noise rejection, reducing the 216 Hz burst noise produced during the GSM transmissions.

• Where possible use balanced microphone circuitry

• Keep the microphone traces on the PCB and wires as short as possible.

• If your application requires an unbalanced microphone, then keep the lines on the PCB

balanced and "unbalance" the path close to the microphone wire connector if possible.

• For the microphone biasing voltage use a dedicated voltage regulator and a capacitor multiply circuit.

• Make sure that the microphone traces in the PCB don't cross or run parallel to noisy traces (especially the power line)

• If possible put all around to the microphone lines a ground trace connected to the ground plane by several vias. This is done in order to simulate a shielded trace on the PCB.

• The biasing circuit and eventually the buffer can be designed in the same manner for the internal and external microphones.

6.3 Microphone Biasing

The electret microphones usually need a biasing voltage to work properly. Refer to your microphone provider for the characteristics required.

NOTE: The microphones have a hot wire were the positive biasing must be connected, usually it is indicated by a + sign or a red point. If the polarity of the bias is reversed, then the microphone will not work properly. For this reason be sure to respect the mic. biasing polarity.

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6.3.1 Balanced Microphone biasing

The balanced microphone bias voltage should be obtained from a dedicated voltage regulator, in order to eliminate the noise present on the power lines. This regulator can be the same for all the audio paths. The microphone should be supplied from a capacitor multiply circuit.

For example a circuit for the balanced microphone biasing can be:

NOTE: In the balanced application the resistors R2 and R3 must have the same value to keep the circuit balanced.

NOTE: The cable to the microphone should not be shielded, instead a twisted pair cable shall be used.

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NOTE: The microphone sensitivity changes with the value of R2 and R3. Usually the microphones are characterized with 2kΩ biasing resistance, so try to keep the sum of R2 and R3 around 2kΩ. Refer to your microphone manufacturer for the mic. characteristics.

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6.3.2 Unbalanced Microphone biasing

The unbalanced microphone biasing voltage should be obtained from a dedicated voltage regulator, in order to eliminate the noise present on the power lines. This regulator can be the same for all the audio paths. The microphone should be supplied from a capacitor multiply circuit.

For example a circuit for the unbalanced microphone biasing can be:

NOTE: In the unbalanced application the capacitor C3 shall be > 200nF otherwise the frequency response will be cut at low band frequencies (down to 300Hz). This capacitor can be placed close to the MIC- pad (EXT_MIC- or INT_MIC- depending on the audio path chosen) or if possible it should be placed close to the shielded cable connector. If the ground return path is well designed, then it is possible to eliminate the C3 capacitor, provided the buffer is close to the mic. input.

NOTE: The cable to the microphone should be shielded.

NOTE: The microphone sensitivity changes with the value of R2. Usually the microphones are characterized with 2kΩ biasing resistance, so try to keep the value of R2 around 2kΩ. For mic. characteristics refer to the manufacturer.

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6.4 Microphone buffering

As seen previously, a microphone shall be connected to the input pads of the GE863-QUAD/PY through a buffer amplifier that boosts the signal level to the required value.

Again the buffered microphone circuitry can be balanced or unbalanced. Where possible it is always preferable a balanced mic. solution. The buffering circuit shall be placed close to the microphone or close to the microphone wire connector.

6.4.1 Buffered Balanced Mic.

A sample circuit can be:

This circuit has a gain of 15 times (+24 dB), and is therefore suited for the internal mic. input, having a microphone with a sensitivity close to the suggested one (-45 dB microphone has a different sensitivity, or if the buffer is connected to the external mic. input, then a gain adjustment shall be done by changing resistors R604-R605 and R606-R607 and as a consequence the capacitors C636 and C637 to maintain the bandwidth 150-8000 (-3dB).

The buffer gain is given by the formula:

), if the used

Vrms/Pa

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604RR

Gain ==

605

The C636 and C637 capacitors are placed in order to cut off the gain at higher frequencies than the transmitted GSM band, the cutoff frequency (-3dB) should be 8 kHz in order to have -1dB at 4kHz.

The cutoff frequency is given by the formula:

606

607

freq

== [Hz]

637*604*2

ππ

636*606*2

CRCR

For example:

- Let's assume you have a microphone with these characteristics:

- sensitivity -45 dB

Vrms/Pa

and you want to use it in the internal mic. audio path.

With the mic. having nominal sensitivity -45dB

4.7dB

at 7 cm from the mouth of the talker.

Vrms/Pa

at the "normal spoken" conditions: -

At that acoustic pressure the voltage output from the microphone is:

Mic Voltage Output (dB) = ( -45) + (-4.7) = -49.7 dB

corresponding to:

Mic_Voltage_Output = 10

( -49.7 / 20 )

= 3.3* 10 -3 V

in order to have a signal of 50 mV

on the GE863-QUAD/PY internal mic. inputs then the

rms

buffer must have a gain of:

Vrms

rms

Voltage @ GE863-QUAD/PY_intmic/ Mic_Voltage_Output = (50 * 10

-3

)/( 3.3 * 10 -3 ) = 15

Hence in these conditions the signal level on the input pads of the internal mic. of the GE863QUAD/PY is 24 dB (15 times) higher than the microphone output and therefore the buffer has to gain 24 dB.

The corresponding values for the resistors on the buffer could be ( if we keep the input resistance 10kΩ )

R604 = R606 = gain* R603= gain* R605 = 15* 10 = 150 kΩ

The commercial values of 150kΩ & 10kΩ are then chosen.

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As a consequence the values of the capacitors C636 and C637 shall be:

C636=C637= 1/ (2π*8000*R606)= 132 *10

A commercial value of 100pF is then chosen.

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6.4.2 Buffered Unbalanced (Single Ended) Mic.

A sample schematic for a buffered unbalanced (single ended) microphone can be:

The schematic does not include the required mic. biasing circuitry. For the biasing the same circuit as seen before can be used; to be noticed that the capacitor C3 on the unbalanced biasing circuit is not anymore needed if this Buffered design is used.

Two different configurations are used, one inverting and the other not inverting, hence an additional +6dB (2 times) gain is achieved by doubling the mic. signal path.

The gain of the not inverting buffer is given by the formula:

719

Gain +=

and hence it cannot be less than 1. In the example shown the gain of the not inverting buffer is 1,5 (4dB).

While the gain of the inverting buffer is given by the formula:

720

711

Gain =

708

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As shown in the balanced buffered mic. the gain adjustments can be done by changing R719 R720 and R708 - R711 and as a consequence the capacitors C726 and C727.

The bandwidth (-3dB) is given by the approximated formula (considering C725 >> C726) :

freq

== [Hz]

726*719*2

ππ

727*711*2

CRCR

The buffer bandwidth at -3dB shall be 8kHz.

Note that the biasing of the operational amplifier is given for the inverting amplifier by the series divider R714-R715. The 100nF capacitor C719 is needed to filter the noise that could be coupled to that divider. For the not inverting operational the biasing is given by a different divider R715R717 with the capacitor C720 and through a series resistor R718 of 470KΩ.

For example:

- Let's assume you have a microphone with these characteristics:

- sensitivity -45 dB

Vrms/Pa

and you want to use it in the external mic. audio path.

With the mic. having nominal sensitivity -45dB

4.7dB

but at 50 cm from the mouth of the talker an additional 20 dB loss shall be considered.

Vrms/Pa

at the "normal spoken" conditions: -

At that acoustic pressure the voltage output from the microphone is:

Mic Voltage Output (dB) = ( -45) + (-4.7) -20 = -69.7 dB

Vrms

corresponding to:

Mic_Voltage_Output = 10

( -69.7 / 20 )

= 3.3* 10 -4 V

rms

in order to have a signal of 1 mV

(10 dB lower than the nominal input for the GE863-

rms

QUAD/PY external mic. path) on the GE863-QUAD/PY internal mic. inputs then the buffer must have a gain of:

Voltage @ GE863-QUAD/PY_intmic/ Mic_Voltage_Output = (1 * 10

-3

)/( 3.3 * 10 -4 ) = 3

Hence in these conditions the signal level on the input pads of the internal mic. of the GE863QUAD/PY is 10 dB (3 times) higher than the microphone output and therefore the buffer has to gain 10 dB.

To calculate the resistor values it must be kept in mind that balancing the line will double the signal and hence already add +6 dB, therefore the buffer must gain only 1.5 times.

The corresponding values for the resistors on the buffer could be ( if we keep the input resistance 10kΩ )

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R711 = gain* R708= 1.5* 10 = 15 kΩ

R719 = (gain -1) * R720 = (1.5 -1) * 10 = 5 kΩ

The commercial values of 15kΩ & 5.6kΩ are then chosen.

As a consequence the values of the capacitors C726 and C727 shall be:

C726= 1/ (2π*8000*R719)= 3.5 *10

C727= 1/ (2π*8000*R711)= 1,2 *10

The commercial values of 3.3nF and 1nF are then chosen.

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7 Speaker

7.1 Speaker lines characteristics and requirements

The Telit GE863-QUAD/PY provides two audio paths for both the microphone and the earpiece: the internal and the external audio paths. Only one of the two paths can be active at a time and it is selectable by hardware line AXE or by AT command. The audio characteristics of the two paths are slightly different and this should be kept in mind when designing your application. The internal audio path should be used for handset function, while the external audio path is suited for hands free function (car kit).

Both speaker outputs from the Telit GE863-QUAD/PY are bridged type and the OEM circuitry shall be designed bridged to reduce the common mode noise typically generated on the ground plane and to get the maximum power output from the device; however for particular OEM application needs also a single ended circuitry can be designed.

The GE863-QUAD/PY speaker output lines characteristics are:

internal speaker path ( EAR_MT+ , EAR_MT- )

• line coupling: DC

• line type: bridged

• speaker impedance (operating conditions): ≥ 16 Ω ± 5% @ 1kHz

• minimum load impedance: 15 Ω

• signal bandwidth: 150 - 8000 Hz @ -3 dB

• maximum differential output: 850 mV

• rated output power: 10 mW

• maximum power output: 30 mW

• volume level steps (SW): - 2 dB

rms

• number of volume steps(SW): 10

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external speaker path ( EAR_HF+ , EAR_HF- )

• line coupling: DC

• line type: bridged

• speaker impedance (operating conditions): ≥ 16 Ω ± 15% @ 1kHz

• minimum load impedance: 15 Ω

• signal bandwidth: 150 - 8000 Hz @ -3 dB

• maximum differential output: 425 mV

rms

• rated output power: 2.5 mW

• maximum power output: 7.5 mW

• volume level steps (SW): - 2 dB

•

number of volume steps (SW): 10

The EVK2 v.1.2 audio output characteristics are:

internal/external ear single ended

• line coupling: AC

• line type: single ended referred to GND

• speaker impedance (operating conditions): ≥ 8 Ω

• minimum load impedance: 8 Ω

• signal bandwidth: 150 - 8000 Hz @ -3 dB

• maximum output: 800 mV

rms

• maximum power output: 80 mW @ 8 Ω

• THD+N 1% @ 80mW

internal/external ear bridged

• line coupling: DC

• line type: bridged not referred to GND

• speaker impedance (operating conditions): ≥ 8 Ω

• minimum load impedance: 8 Ω

• signal bandwidth: 150 - 8000 Hz @ -3 dB

• maximum output: 1.6 V

rms

• maximum power output: 320 mW @ 8 Ω

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• THD+N 1% @ 330mW

high power external ear

• line coupling: DC

• line type: bridged not referred to GND

• speaker impedance (operating conditions): ≥ 4 Ω

• minimum load impedance: 4 Ω

• signal bandwidth: 150 - 8000 Hz @ -3 dB

• maximum power output: 6 W

• THD+N 10% @ 6 W

7.2 General Design rules

There are several configurations for the audio output path, but the various design requirements can be grouped into three different categories:

• handset earphone (low power, typically a handset)

• hands free earphone (low power, typically a headset)

• car kit speakerphone (high power, typically a speaker)

The three groups have different power requirements, usually the first two applications need only few mW of power, which can be directly drained from the GE863-QUAD/PY pads, provided a suited speaker is used. This direct connect design is the cheaper and simpler solution and will be suited for the most of the earphone design requirements. There's no need to decouple the output ear lines if a suited earpiece is connected. For the last group, the speakerphone, a power amplifier is required to raise the output power up to 5-10W required in a car cabin application.

All the designs shall comply with the following guidelines:

• Where possible use a bridged earphone circuitry, to achieve the maximum power output from the device.

• Keep the earphone traces on the PCB and wires as short as possible.

• If your application requires a single ended earpiece and you want a direct connection, then

leave one of the two output lines open and use only the other referred to ground. Remember that in this case the power output is 4 times lower than the bridged circuit and may not be enough to ensure a good voice volume.

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• Make sure that the earphone traces in the PCB don't cross or run parallel to noisy traces (especially the power line)

• The cable to the speaker shall be a twisted pair with both the lines floating for the bridged output type, shielded with the shield to ground for the single ended output type.

7.2.1 Noise Filtering

The I/O of the PCB should have a noise filter close to the connector, to filter the high frequency GSM noise. The filter can be a Π of 2 capacitor and a inductance, with the one capacitor of 39pF

- 0603 case , and the other capacitor of 1nF - 0603; the inductance shall have a value of 39μH .

7.3 Handset earphone design

As seen previously, a 16Ω speaker can be directly connected to the output pads EAR_MT+ and EAR_MT- of the GE863-QUAD/PY.

This solution is often the more cost effective, reducing the components count to a minimum. There are several limitations to the use of this solution: speaker direct connect imposes the speaker characteristics to be almost exactly the suggested ones, otherwise the power output may be reduced (if speaker impedance is bigger than 16Ω) or the GE863-QUAD/PY ear port may be damaged (if speaker impedance is less than 15Ω).

The other limitation of the speaker direct connection is the power output capability of the GE863-QUAD/PY which is limited and for some particular applications may not be enough.

For these reasons, when the power output of the GE863-QUAD/PY is not enough or if the speaker characteristics are different from the suggested, then it is preferable to use an amplifier to increase the power and current output capabilities.

Again the output from the GE863-QUAD/PY is bridged and both lines should be used, where possible, as inputs to the power amplifier. This ensures a higher common mode rejection ratio, reducing the GSM current busts noise on the speaker output.

In this case the EAR_MT lines from the GE863-QUAD/PY should be AC coupled with a capacitor of 100nF.

It is always desirable to have a mute control on the amplifier, in order to turn it off while the device is not sending signal to the output, in this manner the amplifier background noise which may be audible during idle conditions is cut off.

A principle schematic may be:

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The resulting gain and high pass cut can be obtained with the formula:

Gain =

freq

= [Hz]

And an example of internal Ear amplifier is:

23R

4*3*2

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Some amplifier require a low impedance load at high frequency in order to avoid auto oscillation, this can be made with a capacitor (100nF) in series with a resistor (15Ω).

When designing your application, remember to provide an adequate bypass capacitor to the amplifier and place it close to the power input pin of the IC, keeping the traces as short as possible.

7.4 Hands Free earphone (low power) design

The same design considerations made for the handset are valid for the hands free earphone, the only difference is that the external ear audio output level from the GE863-QUAD/PY is 6dB lower than the internal one, so the gain of the amplifier must be 6dB higher to provide the same audio level.

7.5 Car Kit speakerphone design

For the car kit speaker phone function the power output requirement is usually at least 4W, therefore an amplifier is needed to boost the GE863-QUAD/PY output.

The design of the amplifier shall comply with the following guidelines:

• The input to the amplifier MUST EAR_HF-) of the GE863-QUAD/PY, because of its echo canceller parameters suited to a car cabin use.

• The amplifier shall have a gain of 30-40 times ( 29-32 dB) to provide the desired output power of 5-10W with the signal from the GE863-QUAD/PY external audio output lines (EAR_HF).

• If the amplifier has a fixed gain then it can be adjusted to the desired value by reducing the input signal with a resistor divider network.

• The amplifier shall have a mute control to be used while not in conversation. This results in two benefits: eliminating the background noise when not in conversation and saving power.

• The power to the amplifier should be decoupled as much as possible from the GE863QUAD/PY power supply, by either keeping separate wires and placing bypass capacitors of adequate value close to the amplifier power input pads.

be taken from the external audio path (EAR_HF+,

• The biasing voltage of the amplifier shall be stabilised with a low ESR (e.g. a tantalum) capacitor of adequate value.

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

NOTE: The GE863-QUAD/PY audio path connected to the car kit hands free amplifier MUST be the external one (EAR_HF), otherwise the echo cancellation will not be done due to the difference in the echo canceller characteristics of the GE863-QUAD/PY internal audio path from the external audio path.

An example of car kit amplifier schematic can be:

Page 47

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

8 General Purpose I/O

The general purpose I/O pads can be configured to act in three different ways:

- input

- output

- alternate function (internally controlled)

Input pads can only be read and report the digital value (high or low) present on the pad at the read time; output pads can only be written or queried and set the value of the pad output; an alternate function pad is internally controlled by the GE863-QUAD/PY firmware and acts depending on the function implemented.

Not all GPIO pads support all these three modes:

- GPIO5 supports all three modes and can be input, output, RFTX monitor output (Alternate function)

- GPIO6 supports all three modes and can be input, output, alarm output (Alternate function)

- GPIO7 supports all three modes and can be input, output, buzzer output (Alternate function)

All GPIO pads are 2.8V CMOS signals and their interface levels are the same specified in the paragraph 4 .

8.1 Using a GPIO pad as INPUT

The GPIO pads, when used as inputs, can be connected to a digital output of another device and report its status, provided this device has interface levels compatible with the 2.8V CMOS levels of the GPIO.

If the digital output of the device to be connected with the GPIO input pad has interface levels different from the 2.8V CMOS, then it can be connected to GPIO1 or can be buffered with an open collector transistor, provided a 47KΩ pull-up resistor is connected as seen in the paragraph

5.4 5V UART level translation.

8.2 Using a GPIO pad as OUTPUT

The GPIO pads, when used as outputs, can drive 2.8V CMOS digital devices or compatible hardware. When set as outputs, the pads have a push-pull output and therefore the pull-up resistor may be omitted.

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Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

8.3 Using the Alarm Output GPIO6

The GPIO6 pad, when configured as Alarm Output, is controlled by the GE863-QUAD/PY module and will rise when the alarm starts and fall after the issue of a dedicated AT command.

This output can be used to power up the GE863-QUAD/PY controlling microcontroller or application at the alarm time, giving you the possibility to program a timely system wake-up to achieve some periodic actions and completely turn off either the application and the GE863QUAD/PY during sleep periods, drammatically reducing the sleep comsumption to few μA.

In battery powered devices this feature will greatly improve the autonomy of the device.

8.4 Using the Buzzer Output GPIO7

The GPIO7 pad, when configured as Buzzer Output, is controlled by the GE863-QUAD/PY module and will drive with appropriate square waves a Buzzer driver.

This permits to your application to easily implement Buzzer feature with ringing tones or melody played at the call incoming, tone playing on SMS incoming or simply playing a tone or melody when needed by your application.

A sample interface scheme is included below to give you an idea of how to interface a Buzzer to the GPIO7:

NOTE: To correctly drive a buzzer a driver must be provided, its characteristics depend on the Buzzer and for them refer to your buzzer vendor.

Page 49

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

9 Camera

9.1 Transchip Camera

The GE863-QUAD/PY provides a direct support for Transchip digital cameras with the following characteristics:

Type: TRANSCHIP TC5747

Technology: CMOS COLOR camera

Max picture size: VGA 480x640 pixels landscape

Output format: JPEG

Sensitivity: 4 Lux

9.1.1 Camera interface connectors

The ballout of the module and a 24 pins ZIF connector for the CMOS camera provide the interface connection between GE863-QUAD/PY and Transchip camera.

GE863-QUAD/PY signal TC5747MF24L

Pin Signal I/O Notes Pin Signal I/O

55 GPIO3 O I2C bus serial clock 1 SCLK I

8-17… GND Ground 2 AGND I

31 VAUX O Power Supply 3 AVDD28* I

5 GPIO9 O Camera Reset 4 RESET_N I

7 MON1_CAM O Clock 5 CLK_IN** I

8-17… GND Ground 6 DGND I

n.c n.c. 7 DOUT_0 I/O

n.c n.c. 8 DOUT_1 I/O

n.c n.c. 9 DOUT_2 I/O

n.c n.c. 10 DOUT_3 I/O

n.c n.c. 11 DOUT_4 I/O

n.c n.c. 12 DOUT_5 I/O

n.c n.c. 13 DOUT_6 I/O

n.c n.c. 14 DOUT_7 I/O

n.c n.c. 15 DOUT_8 I/O

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1vv0300715, Rev. ISSUE#0, - 21/02/06

n.c n.c. 16 VCLKOUT O

n.c n.c. 17 VALIDH O

n.c n.c. 18 VALIDV O

31 VAUX O Power Supply 19 DVDD28 I

32 GPIO4 I/O I2C bus serial data 20 SDIN I/O

8-17.. GND Ground 21 PS1 I

6 GPIO8 O Camera power type selector 22 PS2 I

8-17… GND Ground 23 SHIELD -

Flash Enable 24 LED_CTRL O

Filter the AVDD28.

Use a Buffer between module clk out, MON1_CAM and camera clk in, CLK_IN.

***

Non-connected.

Fig 1. Camera Physical Detail & Connector

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Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

Fig 2. Camera Socket Connector

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Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

9.1.2 EVB for Transchip camera support

In order to interface the Telit GE863-QUAD/PY with a CMOS camera, Telit has developed an evaluation board. The EVK allows the connector of all Telit modules through 2 connectors of 40 pins each.

The I2CBUS DUAL CAMERA board is plugged in the 2 connectors of 30 pins each on the module board.

MODULE BOARD

MAIN BOARD

CAMERA BOARD

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

9.1.3 Block Diagram for supported cameras

The numbers on the left side of the Camera’s connectors refers to Module Connector’s pin number.

DVDD is VAUX1 power supply from GE863-QUAD/PY

CAMERA TRANSCHIP

PD[6]

GND

AVDD

PD[1]

CAM_CLK

GND

1 2 3 4 5 6 7 8 9

11 12 13 14 15 16 17 18 19 20 21 22 23

DVDD

AVDD

DVDD

IICSDA_CAM

GND

PD[0]

GND

MON1_CAM

CAM_CLK

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Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

9.1.4 Schematic Diagrams for supported cameras

Page 55

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

9.1.5 Example usage script for camera

Camera setting: (shown here are the defaults ones)

>AT#CAMSEL=0 (camera selection: 0-auto, 1-agilent, 2-transchip)

>AT#CMODE=0 (camera mode: 0-day, 1-night)

>AT#CAMQUA=0 (camera quality: 0-low, 1-medieum, 2-high)

>AT#CAMRES=0 (camera resolution: 0-VGA, 1-QVGA, 2-QQVGA)

>AT#CAMCOL=0* (camera color: 0-color, 1-grayscale)

>AT#CAMZOOM=0 (camera zoom: 0-x1, 1-x2, 2-x4)

>AT#CAMTXT=0* (camera timestamp: 0-no, 1-time only, 2-data only, 3-time&data)

Taking an reading a photo:

>AT#CAMEN=1 (camera ON)

>AT#TPHOTO (take photo)

>AT+OBJL? (see photo dimension)

#OBJL: Snapshot,38900 (where 38900 is the file dimension in bytes of the photo taken)

>AT#RPHOTO (download the photo)

…data….. (where …data… Correspond to the photo data in binary)

>AT#TPHOTO

>AT#RPHOTO Repeating photo capture and download n times

…data…..

Page 56

>AT#CAMEN=O (camera OFF)

*only Transchip camera

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

Page 57

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Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

10 Conformity Assessment Issues

The GE863-QUAD/PY module is assessed to be conform to the R&TTE Directive as standalone products, so instructions require no further evaluation under Article 3.2 of the R&TTE Directive and do not require further involvement of a R&TTE Directive Notified Body for the final product.

In all other cases, or if the manufacturer of the final product is in doubt then the equipment integrating the radio module must be assessed against Article 3.2 of the R&TTE Directive In all cases assessment of the final product must be made against the Essential requirements of the R&TTE Directive Articles 3.1(a) and (b), safety and EMC respectively, and any relevant Article 3.3 requirements.

If the module is installed in conformance with Dai Telecom installation

The GE863-QUAD/PY module is conform with the following European Union Directives:

• R&TTE Directive 1999/5/EC (Radio Equipment & Telecommunications Terminal Equipments)

• Low Voltage Directive 73/23/EEC and product safety

• Directive 89/336/EEC for conformity for EMC

In order to satisfy the essential requisite of the R&TTE 99/5/EC directive, the GE863QUAD/PY module is compliant with the following standards:

• GSM (Radio Spectrum). Standard: EN 301 511 and 3GPP 51.010-1

• EMC (Electromagnetic Compatibility). Standards: EN 301 489-1 and EN 301 489-7

• LVD (Low Voltage Directive) Standards: EN 60 950

In this document and the Hardware User Guide, Software User Guide all the information you may need for developing a product meeting the R&TTE Directive is included.

The GE863-QUAD/PY module is conform with the following US Directives:

• Use of RF Spectrum. Standards: FCC 47 Part 24 (GSM 1900)

• EMC (Electromagnetic Compatibility). Standards: FCC47 Part 15

To meet the FCC's RF exposure rules and regulations:

- The system antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all the persons and must not be co-located or operating in conjunction with any other antenna or transmitter.

- The system antenna(s) used for this module must not exceed 3 dBi for mobile and fixed or mobile operating configurations.

- Users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance.

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Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and to have their complete product tested and approved for FCC compliance.

Page 59

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

11 SAFETY RECOMMANDATIONS

READ CAREFULLY

Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas:

 Where it can interfere with other electronic devices in environments such as hospitals,

airports, aircrafts, etc

 Where there is risk of explosion such as gasoline stations, oil refineries, etc

It is responsibility of the user to enforce the country regulation and the specific environment regulation.

Do not disassemble the product; any mark of tampering will compromise the warranty validity.

We recommend following the instructions of the hardware user guides for a correct wiring of the product. The product has to be supplied with a stabilized voltage source and the wiring has to be conforming to the security and fire prevention regulations.

The product has to be handled with care, avoiding any contact with the pins because electrostatic discharges may damage the product itself. Same cautions have to be taken for the SIM, checking carefully the instruction for its use. Do not insert or remove the SIM when the product is in power saving mode.

The system integrator is responsible of the functioning of the final product; therefore, care has to be taken to the external components of the module, as well as of any project or installation issue, because the risk of disturbing the GSM network or external devices or having impact on the security. Should there be any doubt, please refer to the technical documentation and the regulations in force.

Every module has to be equipped with a proper antenna with specific characteristics. The antenna has to be installed with care in order to avoid any interference with other electronic devices and has to guarantee a minimum distance from the body (20 cm). In case of this requirement cannot be satisfied, the system integrator has to assess the final product against the SAR regulation.

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Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

The European Community provides some Directives for the electronic equipments introduced on the market. All the relevant information’s are available on the European Community website:

http://europa.eu.int/comm/enterprise/rtte/dir99-5.htm

The text of the Directive 99/05 regarding telecommunication equipments is available, while the applicable Directives (Low Voltage and EMC) are available at:

http://europa.eu.int/comm/enterprise/electr_equipment/index_en.htm

Page 61

Telit GE863-QUAD / GE863-PY

Document Change Log

Revision Date Changes

ISSUE #0 21/02/06

First release

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

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Telit GE863-QUAD / GE863-PY

Hardware User guide

12 EVK 2 SCHEMATICS

1vv0300715, Rev. ISSUE#0, - 21/02/06

Page 63

BATTERY CHARGER INPUT

Care must be taken to ensure that the right polarity in the power input is respected! DO NOT Supply power when the Battery is not connected

FORBIDDENVIETATE

Care must be taken to ensure that the right polarity in the power input is respected!

CURRENT UNLIMITED

WARNING!!!!

PL101

1984617PT1.5_2-3.5-H

3.8V IN

WARNING!!!!

42 9810713 1165

PL106

CHARGER ON

D104

STPS340U

PL105

1215061-03F

9019915102410

1-2 : Regulator 2-3 : Battery

CHARGE 2:9B

ON_OFF* 2:5E;2:9B

RESET*

2:4E;2:9C

GND

+3.7V

47K

WNs

SOT-323

BCR185W

Q105

+3.7V

R118

0402

noMount=YES

LDO_ON_OFF* 3:6C;3:7B;4:6E;5:2B;5:2D;5:8C

10K

47K

R116

0402

TR1

47K

+3.7V

2K2

47K

Q104

47K

BCR48PN

WTs

TR2

SOT-363

R117

47K

0402

GND

4.7

1206

4.7

1206

4.7

1206

4.7

1206

+3.7V

D103

STPS140Z

SOD123

Q103

IRL5602SPBF

TO-263AB

U34

SMB

5.6K

R109

1215061-03F

PL104

R110

R111

R112

R113

0603

PL103

1984617PT1.5_2-3.5-H

6 Vcc

GND

R103

R104

0603

C105

GND

R106

0402

R107

0402

4.7nF X7R

50V 0603

R108

680

0603

8.2K

2.2K

R105

DL101

Q101

BC847BW

SOT-323

680

0603

M676

YELLOW

1Fs

GND

1-2 : 5-40V IN 2-3 : 3.8V IN

SOT-23

BC857B

Q102

3Fs

GND

LY-M676-Q2S1-26

0603

MIN 5V MAX 40V

INPUT

RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE

POWER JACK

PL102

1984617PT1.5_2-3.5-H

RAPC

SO101

RAPC712X

GND

FUSE 1206

PL107

1984617PT1.5_2-3.5-H

D105

STPS140Z

U101

C104

470uF

50V 16X16.5 NR

LM2596S-ADJ-NOPB

+VIN

ON/OFF

GND

VOUT

FBACK

TAB

R101

0603

C102

GND

C103

10nF

X7R

50V

0603

GND

C101

10nF

50V 0603

X7R

D101

STPS3L60U

GND

TP101

TP102

1 2 3

R102

GND

G36 SMB

GND

0603

GND

L101

SLF12575

D102

STPS3L60U

G36 SMB

C108

GND

R114

2.0K

0603

R115

1.0K

0603

10nF

X7R 16V 0402

MODIFY

DATE

GND

C106

330uF

6.3V CONT-E

GND

C107

330uF

6.3V CONT-E

SOD123

GND

PATH /home/users/area

cs1139a.cir

Furlan M.

Serdi M.

Nonis R.

080705

ANNOTATION

PROJECT

0276

POWER REGULATOR / BATTERY CHARGE

SHEET N.

OT101

OT102

OT103

FILE NAME

Mod. 067 rev.1 11/02

PROJECT

DRAWN

VERIFIED

BATTERY LI-ION

3,7V(Li-Ion) Nominal

max voltage 4,2V (Li-Ion)

suggested capacity: 1000mAh

When using battery care must be

WARNING!!!!

taken to ensure that the right polarity is respected!

DESCRIPTION

EVK 2

OF SHEETS

1 30276SE11139A

DRAWING CODE

FORM

Page 64

42 9810713 1165

FORBIDDENVIETATE

TRACE

IIC

SSC

DATA

AUDIO

TX_TRACE RX_TRACE

IIC_SDA_HW

IIC_SCL_HW

SSC0_CLK

SSC0_MTSR

SSC0_MRST

C109/DCD

C104/RXD

C103/TXD C108/DTR

C107/DSR

2 x 5

C105/RTS

C106/CTS

C125/RING

EAR_HF+ EAR_MTEAR_HFEAR_MT+

MIC_HF-

2 x 5

MIC_MT+ MIC_HF+ MIC_MT-

PL201

4731955140400

GND

GND GND GND GND

GND

GND GND

AXE

GND GND

GND

+3.7V

GND

PL202

4731955140400

VBATT VBATT VBATT VBATT GND GND GND GND CHARGE CHARGE GND GND GND GND ON_OFF*

RESET*

STAT_LED

GND GND GND GND

SIMIO SIMCLK SIMRST SIMVCC SIMIN

GND GND GND

2 x 5

SUPPLY

SIM

GND

R202

R203

TX_TRACE 3:3C RX_TRACE 3:3C

C109/DCD 3:3C C104/RXD 3:3C C103/TXD 3:3C C108/DTR 3:3C

C107/DSR 3:3C C105/RTS 3:3C C106/CTS 3:3C C125/RING 3:3C

EAR_HF+ 4:11B EAR_MT4:9B EAR_HF4:11B EAR_MT+ 4:9B AXE 4:11B MIC_HF4:11B MIC_MT+ 4:9B MIC_HF+ 4:11B MIC_MT4:9B

R206

0402

R205

0402

R204

0402

IIC_SDA_HW 5:5D

IIC_SCL_HW 5:5D SSC0_CLK 5:11B SSC0_MTSR 5:11B SSC0_MRST 5:11B

GND

SIMIO

FMS006Z-2001-0

GND

SO201

SIM_CARD

CHARGE

1:8A

ON_OFF*

1:9A;5E

RESET*

1:9B;4E

STAT_LED

TP204

C202

TP203

C203

33pF

COG

0402

33pF

COG

GND

50V

0402

GND

50V

TP202

SIMCLK

SIMRST

SIMVCC

SIMIN

TP206

C201

33pF COG

50V

0402

GND

C204

TP205

33pF

COG

50V

0402

GND

RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE

YELLOW - STAT LED

LY-M676-Q2S1-26

DL201

M676

YELLOW

+3.7V

R201

0603

TP201

ON_OFF* 1:9A;9B

ON BUTTON

SW202

MODIFY

DATE

PATH /home/users/area

FILE NAME

Mod. 067 rev.1 11/02

PROJECT

DRAWN

VERIFIED

Furlan M.

Serdi M.

Nonis R.

cs1139a.cir

080705

ANNOTATION

PROJECT

SHEET N.

DESCRIPTION

INTERFACE CONNECTORS

OF SHEETS

50276

EVK 2

DRAWING CODE

30276SE11139A

FORM

RESET BUTTON

330

GND

STAT_LED 9C

SW201

SKHHAL

RESET* 1:9B;9C

SKHHAL

GND

Page 65

42 9810713 1165

FORBIDDENVIETATE

TX_TRACE_USB

RX_TRACE_USB

TX_PROG_USB

RX_PROG_USB

DSR_USB

DTR_USB

DCD_USB

CTS_USB

RTS_USB

5:11C

RI_USB

+3.7V

JP302

C302

2.2uF

GND

X5R

6.3V 0603

GND

LDO_ON_OFF*

1:11B;6C;4:6E;5:2B;5:2D;5:8C

+3.7V

JP301

PL301

1215061-10F

5:5D

5:5E

ASC1 (TRACE)

ASC0 (PROG)

USB RS232

TX_TRACE

2:3B

RX_TRACE

2:3B

C104/RXD

2:3B

C103/TXD

2:3C

C125/RING

2:3C

C107/DSR

2:3C

C108/DTR

2:3C

C109/DCD

2:3B

C106/CTS

2:3C

C105/RTS

2:3C

HW FLOW CONTROL

PL302

1215061-10F

PL303

1215061-10F

C301

2.2uF

X5R

6.3V 0603

GND

LDO_ON_OFF*

1:11B;7B;4:6E;5:2B;5:2D;5:8C

GND

U301

LP2982AIM5X-3_0-NOPB

V_IN

GND

ON-OFF*4BYPASS

L20A

MA05A

USB/RS232 Switch

U302

LP2982AIM5X-3_0-NOPB

V_IN

V_OUT

GND

ON-OFF*4BYPASS

L20A

MA05A

V_OUT

C303

15nF

X7R

25V

0402

GND

TP301

C304

10uF 10V

CONT-A

C305

X7R

TP302

X7R

10V

0603

C309

220nF

X7R

10V

0603

X7R

10V

0603

X7R

10V

0603

C306

15nF

25V

CONT-A

0402

R304

47K

10uF 10V

0402

C310

GND

R301

47K

0402

R302

47K

0402

R303

47K

0402

R305

0402

R306

47K

0402

C307

47K

C308

VCC

C1+

C1-

C2+

U304

C2-

MAX3237CAI+

SSOP-28

T1OUT

T1IN

T2IN

T2OUT

T3IN7T3OUT

T4IN

T4OUT

T5IN

T5OUT

R1OUTB

R1OUT

R2OUT

R3OUT

MBAUD

GND 2

R1IN

R2IN

R3IN

SHDN*

GND

VCC

C1+

C1-

C2+

U303

C2-

MAX3237CAI+

SSOP-28

T1OUT

T1IN

T2IN

T2OUT

T3IN7T3OUT

T4IN

T4OUT

T5IN

T5OUT

R1OUTB

R1OUT

R2OUT

R3OUT

MBAUD

GND

GND 2

R1IN

R2IN

R3IN

SHDN*

V+

V-

EN*

JP303

V+

V-

EN*

JP304

C314

C316

C312

C313

C315

C311

2.2uF

220nF

2.2uF

220nF

X5R

6.3V

0603

X7R

10V

0603

X7R

10V

0603

GND

SO301

X5R

6.3V

0603

X7R

10V

0603

X7R

10V

0603

GND

CD81V1SSAAC

TRACE

DCD RXD TXD DTR GND DSR RTS CTS RI

ASC1

PROG

ASC0

GND

RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE

MODIFY

DATE

PATH /home/users/area

FILE NAME

Mod. 067 rev.1 11/02

PROJECT

DRAWN

VERIFIED

Furlan M.

Serdi M.

Nonis R. 080705

cs1139a.cir

080705

ANNOTATION

PROJECT

0276

DESCRIPTION

UART

SHEET N.

OF SHEETS

EVK 2

DRAWING CODE

30276SE11139A

FORM

Page 66

42 9810713 1165

FORBIDDENVIETATE

PL401

9019915102410

C412

R411

COG

50V

0603

10pF

0603

noMount=YES

100K

R404

0603

+3.7V

JP403

GND

C403

100nF

16V 0603

R401

0603

Y5V

GND

C404

100nF

16V 0603

R402

0603

Y5V

C408

100nF

Y5V 16V 0603

GND

U401

LM4862MX-NOPB

VDD

SHUTDOWN

VC1

VC2

GND

R408

noMount=YES

BYPASS

IN-

IN+

0603

C414

1uF

X5R

6.3V 0603

GND

R412

noMount=YES

100K

R406

R407

JP401

0603

R409

noMount=YES

Y5V

C415

100nF

Y5V

C416

100nF

R410

noMount=YES

0603

16V

0603

PL402

16V

0603

EAR_MT+

0603

EAR_MT-

MIC_MT+

MIC_MT-

2:3D

2:3C

2:3D

1215061-05F

GND

AUDIO Switch

PL403

1215061-05F

PL404

1215061-05F

AXE 2:3C

EAR_HF+ 2:3C

EAR_HF2:3C MIC_HF+ 2:3D MIC_HF2:3D

OPTIONAL POWER AMPLIFIER

SO401

PJ25605-T2

TP402

RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE

TP404

TP403

3 4 2

C401

22pF

COG

50V

0402

GND

C402

1nF

16V 0402

L401

2250

BLM21

C405

10pF

COG

X7R

16V

0402

GND

C406

22pF

50V 0402

L402

2250

BLM21

COG

C407

X7R

0402

16V

1nF

GND

EARPIECE

R403

2.2K

0402

C409

2.2uF X5R

10V

C413

CONT-D

100uF

10V

0402

Y5V

100nF

C410

10V

0402

Y5V

100nF

C411

GND

+3.7V

GND

C419

2.2uF

6.3V 0603

JP402

X5R

LDO_ON_OFF* 1:11B;3:6C;3:7B;5:2B;5:2D;5:8C

U402

LP2982AIM5X-3_0-NOPB

V_OUT

ON-OFF*

BYPASS

L20A

MA05A

C418

15nF

X7R 25V 0402

V_IN

GND

C417

10uF

10V

CONT-A

TP401

GND

Q401

BC847BW

SOT-323

1Fs

R405

22K

0402

6.3V

0603

GND

MODIFY

DATE

PATH /home/users/area

DESCRIPTION

FILE NAME

Mod. 067 rev.1 11/02

PROJECT

DRAWN

VERIFIED

cs1139a.cir

Furlan M.

Serdi M.

Nonis R. 080705

080705

ANNOTATION

PROJECT

0276

SHEET N.

EVK 2

FORM

AUDIO

OF SHEETS

DRAWING CODE

5 30276SE11139A

Page 67

42 9810713 1165

USB

connector

SO501

FORBIDDENVIETATE

USBE-004

1:11B;3:6C;3:7B;4:6E;2D;8C

JP501

GND

LDO_ON_OFF*

USB HUB

1:11B;3:6C;3:7B;4:6E;2B;8C

RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE

+5V_USB

TP531

USB0 <-> PROG. + I2C

+5V_USB

R501

18K

0402

GND

C518

10uF

10V CONT-A

TP532 TP533 TP534

+5V_USB

4.7K

R502

R503

R504

R512

noMount=YES

TP535

LDO_ON_OFF*

0402

R535

X501

NX1255GB

6.000MHz

C505

27pF

GND

TP502

R510

1.5K

3.3V_HUB

0402

100nF

10V

0402

GND

+5V_USB

R507

R508

XTIN_FT2232

5A;9C

U501

93LC56B_I-SNG

CLK

GND

NC_7

NC_6

0402

JP502

GND

R511

GND

+5V_USB

R514

15K

0402

GND

470

0402

C506

100nF

X5R 10V 0402

GND

C507

X7R

0402

47nF

16V

1.5K

R513

0402

50V

0402

47pF

C504

COG

GND

R509

15K

0402

VCC

VSS

0402

R505

100K

0402

C502

X5R

18K

0402

JP504

COG

0402

50V

GND

SUSPND

DP0

DM0

VCC_3

RESET

EECLK

EEDATA/GANGED

GND_7

BUSPWR

TEXTUSB2036VFRG4

PWRON110OVRCUR111DM112DP113PWRON214OVRCUR215DM216DP2

AVCC

3V3OUT

USBDM

USBDP

RSTOUT

RESET

XTIN

XTOUT

EECS

EESK

EEDATA

TEST

GND

CP12A

R516

1.5K

0402

GND

MODE

XTAL2

GND_28

DP0PUR

VCC_42

C501

EXTMEM

X5R

100nF

VCCIOA

OCPROT/PWRSW

10V

VCCIOB ADBUS0

ADBUS1

ADBUS2

ADBUS3

ADBUS4

ADBUS5

ADBUS6

ADBUS7

ACBUS0

ACBUS1

ACBUS2

ACBUS3

XTAL1/CLK48

U502

S-PQFP-G32

+5V_USB

VCC_3

U503

FT2232L

LQFP48

AGND9GND_918GND_1825GND_2534GND_34

BDBUS0

BDBUS1

BDBUS2

BDBUS3

BDBUS4

BDBUS5

BDBUS6

BDBUS7

BCBUS0

BCBUS1

BCBUS2

BCBUS3

C508

VCC_25

0402

SI/WUA

SI/WUB

PWREN

COG

27pF

NPINT1

NPINT0

OVRCUR3

PWRON3

GND

0402

50V

GND

U504

NP3

DP3

DM3

R519

JP506

R536

R538

18K

TP505

3.3V_HUB

C503

VCC

100nF

X5R

GND

10V

0402

noMount=YES

GND

PL502

9019915102410

74AHC1GU04DCKRG4

JP511

15K

0402

R521

15K

3.3V_HUB

15K

0402

IIC_SCL_HW

2:4B

IIC_SDA_HW

2:4B

+5V_USB

0402

GND

RX_PROG_USB 3:2C

TX_PROG_USB

3:2C

RTS_USB

3:2C

CTS_USB 3:2C

DTR_USB

3:2C DSR_USB 3:2C DCD_USB 3:2C RI_USB 3:2C

U504

74AHC1GU04DCKRG4

XTIN_FT2232 3D;9C

R520

GND

C509

100nF

X5R

10V

0402

GND

3.3V_HUB

R515

0402

noMount=YES

R517

0402

GND

TP515

C510

10uF

10V

CONT-A

3.0V_USB

GND

C512

100nF

X5R

10V

0402

GND

3.3V_HUB

C513

10uF

10V

GND

C514

X7R

15nF

25V

0402

CONT-A

GND

R522

15K

0402

GND

LP2981AIM5X-3_0-NOPB

GND

U505

VIN

OUT

GND

ON/OFF*

L05A

MA05A

U506

LP2982AIM5X-3_3

V_OUT

BYPASS

L19A

MA05A

R523

15K

0402

GND

ON-OFF*

+5V_USB

GND

V_IN

GND

C515

2.2uF

6.3V 0603

+5V_USB

C516

2.2uF

X5R

6.3V 0603

GND

470

R528

R529

3D;5A

R527

0402

C519

100nF

X5R 10V 0402

GND

C521

X7R

0402

47nF

16V

GND

0402

C520

1.5K

R531

50V

0402

47pF

COG

3V3OUT

USBDM

USBDP

0402

RSTOUT

RESET

XTIN

XTOUT

EECS

EESK

EEDATA

TEST

+5V_USB

1:11B;3:6C;3:7B;4:6E;2B;2D

LDO_ON_OFF*

R537

noMount=YES

TP530

18K

JP503

+5V_USB

0402

XTIN_FT2232

TP526 TP527

GND

TP528

X5R

+5V_USB

R524

18K

0402

R525

U507

93LC56B_I-SNG

4.7K

0402

CLK

NC_7

NC_6

+5V_USB

VCC

VSS

GND

TP529

+5V_USB

AVCC

VCC_3

VCC_42

U509

FT2232L

LQFP48

AGND9GND_918GND_1825GND_2534GND_34

GND

C517

3.0V_USB

VCCIOA

100nF

VCCIOB ADBUS0

ADBUS1

ADBUS2

ADBUS3

ADBUS4

ADBUS5

ADBUS6

ADBUS7

ACBUS0

ACBUS1

ACBUS2

ACBUS3

SI/WUA

BDBUS0

BDBUS1

BDBUS2

BDBUS3

BDBUS4

BDBUS5

BDBUS6

BDBUS7

BCBUS0

BCBUS1

BCBUS2

BCBUS3

SI/WUB

PWREN

X5R

10V

0402

GND

R506

R526

SSC0_CLK

2:4B

SSC0_MTSR 2:4B SSC0_MRST 2:4B

TP516

18K

0402

18K

0402

RX_TRACE_USB 3:2C

TX_TRACE_USB

3:2C

+5V_USB

GND

USB1 <-> TRACE + SSC

MODIFY

DATE

DESCRIPTION

OF SHEETS

EVK 2

DRAWING CODE

30276SE11139A

FORM

PATH /home/users/area

FILE NAME

Mod. 067 rev.1 11/02

PROJECT

DRAWN

VERIFIED

cs1139a

Furlan M.

Serdi M.

Nonis R.

080705

ANNOTATION

PROJECT

0276

USB <-> PROG,TRACE,I2C,SSC

SHEET N.

Page 68

Telit GE863-QUAD / GE863-PY

Hardware User guide

1vv0300715, Rev. ISSUE#0, - 21/02/06

13 EVB CAMERA SCHEMATICS

Page 69

RIPRODUZIONE E DIVULGAZIONE REPRODUCTION AND DISCLOSURE

42 98

CAM_DRDY/AGILENT

VCC_MAIN_CAM

R111

R110

0402

SO105

FORBIDDENVIETATE

SCLK

AGND

AVDD28

RESET_N

CLK_IN

DGND

DOUT0

DOUT1

DOUT2

DOUT3

DOUT4

DOUT5

DOUT6

DOUT7

DOUT8

VCLKOUT

VALIDH

VALIDV

DVDD28

SDIN

PS1

PS2

Shield

LED_CTRL

52437–2472

JP105

JP106

JP107

C109

2.2uF

X5R

6.3V 0603

GND

JP108

JP109

JP110

C110

2.2uF

X5R

6.3V 0603

GND

JP112

R115

0402

JP114

R116

0402

JP116

JP117

noMount=YES

GND

47K

0402

noMount=YES

CAM_SCL/IIC_SCL

TGPIO_09/CAM_RST

CAM_M_CLK

10D;5A

TP101

TP102

TP103

TP104

TP105

TP106

TP107

TP108

TP109

TP110

TP111

TP112

CAM_SDA/IIC_SDA

6B;9B

TGPIO_08/CAM_ON

noMount=YES

SO104

4773540102470

GND

R112

0402

noMount=YES

X7R

25V

0402

15nF

C111

R113

GND

0402

TransChip TC5747MF24L (24pin)

SN74LVC1G08DCKR

U101

R103

R104

100K5%

0402

C112

100nF

Y5V

– 1 –

71 3 1165

GM862

TRIZIUM

SO109

213

PD[2]

4773540103470

SO107

4773540103470

213

SO108

213

PD[5]

4773540103470

INTERFACE CONNECTORS

R114

U101

SN74LVC1G08DCKR

MODIFY

DATE

PATH /home/users/area

noMount=YES

GND

C106

15nF

25V 0402

X7R

VCC_MAIN_CAM

JP120

GND

VCC

GND

10V

0402

GND

FILE NAME

CAM_M_CLK

5A;5C

0402

MON1/CAM_CLK

cs1170.cir

Mod. 067 rev.1 11/02

PROJECT

DRAWN

VERIFIED

Furlan M.

Pasqualini N.

SO101

4779723130417

060905

VCC_MAIN_CAM

ANNOTATION

PROJECT

TC5747MF24L

TGPIO_08/CAM_ON

TGPIO_09/CAM_RST

CAM_SDA/IIC_SDA

CAM_SCL/IIC_SCL

VAUX1

5D;6B

SO106

4773540103470

C104

10uF

10V

CONT–A

GND

CAM_PWR_ON/AGILENT

CAM_SYNC/AGILENT

MON1/CAM_CLK

PD[0]

PD[1]

PD[6]

IICSCL/AGILENT

PD[3]

PD[4]

LP2982AIM5X–2_8–NOPB

V_OUT

BYPASS

C105

15nF

X7R

25V 0402

GND

SHEET N.

1 30276SE11170

4779723130417

10D

R105

R106

0402

PD[7]

VAUX1

R107

0402

GND

JP121

U102

MA05A

L18A

V_IN

GND

ON–OFF

DESCRIPTION

R108

GND

0402

R109

0402

noMount=YES

I2CBUS DUAL CAMERA

OF SHEETS

DRAWING CODE

10276

SO102

C107

33pF

COG

50V

0402

GND

CAM_PWR_ON/AGILENT

C108

2.2uF

X5R

6.3V 0603

GND

OT101

FORM

Page 70

VIETATE

RIPRODUZIONE E DIVULGAZIONE

FORBIDDEN

REPRODUCTION AND DISCLOSURE

MODIFY

DATE

PATH FILE NAME FILE GERBER

Project by

Drawn by: Pasqualini Natascia

Verif. by

/Archivio_PCB/cs1170 cs1170

Mod. 048 Rev.0 6/99

06/09/2005

ANNOTATION

Project

0276

DESCRIPTION

cs1170

I2CBUS DUAL CAMERA

Silkscreen side A

SHEET N.1OF SHEETS2DRAWING CODE

CS1170.SM

FORM

Page 71

VIETATE

RIPRODUZIONE E DIVULGAZIONE

FORBIDDEN

REPRODUCTION AND DISCLOSURE

MODIFY

DATE

PATH FILE NAME FILE GERBER

Project by

Drawn by: Pasqualini Natascia

Verif. by

/Archivio_PCB/cs1170 cs1170

Mod. 048 Rev.0 6/99

06/09/2005

ANNOTATION

Project

0276

DESCRIPTION

cs1170

I2CBUS DUAL CAMERA

Silkscreen side B

SHEET N.2OF SHEETS2DRAWING CODE

CS1170.SM

FORM

Telit Communications S p A GE864 Users Manual

Specifications and Main Features

Frequently Asked Questions

User Manual