Tektronix TDS684C, TDS694C Datasheet
Features & Benefits
3 GHz and 1 GHz Bandwidths
to Work with the Fastest
Signals in Today’s Digital
Designs
10 GS/s and 5 GS/s
Sample Rates on all
Channels Simultaneously
for Full Bandwidth
Single-shot Capture
Waveform Math and
Advanced Waveform DSP
Waveform Pass/Fail
Template Testing
Color Display
RS-232, Centronics and GPIB
Interfaces Included Standard
Record Length to 120,000
Points/Channel*
1
Timebase Accuracy to
10 ppm, Time Interval
Measurement Accuracy to
±15 ps (TDS694C)
Trigger Jitter 8 ps
RMS
(Typical)
1% Vertical Accuracy
(TDS694C)
100 ps Peak Detect
(TDS694C Only)
*1TDS694C with long record length option (1 M) only.
15,000 points/channel maximum on TDS684C.
Applications
Validation and
Characterization of High
Speed Digital Designs
– Verify Simulation
Performance with Real
Measurements
– Ensure that Desired Design
Margins Exist
– Jitter Measurements on
High-speed Data, Phaselocked Loops and Spreadspectrum Clock Circuits
– Capture Glitches, Cross-talk,
Setup/Hold Violations
Telecommunications/Data
Communications Design
– Characterize Rise Times,
Overshoot, Channel-tochannel Timing
– Verify and Test High-speed
Serial Data Streams
High-energy Physics
– Transient Event Capture
Digital Storage Oscilloscopes
TDS694C • TDS684C
Whether you are working on next generation
microprocessor designs, high-speed data
communications equipment or in high-energy
physics research, the TDS694C captures
your fastest signals with the best fidelity and
resolution available. Its 3 GHz bandwidth
preserves your waveform’s fast rising edges
and accurately shows signal details.With
10 GS/s digitizing rate simultaneously on all
four channels and a high-stability timebase,
the TDS694C makes your critical timing
measurements with the highest resolution
and accuracy – even channel-to-channel
measurements made in a single acquisition.
The TDS600C oscilloscopes incorporate all
the advanced trigger features you expect in
a high performance oscilloscope: triggering
on Glitches, Slew Rate violations, Setup-andhold Time violations, Timeouts, Logic Patterns
and States on four channels. For applications
where sophisticated multi-channel debugging
is required, the TDS694C can be configured
for cross triggering with a Tektronix TLA700
Logic Analyzer.
The TDS600C oscilloscopes give you the total
solution to your digital design characterization
and debugging needs. Now you have the tool
you need to verify design margins, characterize setup-and-hold times and measure clockto-data skew on the fastest digital designs.
The TDS694C’s companion probe, the P6249,
offers small size to reliably contact your highdensity boards with their fine-pitch, hard to
reach components.The P6249 has short
ground connection to give the maximum
system bandwidth and preserve the details
of your signals.
The TDS600C offers 29 automatic measurements, with measurement statistics, to make
your design verification and characterization
job much faster and easier. Available Javabased application packages for jitter analysis,
disk drive measurements and processor
specification measurements provide customized measurements and analysis capability.
The TDS600C gives you the performance and
features you need to get your job done faster
and more thoroughly.
Digital Storage Oscilloscopes • www.tektronix.com/scopes
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TDS694C.
Digital Storage Oscilloscopes
TDS694C • TDS684C
Characteristics
Time Base System
Time Bases – Main and delayed.
Time/div Range – 200 ps/div to 10 s/div.
Except TDS694C:100 ps/div to 10 s/div.
Time Base Accuracy– ±100 ppm. Except
TDS694C: ±10 ppm.
Time Interval Measurement Accuracy–
TDS684C: ±[(0.2/sample rate) + (100 ppm x
|reading|)] single shot. (≈ 50 ps @ 5 GS/s).
TDS694C: ±[(0.15/sample rate) + (10 ppm x
|reading|)] single shot. (≈ 15 ps @ 10 GS/s).
Record Length per Channel – 500 to 15,000 pts.
Except TDS694C:500 to 30,000 pts.
(optional: 120,000 pts.).
Trigger Jitter– 8ps
RMS
(typical).
Pre-trigger Position – 0% to 100% of record.
Channel-to-channel Deskew Range – ±25 ns.
Vertical System
Vertical Resolution – 8-Bit (>11-Bit with averaging).
Vertical Sensitivity – 1 mV/div to 10 V/div.
Except TDS694C:10 mV/div to 1 V/div.
Floppy Disk Drive – Store reference waveforms,
setups and image files on 3.5 in. 1.44 MB or 720 K
Microsoft DOS-format floppy disk.
Maximum Input Voltage – 300 V CAT II; ±400V
peak. Derate at 20 dB/decade above 1 MHz.
Except TDS694C: 5 V
RMS
.
DC Gain Accuracy– ±1.5%.
Except TDS694C: ±1.0%.
Position Range – ±5 divs.
Offset –
±1 V from 1 to 99.5 mV/div,±10 V from 100 mV to
995 mV/div,±100 V from 1 V to 10 V/div.
Except TDS694C:±0.5 V from 10 to 50 mV/div,
±0.25 V from 50.5 to 100 mV/div,±5 V from 101 mV
to 500 mV/div,±2.5 V from 505 mV to 1 V/div.
Bandwidth Selections – 20 MHz, 250 MHz and full.
Except TDS694C: Full only.
Input Impedance Selections – 1 MΩ in parallel with
10 pF,or 50 Ω (AC and DC coupling).
Except TDS694C: 50 Ω (DC coupled).
Input Coupling – AC, DC or GND. Except TDS694C:
DC or GND.
AC Coupled Low Frequency Limit (except
TDS694C) – <10 Hz when AC,1 MΩ coupled.
<200 kHz when AC,50 Ω coupled.
Channel Isolation – >100:1 at 100 MHz and
>30:1 at BW for any two channels having
equal V/div settings.
Acquisition Modes
Peak Detect – High frequency and random glitch
capture. Captures glitches of 1 ns using acquisition
hardware at all real-time sampling rates.TDS694C
captures glitches of 100 ps.
Sample – Sample data only.
Envelope – Max/min values acquired over one
or more acquisitions.
Average – Waveform data from 2 to 10,000
waveforms (selectable) is averaged.
Single Sequence – Use RUN/STOP button to capture
a single triggered acquisition at a time, which may be
automatically saved to NVRAM with AutoSave.
Triggering System
Trigger Types
EDGE (main and delayed) –
Conventional level-driven trigger.Positive or negative
slope on any channel or rear panel auxiliary input.
Coupling selections: DC,AC,noise reject,HF reject,
LF reject.
LOGIC (main) –
PATTERN: Specifies a logical combination (AND, OR,
NAND, NOR) of the four input channels (high, low,
don’t care).Trigger when pattern stays true or false
for a specified time.
STATE:Any logical pattern of channels 1, 2 and 3 plus
a clock edge on channel 4. Triggerable on rising or
falling clock edge.
SETUP/HOLD:Trigger on violations of both setup time
and hold time between clock and data which are on
two input channels.
PULSE (main) –
GLITCH:Trigger on or reject glitches of positive,
negative or either polarity.Minimum glitch width
is 1.0 ns with 200 ps resolution.
RUNT:Trigger on a pulse that crosses one threshold
but fails to cross a second threshold before crossing
the first again.
WIDTH:Trigger on width of positive or negative
pulse either within or out of selectable time limits
(1 ns to 1 s).
SLEW RATE:Trigger on pulse edge rates that are
either faster or slower than a set rate. Edges can
be rising, falling or either.
TIMEOUT:Trigger on an event which remains high,
low or either,for a specified time period, selectable
from 1 ns to 1 s, with 200 ps resolution.
TLA Cross Trigger (TDS694C only) – Utilize a
TLA700 logic analyzer to detect a multi-channel
event, then trigger the TDS694C.The trigger points
on the TLA and TDS will be aligned in time.
VIDEO (optional; not available in TDS694C)–
Trigger on a particular line of individual,odd/even or
all fields.Trigger on a specific pixel of a line by using
the video trigger with delay by events. Choose positive
or negative horizontal sync polarity.
525/NTSC: Choose monochrome or color (studioquality NTSC) sync formats. 625/PAL:Choose color
or monochrome (studio-quality PAL) sync formats.
HDTV:Choose from 1125/60,1050/60, 1250/50
and 787.5/60 HDTV formats.
Trigger Bandwidth (edge type)–
3 GHz (TDS694C).
1 GHz (TDS684C).
Main Trigger Modes – Auto, normal, single.
Delayed T rigger– Delay by time, events, or events
and time.
Delay by Time Range– 16 ns to 250 s.
Delay by Events Range – 2 to 9,999,999 events.
External Trigger Input – Input impedance: ≥1.5 kΩ;
max. input voltage: ±20 V (DC + peak AC).
Digital Storage Oscilloscopes • www.tektronix.com/scopes
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