The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software, if any,
and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.
IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all
claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.
Manual Revision 1.0b
Release Date: March 6, 2009
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
One (1) PCI-Express x8 Gen2 on x16 slot (Slot 6)•
Two (2) PCI-Express x8 Gen2 slots (Slot 3/Slot 5)•
One PCI-Express x4 on x8 slot (Slot 4)•
Two (2) 32-bit PCI 33MHz slots (Slot 1/Slot 2)•
Graphics
Support for multiple PCI-Express Graphics cards (Gen 2 or Gen 1)•
Matrox G200 with 16 MB DDR2 Memory •
Network Connections
Intel Dual-channel 82574L Gigabit (10/100/1000 Mb/s) Ethernet Controller with •
two Gigabit LAN ports (LAN 1 and LAN 2)
Realtek RTL8201N PHY (Dedicated LAN for X8ST3-F)•
Three (3) RJ-45 backplane connectors with Link and Activity LEDs built-in•
I/O Devices
SATA Connections
Six (6) SATA ports supported by the Intel ICH10R SATA Controller•
Supports RAID 0, 1, 5, 10 under the Windows OS environment •
Supports RAID 0, 1 , 10 under the Linux OS environment•
1-6
Chapter 1: Introduction
SAS Connections (for the X8ST3-F only)
Eight (8) SAS ports supported by the LSI 1068E Controller•
Supports RAID 0, 1, 5*, 10 under the Windows OS environment •
Supports RAID 0, 1 , 5*, 10 under the Linux OS environment•
Notes:
1. RAID 5 is supported when the I-Button (AOC-IButton68) is installed on
the motherboard. For more information on the AOC-IButton68, please refer
to http://www.supermicro.com/products/accessories/addon/AOC-IButton68.
cfm.
2. For the LSI 1068 Controller User's Guide, please refer to http://www.
supermicro.com/support/manuals/.
Integrated IPMI 2.0 (for the X8ST3-F only)
IPMI 2.0 supported by the WPCM450 Server BMC•
Note: For IPMI Conguration Instructions, please refer to the Embedded
IPMI Conguration User's Guide available @ http://www.supermicro.com/
support/manuals/.
Floppy Drive
One (1) oppy port interface (up to 1.44 MB)•
USB Devices
Two (2) USB ports (USB 0~1) on the IO backplane for rear access•
Six (6) USB connections for front access (Two Type A connectors: USB 2, •
USB 3 and two headers: USB 4/5, 6/7)
Keyboard/Mouse
PS/2 Keyboard/Mouse ports on the I/O backplane•
Serial (COM) Ports
Fast UART 16550 Connections: one COM port and one header•
Super I/O
Winbond Super I/O 83627DHG•
BIOS
4 MB SPI AMI BIOS•
DMI 2.3, PCI 2.3, ACPI 1.0/2.0/3.0, USB Keyboard and SMBIOS 2.5•
®
SM Flash BIOS
PowerConguration
ACPI/ACPM Power Management•
Main switch override mechanism•
1-7
X8ST3-F/X8STE User’s Manual
Keyboard Wake-up from Soft-Off•
USB Wake-up from Soft-Off•
Wake-on-LAN•
Power-on mode for AC power recovery•
PC Health Monitoring
CPU Monitoring
Onboard voltage monitors for CPU core, Memory Voltage, Chipset Voltage, •
+1.8V, +3.3V, +3.3V standby, +5V, +5V, Standby, VBat and ±12V
CPU 6-Phase-switching voltage regulator•
CPU/System overheat LED and control•
CPU Thermal Trip support•
Thermal Monitor 2 (TM2) support•
Fan Control
Fan status monitoring with rmware 4-pin (Pulse Width Modulation) fan •
System resource alert via Supero Doctor III •
SuperoDoctor III, Watch Dog, NMI•
I•2C temperature sensing logic
Chassis Intrusion Header and Detection•
Pb Free•
CD Utilities
BIOS ash upgrade utility•
Drivers and software for Intel® X58 Express chipset utilities •
Dimensions
ATX form factor, 12" x 10" (304.8 x 254.0 mm)•
1-8
Notes
Chapter 1: Introduction
1-9
X8ST3-F/X8STE User’s Manual
W83795ADG
H/W Monitor
Intel
VRD 11.1
Intel
IDT
Intersil
QPI: Up to 6.40 GT/s
PCIE_x 8
PCI_E x 8 on
x 16 Slot
W83627DHG
PCI 32 x 1 Slot
COM1
COM2
FloppyKB.
MS.
SPI
CK505 CLK
SPI EEPROM
LGA1366_PROCESSOR
Intel X58
FAN
x 5
ICH10R
LPC I/O
DMI
INTEL 82574L x 2
PCIE_x1
RJ45
PCI_E x 8 Slot
PCIE_x 8
PCI_E x 4 in x 8 Slot
PCIE_x 4
SATAII /300
USB x 8
SATA x 6
USB2.0
DIMM_CHB
DDR3:1333/1066/800
DIMM_CHA
DIMM_CHC
PCI_E x 8 Slot
PCIE_x 8
PCI 32 x 1 Slot
PCI_32_BUS
SAS1068E
PCIE_x8
SAS x 8
BMC WPCM450
IPMI LAN
CRT
RJ45
X8ST3-F/X8STE System Block Diagram
Note: This is a general block diagram and may not exactly represent
the features on your motherboard. See the following pages for the
actual specications of each motherboard.
1-10
Chapter 1: Introduction
1-2 Chipset Overview
Built upon the functionality and the capability of the Intel X58 Express chipset, the
X8ST3-F/X8STE motherboard provides the per formance and feature set required
for single-processor-based high-end systems with conguration options optimized
for intensive application and high-end server platforms.
The main architecture of the X8ST3- F/X8STE consists of an Intel® Core™ i7
or a Nehalem processor in the LGA1366 socket, the Intel X58 Express chipset,
and the ICH10R. With Intel QuickPath Interconnect (QPI) technology built in, the
X8ST3-F/X8STE i s o ne of th e rst moth erb oards on the mar ket t ha t offe rs the next
generation point-to -point system interconnect interface, replacing the current Front
Side Bus technology, providing substantial system performance enhancement by
utilizing serial link interconnections to increase bandwidth and scalability.
1-11
X8ST3-F/X8STE User’s Manual
1-3 PC Health Monitoring
This section describes the PC health monitoring features of the X8ST3-F/X8STE.
These features are supported by an onboard System Hardware Monitor chip.
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond when
AC power is lost and then restored to the system. You can choose for the system
to remain powered off (in which case you must hit the power switch to turn it back
on) or for it to automatically return to a power on state. See the Power Lost Control
setting in the BIOS chapter of this manual to change this setting. The default set-
ting is Last State.
Onboard Voltage Monitoring
The onboard voltage monitor will scan the following voltages continuously: CPU
Note 1: Both Unbuffered ECC and Non-ECC DIMM modules are supported
by the motherboard. Using ECC or Non-ECC memory on your motherboard
depends on the CPU installed.
Note 2: Due to OS limitations, some operating systems may not show
more than 4 GB of memory.
Note 3: Due to memory allocation to system devices, the amount of
memory that remains available for operational use will be reduced when
4 GB of RAM is used. The reduction in memor y availability is dispropor-
tional. Refer to the table on the next page. For Microsoft Windows users:
Microsoft implemented a design change in Windows XP with Service
Pack 2 (SP2) and Windows Vista. This change is specic to the Physical
2-8
Chapter 2: Installation
FAN1
JPW1
SMBUS_PS1
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
CPU FAN
Address Extension (PAE) mode behavior which improves driver compat-
ibility. For more information, please read the following article at Microsoft’s
Knowledge Base website at: http://support.microsoft.com/kb/888137.
Possible System Memory Allocation & Availability
System DeviceSizePhysical Memory
Remaining (-Available)
(4 GB Total System Memory)
Firmware Hub ash memory (System BIOS)1 MB3.99 GB
Local APIC4 KB3.99 GB
Area Reserved for the chipset2 MB3.99 GB
I/O APIC (4 Kbytes)4 KB3.99 GB
PCI Enumeration Area 1256 MB3.76 GB
PCI Express (256 MB)256 MB3.51 GB
PCI Enumeration Area 2 (if needed) -Aligned on
256-MB boundary-
512 MB3.01 GB
VGA Memory16 MB2.85 GB
TSEG1 MB2.84 GB
Memory available for the OS & other applications 2.84 GB
Note : The motherboard will NOT boot if DIMM module(s) are installed
in any of the Bank2 slots but none in the Bank1 slots. The rst DIMM
module must be installed in DIMM1A, and all Bank1 slots must be lled
before populating any Bank2 slot(s).
Channel 3 Slots
Channel 2 Slots
Channel 1 Slots
2-9
X8ST3-F/X8STE User's Manual
X8ST3-F/X8STE
2-5 Connectors/IO Ports
The I/O ports are color coded in conformance with the PC 99 specication. See the
gure below for the colors and locations of the various I/O ports.
Back Panel Connectors and IO Ports
2
1
5
4
3
Back Panel Connectors
1. Keyboard (Purple)
2. PS/2 Mouse (Green)
3. USB Port 0
4. USB Port 1
5. IPMI LAN (X8ST3-F)
6. COM 1
7. VGA
8. LAN1
9. LAN 2
6
7
89
2-10
Chapter 2: Installation
1
2
X8ST3-F/X8STE
ATX PS/2 Keyboard and PS/2
Mouse Ports
The ATX PS/2 keyboard and PS/2
mouse are located next to the Back
Panel USB Ports 0/1 on the mother-
board. See the table at right for pin
denitions.
Mouse
Keyboard
PS/2 Keyboard/Mouse Pin
Denitions
PS2 KeyboardPS2 Mouse
Pin# Denition Pin# Denition
1KB Data1Mouse Data
2No Connection2No Connection
3Ground3Ground
4Mouse/KB VCC
(+5V)
5KB Clock5Mouse Clock
6No Connection6No Connection
VCC: with 1.5A PTC (current limit)
4Mouse/KB VCC
(+5V)
1. Keyboard (Purple)
2. Mouse (Green)
2-11
X8ST3-F/X8STE User's Manual
X8ST3-F/X8STE
4
3
5
6
1
2
Universal Serial Bus (USB)
Two Universal Serial Bus ports (USB
0/1) are located on the I/O back panel.
Additional six USB connections (USB
2, USB 3, USB 4/5 and USB 6/7) are
used to provide front chassis access.
USB 2 and USB 3 are Type A Connec-
tors. (USB Cables are not included).
See the tables on the right for pin
denitions.
Back Panel USB 0/1
PinDenitions
Pin# Denition Pin# Denition
1+5V5+5V
2USB_PN16USB_PN0
3USB_PP17USB_PP0
4Ground8Ground
Front Panel USB 2, 3, 4/5, 6/7
PinDenitions
USB 2, 3, 4, 6
Pin # Denition
1+5V6+5V
2USB_PN2 7USB_PN3
3USB_PP2 8USB_PP3
4Ground9Ground
5No Con-
nection
USB 5, 7
Pin # Denition
10Key
1. Backplane USB 0
2. Backplane USB 1
3. Front Panel USB 2
4. Front Panel USB 3
5. Front Panel USB 4/5
6. Front Panel USB 6/7
2-12
Chapter 2: Installation
X8ST3-F/X8STE
3
1
2
Ethernet Ports
Two Ethernet ports are located next
to the VGA port on the IO Backplane.
In addition, an IPMI Dedicated LAN is
located above the USB ports. These
ports accept RJ45 type cables.
Notes:
1. The IPMI Dedicated LAN
is for the X8ST3-F only.
2. Please refer to the LED
Ind icator Secti on for LAN
LED information.
LAN Ports
PinDenition
Pin# Denition
1P2V5SB10SGND
2TD0+11Act LED
3TD0-12P3V3SB
4TD1+13Link 100 LED
5TD1-14Link 1000 LED
6TD2+15Ground
7TD2-16Ground
8TD3+17Ground
9TD3-88Ground
(Yellow, +3V3SB)
(Yellow, +3V3SB)
(NC: No Connection)
1. LAN1
2. LAN2
3 . IP MI D e di ca t ed L A N
(X8ST3-F only)
2-13
X8ST3-F/X8STE User's Manual
X8ST3-F/X8STE
1
2
Serial Ports
A COM Port is located on the IO
Backplane and a Serial port is lo-
cated next to the Floppy Dr ive to
provide front access. See the table
on the right for pin denitions.
SerialPortPinDenitions
(COM1/COM2)
Pin # DenitionPin # Denition
1CDC6DSR
2RXD7RTS
3TXD8CTS
4DTR9RI
5Ground10NC
1. COM1
2. COM2
2-14
X8ST3-F/X8STE
1
Video Connector
A Video (VGA) connector is located
next to the COM Po rt on the IO
backplane. This connector is used
to provide video and CRT display.
Refer to the board layout below for
the location.
Note: If you decide use an add-on
VGA card instead, you will need to
disable this device using jumper
JPG1. Please see page 1-4 for
the jumper location.
Chapter 2: Installation
1. VGA
2-15
X8ST3-F/X8STE User's Manual
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
Power Fail LED
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
1920
Vcc
X
Ground
NMI
X
Vcc
NIC2 LED
X8ST3-F/X8STE
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally lo-
cated on a control panel at the front of the chassis. These connectors are designed
specically for use with Supermicro server chassis. See the gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin denitions.
JF1 Header Pins
Pin 19Pin 20
Pin 2
Pin 1
2-16
FrontControlPanelPinDenitions
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
1920
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
X8ST3-F/X8STE
Chapter 2: Installation
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin denitions.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin denitions.
NMI Button
PinDenitions(JF1)
Pin# Denition
19Control
20Ground
Power LED
PinDenitions(JF1)
Pin# Denition
15+5V
16Ground
A. NMI
B. PWR LED
A
B
2-17
X8ST3-F/X8STE User's Manual
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
1920
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
X8ST3-F/X8STE
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
hard drive LED cable here to display
disk activity (for any hard drive ac-
tivities on the system, including Serial
ATA and IDE). See the table on the
right for pin denitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Control-
ler) LED connection for LAN port 1
is located on pins 11 and 12 of JF1,
and the LED connection for LAN Port
2 is on Pins 9 and 10. Attach the NIC
LED cables to display network activity.
Refer to the table on the right for pin
denitions.
HDD LED
PinDenitions(JF1)
Pin# Denition
13+5V
14HD Active
GLAN1/2 LED
PinDenitions(JF1)
Pin# Denition
9/11Vcc
10/12 Ground
A. HDD LED
B. NIC1 LED
C. NIC2 LED
2-18
A
B
C
Chapter 2: Installation
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
1920
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
X8ST3-F/X8STE
Overheat (OH)/Fan Fail LED
Connect an LED cable to the OH/
Fan Fail connection on pins 7 and 8
of JF1 to provide advanced warnings
for chassis overheat or fan failure.
Refer to the table on the right for pin
denitions.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Refer
to the table on the right for pin deni-
tions.
OH/Fan Fail LED
PinDenitions(JF1)
Pin# Denition
7Vcc
8Ground
OH/Fan Fail Indicator
Status
State Denition
OffNormal
OnOverheat
Flash-
Fan Fail
ing
PWR Fail LED
PinDenitions(JF1)
Pin# Denition
5Vcc
6Ground
A. OH/Fan Fail LED
B. PWR Supply Fail
2-19
A
B
X8ST3-F/X8STE User's Manual
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
1920
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
X8ST3-F/X8STE
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case to reset the system. Refer to the
table on the right for pin denitions.
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - see Chapter
4). To turn off the power in the suspend
mode, press the button for at least 4
seconds. Refer to the table on the right
for pin denitions.
Reset Button
PinDenitions(JF1)
Pin# Denition
3Reset
4Ground
Power Button
PinDenitions(JF1)
Pin# Denition
1Signal
2+3V Standby
A. Reset Button
B. PWR Button
2-20
A
B
Chapter 2: Installation
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
2-6 Connecting Cables
This section provides brief descriptions and pin-out denitions for onboard headers
and connectors. Be sure to use the correct cable for each header or connector.
• For information on Backpanel USB and Front Panel USB ports, refer to Page
2-14.
• For information on COM Port 1 and COM Port 2, please see Page 2-16.
ATX Power 24-pin Connector
PinDenitions(JPW1)
Pin# Denition Pin # Denition
13+3.3V1+3.3V
ATX Main PWR & CPU PWR
Connectors
Th e 24-pi n main power connect or
(JPW1) is used to provide power to
the motherboard. The 8-pin CPU PWR
connector (JPW2) is also required for
the processor. These power connec-
tors meet the SSI EPS 12V specica-
tion. See the table on the right for pin
denitions.
B
A
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
12V 8-pin Power Connec-
torPinDenitions(JPW3)
Pins Denition
1 through 4Ground
5 through 8+12V
(Required)
A. 24-Pin ATX Main PWR
2-21
B. 8-Pin Processor PWR
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
Fan Headers
The X8ST3-F/X8STE has ve fan head-
ers (Fan1 ~ Fan5). Fans 2~5 are system
cooling fans. Fan 1 is used as a CPU
fan. These fans are 4-pin fan headers.
However, Pins 1-3 of the fan headers are
backward compatible with the traditional
3-pin fans. The default setting is Disabled
which allows the onboard fans to run at
full speed. Refer to the table on the right
for pin denitions.
Note: Please use all 3-pin fans
or all 4-pin fans on a mother-
board. Please do not use 3-pin
fans and 4-pin fans on the same
board.
Fan Header
PinDenitions
Pin# Denition
1Ground (Black)
22.5A/+16V
(Red)
3Tachometer
4PWM_Control
A
A. Fan1 (CPU Fan)
B. Fan2
C. Fan3
D. Fan4
E. Fan5
2-22
B
C
D
E
Chapter 2: Installation
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
Internal Buzzer
The Internal Buzzer (SPKR1) can be
used to provide audible indications for
various beep codes. See the table on
the right for pin denitions. Refer to
the layout below for the locations of
the Internal Buzzer.
Speaker
On the JD1 header, Pins 3~4 are used
for internal speaker. Close Pins 3~4
with a cap to use the onboard speaker.
If you wish to use an external speaker,
close Pins 1~4 with a cable. See the
table on the right for pin denitions.
Internal Buzzer
PinDenition
Pin# Denitions
Pin 1Pos. (+) Beep In
Pin 2Neg. (-)Alarm
Speaker Connector
Speaker
PinDenitions
Pin Setting Denition
Pins 3~4Internal Speaker
Pins1~4External Speaker
A. Internal Buzzer
B. Speaker
A
2-23
B
C
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
Overheat/Fan Fail LED
The JOH header is used to connect
an LED to provide warnings of chas-
sis overheat. This LED will also blink
to indicate a fan failure. Refer to the
table on right for pin denitions.
Chassis Intrusion
A Chassis Intrusion header is located
at JL1 on the motherboard. Attach the
appropriate cable from the chassis to
inform you of a chassis intrusion when
the chassis is opened.
Overheat LED
PinDenitions
Pin# Denition
15vDC
2OH Active
OH/Fan Fail LED
PinDenitions
State Message
SolidOverheat
Blinking Fan Fail
Chassis Intrusion
PinDenitions(JL1)
Pin# Denition
1Intrusion Input
2Ground
A. Overheat/Fan Fail LED
B. Chassis Intrusion
A
2-24
B
Chapter 2: Installation
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
Power Supply I2C Connector
Power Supply (I2C) Connector, locat-
ed at SMB_PS1 on the motherboard.
This connector monitors the status
of the power supply, fan and system
temperature. See the table on the right
for pin denitions.
Onboard Power LED
An onboard Power LED header is
located at JLED1. This Power LED
header is connected to Front Control
Panel located at JF1 to indicate the
status of system power. See the table
on the right for pin denitions.
PWR Supply I2C
PinDenitions
Pin# Denition
1Clock
2Data
3PWR Fail
4Ground
Onboard PWR LED
PinDenitions
Pin# Denition
1VCC
2No Connection
3Connection to PWR
LED in JF1
A
A. PWR SMB
B. PWR LED
B
2-25
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
T-SGPIO 0/1 & 3-SGPIO 0/1 Headers
Two T-SGPIO ( Ser ial -Li nk Genera l
Purpos e Input/ Output) he aders ar e
located next to the I-SATA Port 1 on the
motherboard. Additionally, two 3-SGPIO
ports are also located next to SAS Port
3 on the X8ST3-F motherboard. These
headers are used to communicate with
the enclosure management chip in the
system. See the table on the right for
pin denitions. Refer to the board layout
below for the locations of the headers.
Alarm Reset
If three power supplies are installed
and Alarm Reset (JP5) is enabled, the
system will notify you when any of the
three power modules fail. Connect JP5
to a micro-switch to enable you to turn
off the alarm that is activated when a
power module fails. See the table on the
right for pin denitions.
Serial_Link-SGPIO
PinDenitions
Pin# Denition Pin Denition
1NC2NC
3Ground4DATA Out
5Load6Ground
7Clock8NC
NC: No Connections
Alarm Reset
PinDenitions
Pin Setting Denition
Pin 1Ground
Pin 2+5V
A. T-SPGIO 0
B. T-SPGIO 1
C.3- SPG IO 0 (X8ST 3-F
only)
D. 3-SPGIO 1 (X8ST3-F
only)
E. Alarm Reset
A
C
D
2-26
E
B
Chapter 2: Installation
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
Wake-On-LAN
The Wake - On- L AN header is located
at JWOL on the motherboard. See the
table on the right for pin denitions. (You
must also have a LAN card with a Wake-
On-LAN connector and cable to use this
feature.)
I-Button
An onboard I-Button, located next to
USB Ports 2~3, is an 1-wire computer
chip enclosed in a durable stainless steel
can. I-Button stores instructions, provides
electronic interface and allows HostRAID
to operate with Mega-RAID rmware.
Note: RAID 5 is supported when
the I-Button (AOC-IButton68) is
installed on the motherboard. For
more information on the AOC-
IButton68, please refer to http://
www.supermicro.com/products/
accessories/addon/AOC-IBut-
ton68.cfm.
Wake-On-LAN
PinDenitions
(JWOL)
Pin# Denition
1+5V Standby
2Ground
3Wake-up
A. WOL
B. I-Button
A
2-27
B
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
2-7 Jumper Settings
Explanation of Jumpers
To modify the operation of the mother-
board, jumpers can be used to choose
between optional settings. Jumpers cre-
ate shorts between two pins to change
the function of the connector. Pin 1 is
identied with a square solder pad on the
printed circuit board.
Note: On two pin jumpers, "Closed"
mea ns the jumper is on and "Open"
means the jumper is off the pins.
LAN Port Enable/Disable
JPL1/JPL2 enable or disable LAN
Port 1/LAN Port 2 on the mother-
board. See the table on the right for
jumper settings. The default setting
is enabled.
A
B
GLAN Enable
Jumper Settings
Pin# Denition
1-2Enabled (default)
2-3Disabled
A. LAN Port 1 Enable
B. LAN Port 2 Enable
2-28
Chapter 2: Installation
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads
to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such
as a small screwdriver to touch both pads at the same time to short the connection.
Always remove the AC power cord from the system before clearing CMOS.
Note: For an ATX power supply, you must completely shut down the system, remove
the AC power cord and then short JBT1 to clear CMOS.
Watch Dog Enable/Disable
Watch Dog is a system monitor that can
reboot the system when a software appli-
cation hangs. Close pins 1-2 to reset the
system if an application hangs. Close pins
2-3 to generate a non-maskable interrupt
signal for the application that hangs. See
the table on the right for jumper settings.
Watch Dog must also be enabled in the
BIOS.
Watch Dog
Jumper Settings (JWD)
Jumper Setting Denition
Pins 1-2Reset
(default)
Pins 2-3NMI
OpenDisabled
A. Clear CMOS
B. Watch Dog Enable
A
2-29
B
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
SMB to PCI-X/PCI-E Slots Speeds
Use Jumper JI2C1 to connect the System
Management Bus to the PCI slots, and
Jumper JI2C2, to the PCI-Exp. slots in
order to improve power management
for PCI-X and PCI-E slots. The default
setting is to close pins 2-3 to disable the
function. See the table on the right for
jumper settings.
SMBus to PCI-X/PCI-Exp Slots
Jumper Settings
Jumper Setting Denition
Pins 1-2Enabled
Pins 2-3 (Default)Disabled
(BMC) VGA Enable
JPG1 allows you to enable or disable the
onboard VGA connection supported by
the onboard WPCM450 Controller. The
default position is on pins 1 and 2 to en-
able VGA. See the table on the right for
jumper settings.
C
B
A
(BMC) VGA Enable/Dis-
able Jumper Settings
(JPG1)
Both Jumpers Denition
Pins 1-2Enabled
Pins 2-3Disabled
A. JI2C1
B. JI2C2
C. VGA Enable
2-30
Chapter 2: Installation
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
USB Wake-Up
Use JPUSB jumpers to "wake-up" your sys-
tem by pressing a key on a USB keyboard or
clicking the USB mouse of your system. The
JPUSB jumpers are used together with the
USB Wake-Up feature in the BIOS. Enable
both USB jumpers and the USB feature in
the BIOS to wake-up your system via USB
devices. See the table on the right for jumper
settings and jumper connections.
Note: JPUSB1 is used for Backpanel
USB ports #0/1, JPUSB2 is for Front
Panel USB ports #4/5, and #6/7.
JPUSB3 is used for Front Accessible
USB Ports 2 and 3. When the USB func-
tion is set to Enabled in the BIOS, and a
USB Wake-up jumper is set to Disabled,
be sure to remove the USB devices
from the USB ports whose USB jumper
is Disabled before the system goes into
the standby mode. (The default setting
is Enabled.)
JPUSB1 (BackPanel USB
0/1 Wake-up Enable)
Pin# Denition
1-2Enabled (Default)
2-3Disabled
JPUSB2 (Front Panel USB
4/5, 6/7 Wake-up Enable)
Pin# Denition
1-2Enabled (Default)
2-3Disabled
JPUSB3 (Front Panel USB
2, 3 Wake-up Enable)
Pin# Denition
1-2Enabled (Default)
2-3Disabled
A
A. BP USB 0/1 Wake-up
B. FP USB 4/5, 6/7 Wake-up
C
B
2-31
C. FP USB 2, 3 Wake-up
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
SAS Enable/Disable (X8ST3-F Only)
JPS1 allows you to enable or disable
SAS Connectors. The default position is
on pins 1 and 2 to enable SAS. See the
table on the right for jumper settings.
SAS RAID Mode Select (X8ST3-F
Only)
JPS2 allows you to select the SAS RAID
m o d e . Yo u c a n u s e e i t h e r S o f t w a r e R A I D
or IT Mode. Close this jumper to use
Soft ware RAID (Default). Set this jumper
to open to use the IT Mode.
SAS Enable/Disable
Jumper Settings
Jumper Settings Denition
Pins 1-2Enabled (Default)
Pins 2-3Disabled
Software RAID
Jumper Settings
Settings Denition
CloseSoftware RAID Enabled (Default)
OpenIT Mode Enabled
A. RAID Enable
B. SAS RAID Mode Se-
lect
B
2-32
A
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
BMC IPMI Enable (X7ST3-F only)
JBMC1 allows the user to enable or dis-
able BMC (Baseboard Management Con-
trol) Chip and the onboard IPMI connec-
tions. This jumper is to be used together
with the IPMI settings in the BIOS. If this
jumper is set to Enabled, please enable
IPMI settings in the BIOS as well and vice
versa. The default position is on pins 1
and 2 to Enable BMC. See the table on
the right for jumper settings.
Chapter 2: Installation
BMC IPMI Enable/Disable
Jumper Settings
Settings Denition
Pins 1-2Enabled (Default)
Pins 2-3Disabled
A. BMC Enable
2-33
A
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
LAN 1/LAN 2
2-8 Onboard Indicators
LAN 1/LAN 2 LEDs
Two LAN ports (LAN 1/LAN 2) are located
on the IO Backplane of the motherboard.
Each Ethernet LAN port has two LEDs. The
yellow LED indicates activity, while the Link
LED may be green, amber or off to indicate
the spe ed of th e connections. See the
tables at right for more information.
IPMI Dedicated LAN LEDs (X8ST3-F
Only)
In addition to LAN 1/LAN 2, an IPMI Dedi-
cated LAN is also located on the IO Back-
plane of the X8ST3-F. The amber LED on
the right indicates activity, while the green
LED on the left indicates the speed of the
connection. See the tables at right for more
information.
LAN 1/LAN 2
Activity LED
Rear View (when facing the
rear side of the chassis)
LAN 1/LAN 2 Activity LED (Left)
LED State
Color Status Denition
YellowFlashingActive
LAN 1/LAN 2 Link LED (Right)
LED State
LED Color Denition
OffNo Connection or 10 Mbps
Green100 Mbps
Amber1 Gbps
IPMI LAN (X8ST3-F only)
Link LED
IPMI LAN Link LED (Left) &
Activity LED (Right)
Color Status Denition
Link (Left)Green: Solid100 Mbps
Activity (Right) Amber: Blinking Active
Activity LED
Link LED
C
A
B
A. LAN Port 1
B. LAN Port 2
C. IPMI LAN
2-34
C
B
A
SAS Activity LED (X8ST3-F Only)
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
A SAS Activity LED is located at LES1.
When LES1 blinks, SAS is active. Refer
to the table on the right for details. Also
see the layout below for the LED loca-
tion.
SAS Heartbeat LED (X8ST3-F Only)
A SAS Heartbeat LED is located at LES2.
When LES2 blinks, SAS connectors are
ready for use. Refer to the table on the
right for details. Also see the layout below
for the LED location.
Chapter 2: Installation
SAS Activity LED Indicator
LED Settings
Blinking: Green SAS is active
SAS Heartbeat LED Indicator (LE5)
LED Settings
Blinking: Yellow SAS is ready for use
A. SAS Heartbeat
B. SAS Activity
B
A
2-35
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
Onboard Power LED
An Onboard Power LED is located at LE1
on the motherboard. When LE1 is on, the
AC power cable is connected. Make sure to
disconnect the power cable before removing
or installing any component. See the layout
below for the LED location.
Onboard PWR LED Indicator
LED Settings
LED Color Denition
OffSystem Off
OnSystem on, or
System off and PWR
Cable Connected
A. Onboard PWR LED
A
2-36
Chapter 2: Installation
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1 PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
2-9 Serial ATA and Floppy Drive Connections
Note the following conditions when connecting the Serial ATA and oppy disk drive
cables:
• Be sure to use the correct cable for each connector. Refer to Page 1-1 for cables
that came with your shipment.
• A red mark on a wire indicates the location of pin 1.
SATA Connectors
Six Serial ATA (SATA) connectors (I-SATA
0~5) are located on the motherboard
to provide serial link connections. Se-
rial Link connections provide faster data
transmission than those of the traditional
Parallel ATA. These SATA connectors are
supported by the Intel ICH10R. See the
table on the right for pin denitions.
SATA Connectors
PinDenitions
Pin# Signal
1Ground
2SATA_TXP
3SATA_TXN
4Ground
5SATA_RXN
6SATA_RXP
7Ground
A. I-SATA 0~1
B. I-SATA 2~3
C. I-SATA 4~5
2-37
A
B
C
X8ST3-F/X8STE User's Manual
BMC JTAG
1
SAS1
SAS2
SAS7
SAS3
SAS4
SAS5
SAS6
JWOL
Battery
JD1
SPKR1
JAR
JI2C1
JI2C2
JPS2
JL1
1
JOH
1
JF1
LES1
LE1
COM1
FAN 4
FAN 3
FAN 5
FAN 2
FAN 1
JPW1
SMBUS_PS1
JPW2
JPG1
JPUSB3
JBMC1
JPS1
JPUSB2
JPL1
JPL2
JLED
JWD
JPUSB1
IPMI_LAN
COM2
Floppy
I-Button
T-SGPIO1
3-SGPIO2
3-SGPIO1
USB 6/7
USB 4/5
USB3
USB2
Slot6 PCI-E 2.0 X8 on X16
Slot3 PCI-E 2.0 X8
I-SATA4
I-SATA5
Slot4 PCI-E 2.0 X4 on X8
Slot2 PCI 33MHz
Slot5 PCI-E 2.0 X8
I-SATA2
I-SATA3
DIMM1B
DIMM1A
DIMM3B
DIMM2B
DIMM2A
DIMM3A
I-SATA0
I-SATA1
X8ST3-F/X8STE
USB 0/1
LAN2
LAN1
VGA
KB/MOUSE
BIOS
JBT1
Slot1PCI 33MHz
SAS0
T-SGPIO2
LAN CTRL
for IPMIl LAN
LAN
CTRL1
LAN
CTRL2
SI/O
BMC CTRL
BMC
Firmware
SAS CTRL
Intel ICH10R
South Bridge
Intel X58-Express
North Bridge
Intel Processor
LES2
LSI 1068E
WPCM 450
CPU FAN
Floppy Connector
The oppy connector is located near
the PCI Slot 1 on the motherboard.
See the table on the right for pin
denitions.
Note the following when
conn ect ing the flo ppy
cable:
• The oppy disk drive cable has
seven twisted wires.
• A red mark on a wire typically
designates the location of pin
1.
• A single oppy disk drive rib-
bon cable has 34 wires and
two connectors to provide for
two floppy disk drives. The
connector with twisted wires
always connects to drive A,
and the connector that does
not have twisted wires always
connects to drive B.
Floppy Drive Connector
PinDenitions
Pin# Denition Pin # Denition
1Ground2FDHDIN
3Ground4Reserved
5Key6FDEDIN
7Ground8Index
9Ground10Motor Enable
11Ground12Drive Select B
13Ground14Drive Select B
15Ground16Motor Enable
17Ground18DIR
19Ground20STEP
21Ground22Write Data
23Ground24Write Gate
25Ground26Track 00
27Ground28Write Protect
29Ground30Read Data
31Ground32Side 1 Select
33Ground34Diskette
2-38
A
A. Floppy
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Always disconnect the AC power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that the Standby PWR LED (LE1) is not lit. (Note: If LE1 is on, the
onboard power is on. Be sure to unplug the power cable before installing or
removing the components.)
2. Make sure that there are no short circuits between the motherboard and chas-
sis.
3. Disconnect all ribbon/wire cables from the motherboard, including those for the
keyboard and mouse. Also, be sure to remove all add-on cards.
4. Install a CPU and heatsink (be sure that it is fully seated) and then connect the
chassis speaker and the power LED to the motherboard. Check all jumper
settings as well.
No Power
1. Make sure that there are no short circuits between the motherboard and chas-
sis.
2. Make sure that all jumpers are set to their default positions.
3. Check if the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and of f to test the system.
5. The battery on your motherboard may be old. Check to make sure that it still
supplies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on, but you have no video--in this case, you will need to remove
all the add-on cards and cables rst.
3-1
X8ST3-F/X8STEUser's Manual
2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A
for details on beep codes.)
3. Remove all memory modules and turn on the system. (If the alarm is on, check
the specs of memory modules, reset the memory or try a different one.)
Memory Errors
1. Make sure that the DIMM modules are properly installed and fully seated in
the slots.
2. You should be using unbuffered ECC or non-ECC DDR3 (1.5V) 1333/1066/800
MHz memory (recommended by the manufacturer). Also, it is recommended
that you use the memory modules of the same type and speed for all DIMMs
in the system.
3. Check for bad DIMM modules or slots by swapping modules between slots to
see if you can locate the faulty modules.
4. Check the power supply voltage 115V/230V switch.
LosingtheSystem’sSetupConguration
1. Please be sure to use a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section
1-5 for details on recommended power supplies.
2. The batter y on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the Setup Conguration problem, contact your
vendor for repairs.
3-2 Technical Support Procedures
Before contacting Technical Support, please make sure that you have followed all
the steps listed below. Also, Note that as a motherboard manufacturer, Supermicro
does not sell directly to end users, so it is best to rst check with your distributor or
reseller for troubleshooting services. They should know of any possible problem(s)
with the specic system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and ' Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(http://www.supermicro.com/support/faqs/) before co ntacting Technical
Suppor t.
2. BIOS upgrades can be downloaded from our website at (http://www.supermicro.
3-2
Chapter 3: Troubleshooting
com/support/bios/).
Note: Not all BIOS can be ashed. Some cannot be ashed; it depends
on the modications to the boot block code.
3. If you've followed the instructions above to troubleshoot your system, and still
cannot resolve the problem, then contact Supermicro's technical suppor t and
provide them with the following information:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system rst boots up)
•System conguration
An example of a Technical Support form is on our website at (http://www.
supermicro.com/support/contact.cfm).
4. Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached
by e-mail at support@supermicro.com, by phone at: (408) 503- 8000, option
2, or by fax at (408)503-8019.
3-3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The X8ST3-F/X8STE supports up to 24 GB of unbuffered ECC or non-
ECC DDR3 (1.5V) 1333/1066/800 MHz, two-way interleaved or non-interleaved
SDRAM. See Section 2-4 for details on installing memory.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are not
experiencing any problems with your system. Updated BIOS les are located on
our web site at http://www.supermicro.com/support/bios/. Please check our BIOS
warning message and the information on how to update your BIOS on our web
site. Select your motherboard model and download the BIOS le to your computer.
Also, check the current BIOS revision and make sure that it is newer than your
BIOS before downloading. You can choose from the zip le and the .exe le. If
you choose the zip BIOS le, please unzip the BIOS le onto a bootable device or
a USB pen. Run the batch le using the format ash.bat lename.rom from your
bootable device or USB pen to ash the BIOS. Then, your system will automati-
cally reboot. If you choose the .exe le, please run the .exe le under Windows to
create the BIOS ash oppy disk. Insert the oppy disk into the system you wish
3-3
X8ST3-F/X8STEUser's Manual
to ash the BIOS. Then, bootup the system to the oppy disk. The BIOS utility will
automatically ash the BIOS without any prompts. Please note that this process
may take a few minutes to complete. Do not be concerned if the screen is paused
for a few minutes.
Warning: Do not shut down or reset the system while updating BIOS
to prevent possible system boot failure!
Also, the SPI BIOS chip installed on this motherboard is not removable. To
repair or replace a damaged BIOS chip, please send your motherboard to
RMA at Supermicro for service.
Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs that
will greatly enhance your system. We recommend that you review the CD and
install the applications you need. Applications on the CD include chipset drivers
for Windows, security and audio drivers.
3-4 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required
before any warranty service will be rendered. You can obtain ser vice by calling
your vendor for a Returned Merchandise Authorization (RMA) number. When
returning to the manufacturer, the RMA number should be prominently displayed
on the outside of the shipping carton, and mailed prepaid or hand-carried. Ship-
ping and handling charges will be applied for all orders that must be mailed when
service is complete.
This warranty only covers normal consumer use and does not cover damages
incurred in shipping or from failure due to the alteration, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor rst for any product prob-
lems.
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Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS Setup Utility for the X8ST3-F/X8STE. The AMI
ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter
describes the basic navigation of the AMI BIOS Setup Utility setup screens.
Starting BIOS Setup Utility
To enter the AMI BIOS Setup Utility screens, press the <Delete> key while the
system is booting up.
Note: In most cases, the <Delete> key is used to invoke the AMI BIOS
setup screen. There are a few cases when other keys are used, such as
<F1>, <F2>, etc.
Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be congured. Grayed-out options cannot be congured. Options in blue can be
congured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for a text message. When an option is selected in the
left frame, it is highlighted in white. Often a text message will accompany it. (Note:
the AMI BIOS has default text messages built in. Supermicro retains the option to
include, omit, or change any of these text messages.)
The AMI BIOS Setup Utility uses a key-based navigation system called "hot keys".
Most of the AMI BIOS setup utility "hot keys" can be used at any time during the
setup navigation process. These keys include <F1>, <F10>, <Enter>, <ESC>, ar-
row keys, etc.
Note: Options printed in Bold are default settings.
HowToChangetheCongurationData
The conguration data that determines the system parameters may be changed by
entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing
<Del> at the appropriate time during system boot.
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X8ST3-F/X8STEUser’s Manual
Starting the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS Setup Utility. From the main menu, you can access the other setup
screens. An AMI BIOS identication string is displayed at the left bottom corner of
the screen, below the copyright message.
Warning! Do not upgrade the BIOS UNLESS your system has a BIOS-
related issue. Flashing the wrong BIOS can cause irreparable damage to
the system. In no event shall Supermicro be liable for direct, indirect, special,
incidental, or consequential damages arising from a BIOS update. If you
have to update the BIOS, do not shut down or reset the system while the
BIOS is updating. This is to avoid possible boot failure.
4-2 Main Setup
When you rst enter the AMI BIOS Setup Utility, you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.
System Overview: The following BIOS information will be displayed:
System Time/System Date
Use this option to change the system time and date. Highlight System Time or Sys-
tem Date using the arrow keys. Enter new values through the keyboard. Press the
<Tab> key or the arrow keys to move between elds. The date must be entered in
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Chapter 4: AMI BIOS
Day MM/DD/YY format. The time is entered in HH:MM:SS format. (Note: The time
is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.)
AMIBIOS
Version
Build Date
Processor
The AMI BIOS will automatically display the status of processor as shown below:
Speed
Physical Count
Logical Count
System Memory
This displays the size of memory available in the system:
Populated Size
Available Size
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X8ST3-F/X8STEUser’s Manual
4-3 AdvancedSetupCongurations
Use the arrow keys to select Boot Setup and hit <Enter> to access the submenu
items:
BOOT Feature
Quick Boot
If Enabled, this option will skip certain tests during POST to reduce the time needed
for system boot. The options are Enabled and Disabled.
Quiet Boot
This option allows the bootup screen options to be modied between POST mes-
sages or the OEM logo. Select Disabled to display the POST messages. Select
Enabled to display the OEM logo instead of the normal POST messages. The op-
tions are Enabled and Disabled.
AddOn ROM Display Mode
This sets the display mode for Option ROM. The options are Force BIOS and
Keep Current.
Bootup Num-Lock
This feature selects the Power-on state for Numlock key. The options are Of f
and On.
PS/2 Mouse Support
This feature enables support for the PS/2 mouse. The options are Disabled,
Enabled and Auto.
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Chapter 4: AMI BIOS
Wait For 'F1' If Error
This forces the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.
Hit 'Del' Message Display
This feature displays "Press DEL to run Setup" during POST. The options are
Enabled and Disabled.
Watch Dog Function
If enabled, the Watch Dog Timer will allow the system to reboot when it is inactive
for more than 5 minutes. The options are Enabled and Disabled.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last state before a power loss. The options are Power-On, Power-Off
and Last State.
Interrupt 19 Capture
Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt
19 at boot and allow the drives that are attached to these host adaptors to function
as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adap-
tors will not capture Interrupt 19, and the drives attached to these adaptors will not
function as bootable devices. The options are Enabled and Disabled.
Processor & Clock Options
When you rst enter the Processor and Clock Options, the current processor
and clock conguration is displayed. Below it are the different options that
can be modied:
CPU Ratio
If set to Manual, it enables the CPU clock ratio to be manually congured. The
options are Auto and Manual.
Ratio CMOS Setting (This option appears if CPU Ratio above is set to Manual)
This option allows the user to set the ratio between the CPU Core Clock and the
FSB Frequency. (Note: if an invalid ratio is entered, the AMI BIOS will restore the
setting to the previous state.) The default setting depends on what type of CPU
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X8ST3-F/X8STEUser’s Manual
is installed. For example, the default setting for the Intel® Core i7™ 965 is [24].
Press "+" or "-" on your keyboard to change this value.
Clock Spread Spectrum
Select Enable to use the feature of Clock Spectrum, which will allow the BIOS to
monitor and attempt to reduce the level of Electromagnetic Interference caused by
the components whenever needed. The options are Disabled and Enabled.
Hardware Prefetcher (Available when supported by the CPU)
If set to Enabled, the hardware pre fetcher will pre fetch streams of data and instruc-
tions from the main memory to the L2 cache in the forward or backward manner to
improve CPU performance. The options are Disabled and Enabled.
Adjacent Cache Line Prefetch (Available when supported by the CPU)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled.
Intel® Virtualization Technology (Available when supported by the CPU)
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creat-
ing multiple "virtual" systems in one physical computer. The options are Enabled
and Disabled. Note: If there is any change to this setting, you will need to power
off and restart the system for the change to take effect. Please refer to Intel’s web
site for detailed information.
Execute-Disable Bit Capability (Available when supported by the OS and
the CPU)
Set to Enabled to enable the Execute Disable Bit which will allow the processor
to designate areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from ooding illegal codes
to overwhelm the processor or damage the system during an attack. The default is
Enabled. (Refer to Intel and Microsoft Web Sites for more information.)
Simultaneous Multi-Threading (Available when supported by the CPU)
Set to Enabled to use the Hyper-Threading Technology, which will result in increased
CPU performance. The options are Disabled and Enabled.
Active Processor Cores
Set to Enabled to use a processor's Second Core and beyond. (Please refer to
Intel's web site for more information.) The options are All, 1 and 2.
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Chapter 4: AMI BIOS
Intel® EIST Technology
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically
adjust processor voltage and core frequency in an effort to reduce power consump-
tion and heat dissipation. Please refer to Intel’s web site for detailed information.
The options are Disable: Disable GV3 and Enable: Enable GV3.
Intel® TurboMode Tech (Available if Intel® EIST technology is Enabled)
This feature allows processor cores to run faster than marked frequency in specic
conditions. The options are Disabled and Enabled.
IntelTurboBoostConguration
Turbo Ratio Limit Program
Select Enabled to set the processor's clock ratio in relation to the bus speed.
The options are Enabled and Disabled. The default value depends on the type
of CPU installed. (For example, the values shown below indicate that an Intel®
Core™ i7 processor 965 Extreme Edition is installed.)
1 - Core Ratio Limit
This increases (multiplies) the processor's core 1 clock speed in relation to
the bus speed. The default setting is 26. Press "+" or "-" on your keyboard to
change this value.
2 ~ 3 - Core Ratio Limit
This increases the processor's core 2~3 clock speeds in relation to the bus
speed. The default setting is 25. Press "+" or "-" on your keyboard to change
this value.
TDC Limit Override
This option will override the system's default electrical current setting for the
processor. The options are Enabled and Disabled.
TDC Limit Value
This option sets the processor's electrical current value. The default setting is
880. Press "+" or "-" on your keyboard to change this value.
TDP Limit Override
Select Enabled to override the default power setting for the processor. The op-
tions are Enabled and Disabled.
TDP Limit Value
Use this option to set the processor's power value. The default setting is 1040.
Press "+" or "-" on your keyboard to change this value.
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X8ST3-F/X8STEUser’s Manual
Intel® C-STATE Architecture
C-State, a processor power management architecture developed by Intel, can
further reduce power consumption from the basic C1 (Halt State) state, which
blocks clock cycles to the CPU. C-State is an idle state, and instructions are not
processed by the CPU. A brief explanation of all the C-States are as follows:
C0 - Active. The CPU is processing instructions.
C1 - Auto Halt. The core clock (CPU) is off. This is the most basic idle state.
Some CPUs support C1E (C1 Enhanced) for lower power consumption.
C2 - Stop Clock. Both the core clock (CPU) and bus clocks (I/O) are off.
C3 - Deep Sleep. The clock generator is off.
C4 - Deeper Deep Sleep. Reduced VCC (Voltage supply).
C6 - Cache Power Off. Power is turned off to all caches.
C7 - Processor Specic. Leaves the initialized application processor in a
processor-specic low C-State. For Intel Core i7 processors, this is the lowest
C-State supported.
C1E Support
Select Enabled to use the "Enhanced Halt State" feature. C1E signicantly reduces
the CPU's power consumption by reducing the CPU's clock cycle and voltage during
a "Halt State." The options are Disabled and Enabled.
C-STATE Tech
If enabled, C-State is set by the system automatically to either C2, C3 or C4 state.
The options are Disabled and Enabled.
C-State package limit setting
If set to Auto, the AMI BIOS will automatically set the limit on the C-State package
register. The options are Auto, C1, C3, C6 and C7.
C1 Auto Demotion
When enabled, the CPU will conditionally demote C3, C6 or C7 requests to C1 based
on un-core auto-demote information. The options are Disabled and Enabled.
C3 Auto Demotion
When enabled, the CPU will conditionally demote C6 or C7 requests to C3 based
on un-core auto-demote information. The options are Disabled and Enabled.
DCA Technology
This feature accelerates the performance of TOE devices. Note: A TOE device is
a specialized, dedicated processor that is installed on an add-on card or a network
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Chapter 4: AMI BIOS
card to handle some or all packet processing of this add-on card. For this motherboard, the TOE device is built inside the ESB 2 South Bridge chip. This feature
is supported only by some types of processors (i.e., Intel Nehalem-WS 1S). The
options are Enabled and Disabled.
DCA Prefetch Delay
A DCA Prefetch is used with TOE components to prefetch data in order to shorten
execution cycles and maximize data processing efciency. Prefetching too fre-
quently can saturate the cache directory and delay necessary cache accesses. This
feature reduces or increases the frequency the system prefetches data. The options