The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software, if any,
and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.
IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all
claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.
Manual Revision 1.0a
Release Date: September 16, 2009
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Two (2) RJ-45 Rear IO Panel Connectors with Link and
Activity LEDs
Single Realtek RTL8201N PHY to support IPMI 2.0
(X8SIL-F Only)
SATA PortsSix (6)
RAID (Windows)RAID 0, 1, 5, 10
RAID (Linux)RAID 0, 1, 10
SATA Connections (X8SIL)
SATA PortsFour (4)
Integrated IPMI 2.0 (X8SIL-F)
IPMI 2.0 supported by the WPCM450 Server BMC
Floppy Disk Drive
One (1) oppy drive interface (up to 1.44 MB)
USB Devices (X8SIL)
Two (2) USB ports on the rear IO panel
Two (2) USB header connectors for front access
One (1) Type A internal connector
1-6
Page 15
Chapter 1: Introduction
I/O Devices
(Continued)
USB Devices (X8SIL-F)
Two (2) USB ports on the rear IO panel
Four (4) USB header connectors for front access
One (1) Type A internal connector
Keyboard/Mouse
PS/2 Keyboard/Mouse ports on the I/O backplane
Serial (COM) Ports
Two (2) Fast UART 16550 Connections: one 9-pin RS-232
port and one header
Super I/O
Winbond Super I/O 83627DHG-P
BIOS32 Mb SPI AMI BIOS
®
SM Flash BIOS
DMI 2.3, PCI 2.3, ACPI 1.0/2.0/3.0, USB Keyboard and
SMBIOS 2.5
PowerCongurationACPI/ACPM Power Management
Main switch override mechanism
Keyboard Wake-up from Soft-Off
Internal/External moder ring-on
Power-on mode for AC power recovery
PC Health MonitoringCPU Monitoring
Onboard voltage monitors for CPU core, +3.3V, +5V,
+/-12V, +3.3V Stdby, +5V Stdby, VBAT, HT, Memory,
Chipset
CPU 3-Phase switching voltage regulator
CPU/System overheat LED and control
CPU Thermal Trip support
Thermal Monitor 2 (TM2) support
Fan Control
Fan status monitoring with rmware 4-pin (Pulse Width
Modulation) fan speed control
Low noise fan speed control
System ManagementPECI (Platform Environment Conguration Interface) 2.0
support
System resource alert via Supero Doctor III
SuperoDoctor III, Watch Dog, NMI
Chassis Intrusion Header and Detection
1-7
Page 16
X8SIL/X8SIL-F User’s Manual
CD UtilitiesBIOS ash upgrade utility
Drivers and software for Intel® 3400/3420 chipset utilities
OtherROHS 6/6 (Full Compliance, Lead Free)
DimensionsMicro ATX form factor, 9.6" x 9.6"
Note: For IPMI Conguration Instructions, please refer to the Embedded
IPMI Conguration User's Guide available @ http://www.supermicro.com/
support/manuals/.
1-8
Page 17
Chapter 1: Introduction
5
4
3
2
Clarkdale
IBexPeak
BLOCK DIAGRAM
DDR3 (CHA)
(Lynnfield)
PCIe2.0_x8
JPL1
2-3
LE1: STBY Warning LED
PCI-32
JPUSB1
VRM 11.1
VID[0-7]
RoHS 6/6
LPC I/O
W83627DHG
1-2
2-3
PCIe x8 SLOT
RJ45
RJ45
DDR3 (CHB)
DIMM1(Far)
DIMM2
DIMM1(Far)
DIMM2
4 UDIMM
MISC VRs
1333/1066MHz
1333/1066MHz
5.0Gb
x4 DMI
2.5Gb
PCH
2.5Gbps
PCIe_x4
PCIe x8 SLOT
PCI 32
1 PCI 32 SLOT
4/6 SATA PORTS
SATA-II
300MB/s
5/7 USB PORTS
USB2.0
480Mbps
FLASH
SPI 16Mb
SPI
PCIe_x1
2.5Gbps
GLAN1
82574L
CK505
Rev1.0
CLOCK
COM1,2
P/S2
LPC
HEALTH
INFO
P5-8
P10
P11-14
P12
P4
P15
P20
LPC
TPM1.2
P15
P28-29
P9
P23
P21
P21
JPT1
1-3
2-4
LPC
PCIe_x1
2.5Gbps
2-3
JPL2
1-2
Based on customer spec
PCIe2.0_x8
PCIe x8 SLOT
5.0Gb
Intel 3400/3420
GLAN2
82574L
RMII
VGA
PORT
RTL8201N
PHY
RJ45
HERMON WPCM450
WINBOND
PCI32
P26-27
P18
P19
P18
P19
P16
P17
P30-32
P33P34
P33
Hermon
JPB
2-3
1-2
Xeon 3400 Series
4 RDIMM
(4 Quad rank
RDIMM run on
800MHz)
Note:ES1 Lynnfield (A0 stepping Q1XX) can not be used on the board;ES2 Lynnfield (A1 stepping Q2XX) need to uninstall R52, R53;QS Lynnfield (B1 stepping Q3XX) or later can be used.All Clarkdale samples or later can be used.
(option)
X8SIL / X8SIL-F System Block Diagram
Note: This is a general block diagram and may not exactly represent
the features on your motherboard. See the Motherboard Features
pages for the actual specications of each motherboard.
1-9
Page 18
X8SIL/X8SIL-F User’s Manual
1-2 Chipset Overview
The X8SIL/X8SIL-F supports the Intel® Xeon® 3400 processor series. Built upon
the functionality and the capability of the single-chip Intel 3400 chipset, the X8SIL/
X8SIL-F motherboard provides the performance and feature set required for
single-processor-based systems with conguration options optimized for entry-
level server platforms.
The high-speed Direct Media Interface (DMI) featured in the Intel 3400/3420 (Ibex
Peak) chipset enables the X8SIL/X8SIL-F motherboard to offer a high-speed Direct
Media Interface (DMI) for chip-to-chip true isochronous communication with the
processor. This feature allows the X8SIL/X8SIL-F to achieve up to 10 Gb/s of
software-transparent data transfer on each direction, achieving better performance
than comparable systems. The X8SIL/X8SIL-F also features a TCO timer (to en-
able the system to recover from a software/hardware lock), ECC Error Reporting,
Function Disable and Intruder Detect.
Intel 3400/3420 Chipset Features
Direct Media Interface (up 10 Gb/s transfer, Full Duplex)•
Intel® Matrix Storage Technology and Intel Rapid Storage Technology•
Dual NAND Interface•
Intel I/O Virtualization (VT-d) Support•
Intel Trusted Execution Technology Support•
PCI Express 2.0 Interface (up to 5.0 GT/s)•
SATA Controller (up to 3G/s)•
Advanced Host Controller Interface (AHCI)•
1-10
Page 19
Chapter 1: Introduction
1-3 PC Health Monitoring
This section describes the PC health monitoring features of the X8SIL/X8SIL-F.
These features are supported by an onboard System Hardware Monitor chip.
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond when
AC power is lost and then restored to the system. You can choose for the system
to remain powered off (in which case you must hit the power switch to turn it back
on) or for it to automatically return to a power on state. See the Power Lost Control
setting in the BIOS chapter of this manual to change this setting. The default set-
ting is Last State.
Onboard Voltage Monitoring
The onboard voltage monitor will scan the following voltages continuously: CPU
Once a voltage becomes unstable, it will give a warning or send an error message
to the screen. Users can adjust the voltage thresholds to dene the sensitivity of
the voltage monitor by using SD III.
Fan Status Monitor with Software
PC health monitoring can check the RPM status of the cooling fans via Supero
Doctor III.
CPU Overheat LED and Control
This feature is available when the user enables the CPU overheat warning feature
in the BIOS. This allows the user to dene an overheat temperature. When this tem-
perature reaches this pre-dened overheat threshold, the CPU thermal trip feature
will be activated and it will send a signal to the buzzer and, at the same time, the
CPU speed will be decreased.
1-4 PowerCongurationSettings
This section describes the features of your motherboard that deal with power and
power settings.
1-11
Page 20
X8SIL/X8SIL-F User’s Manual
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start blink-
ing to indicate that the CPU is in the suspend mode. When the user presses any
key, the CPU will wake-up and the LED indicator will automatically stop blinking
and remain on.
BIOS Support for USB Keyboard
If the USB keyboard is the only keyboard in the system, it will function like a normal
keyboard during system boot-up.
Main Switch Override Mechanism
When an ATX power supply is used, the power button can function as a system
suspend button. When the user presses the power button, the system will enter
a SoftOff state. The monitor will be suspended and the hard drive will spin down.
Pressing the power button again to wake-up the whole system. During the SoftOff
state, the ATX power supply provides power the system to keep the required cir-
cuitry "alive". In case the system malfunctions and you want to turn off the power,
just press and hold the power button for 4 seconds. The power will turn off and no
power will be provided to the motherboard.
1-5 Power Supply
As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates of 1 GHz and faster.
The X8SIL / X8SIL-F accommodates ATX12V standard power supplies.
Although most power supplies generally meet the specications required by the
CPU, some are inadequate. A 2-Amp of current supply on a 5V Standby rail is
strongly recommended.
It is strongly recommended that you use a high quality power supply that meets
ATX12V standard power supply Specication 1.1 or above. It is also required that
the 12V 8-pin power connection (JPW2) be used for adequate power supply. In
areas where noisy power transmission is present, you may choose to install a line
lter to shield the computer from noise. It is recommended that you also install a
power surge protector to help avoid problems caused by power surges.
1-12
Page 21
Chapter 1: Introduction
1-6 Super I/O
The disk drive adapter functions of the Super I/O chip include a oppy disk drive
controller that is compatible with industry standard 82077/765, a data separator,
write pre-compensation circuitry, decode logic, data rate selection, a clock genera-
tor, drive interface control logic and interrupt and DMA logic. The wide range of
functions integrated onto the Super I/O greatly reduces the number of components
required for interfacing with oppy disk drives. The Super I/O supports two 360 K,
720 K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s,
500 Kb/s or 1 Mb/s.
It also provides two high-speed, 16550-compatible serial communication ports
(UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable baud
rate generator, complete modem control capability and a processor interrupt sys-
tem. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as well
as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support
higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Conguration
and Power Interface), which includes support of legacy and ACPI power manage-
ment through a SMI or SCI function pin. It also features auto power management
to reduce power consumption.
1-13
Page 22
X8SIL/X8SIL-F User’s Manual
1-7 Overview of the Winbond WPCM450-G (X8SIL) /
WPCM450-R (X8SIL-F) Controller
The Winbond WPCM450-G, a Baseboard Management Controller (BMC), supports
the 2D/VGA-compatible Graphics Core with the PCI interface, Virtual Media, and
Keyboard/Video/Mouse (KVM) Redirection modules. The WPCM450-R has all the
features of the WPCM450-G and includes IPMI 2.0 support.
The WPCM450 BMC interfaces with the host system via a PCI interface to com-
municate with the graphics core. It supports USB 2.0 and 1.1 for remote keyboard/
mouse/virtual media emulation. It also provides LPC interface to control Super I/O
functions. The WPCM450 is connected to the network via an external Ethernet
PHY module.
The WPCM450 communicates with onboard components via six SMBus interfaces,
fan control, Platform Environment Control Interface (PECI) buses, and General
Purpose I/O (T-SGPIO) ports.
The WPCM450 also includes the following features:
One X-Bus parallel interface for expansion I/O connections•
Three ADC inputs, Analog and Digital Video outputs•
Two serial for boundary scan and debug•
Note: For more information on IPMI conguration, please refer to the
Embedded IPMI User's Guide posted on our website @ http://www.super-
micro.com/support/manuals/.
1-14
Page 23
Chapter 2: Installation
Chapter 2
Installation
2-1 Static-Sensitive Devices
Electrostatic-Discharge (ESD) can damage electronic com ponents. To prevent dam-
age to your system board, it is important to handle it very carefully. The following
measures are generally sufcient to protect your equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic
bag.
• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not in
use.
• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.
• Use only the correct type of onboard CMOS battery. Do not install the onboard
upside down battery to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static protected.
2-1
Page 24
X8SIL/X8SIL-F User's Manual
!
2-2 Processor and Heatsink Installation
Warning: When handling the processor package, avoid placing direct
pressure on the label area of the fan.
Notes:
Always connect the power cord last and always remove it before add-
ing, removing or changing any hardware components. Make sure that
you install the processor into the CPU socket before you install the CPU
heatsink.
If you buy a CPU separately, make sure that you use an Intel-certied
multi-directional heatsink only.
Make sure to install the serverboard into the chassis before you install
the CPU heatsinks.
When receiving a serverboard without a processor pre-installed, make sure
that the plastic CPU socket cap is in place and none of the socket pins
are bent; otherwise, contact your retailer immediately.
Refer to the Supermicro web site for updates on CPU support.
Installing the LGA1156 Processor
Press the load lever to release the load plate, which covers the CPU socket,
from its locking position.
1
Load Lever
2-2
Page 25
2
3
Chapter 2: Installation
Gently lift the load lever to open the load plate. Remove the plastic cap.
Use your thumb and your index nger to hold the CPU at the top center edge
and the bottom center edge of the CPU.
Align the CPU key that is the semi-circle cutouts against the socket keys.
Once aligned, carefully lower the CPU straight down to the socket. (Do not
4
drop the CPU on the socket. Do not move the CPU horizontally or vertically.
2-3
Page 26
X8SIL/X8SIL-F User's Manual
Do not rub the CPU against the surface or against any pins of the socket to avoid
damage to the CPU or the socket.)
With the CPU inside the socket, inspect the four corners of the CPU to make sure
that the CPU is properly installed.
Use your thumb to gently push the load lever down to the lever lock.
5
CPU properly
installed
Load lever locked
into place
Warning: The CPU will only seat inside the socket in one direction. Make
sure it is properly inserted before closing the load plate. If it doesn't close
properly, do not force it as it may damage your CPU. Instead, open the
load plate again and double-check that the CPU is aligned properly.
2-4
Page 27
Chapter 2: Installation
Installing a Passive CPU Heatsink
Do not apply any thermal grease to the heatsink or the CPU die -- the required
amount has already been applied.
1
Place the heatsink on top of the CPU so that the four mounting holes are
aligned with those on the Motherboard's and the Heatsink Bracket under-
2
neath.
Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug
(do not over-tighten the screws to avoid possible damage to the CPU.)
3
Finish the installation by fully tightening all four screws.
4
Recommended Supermicro heatsink:
SNK-P0046P heatsink with BKT-0028L
bottom bracket
Motherboard
Mounting
Holes
Heatsink Bracket
Screw#1
Screw#2
2-5
Page 28
X8SIL/X8SIL-F User's Manual
!
Removing the Heatsink
Warning: We do not recommend that the CPU or the heatsink be removed.
However, if you do need to uninstall the heatsink, please follow the instruc-
tions below to uninstall the heatsink to prevent damage done to the CPU
or the CPU socket.
Unscrew the heatsink screws from the motherboard in the sequence as shown
in the illustration below.
1
Gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive
force when wriggling the heatsink!!)
2
Once the CPU is loosened, remove the heatsink from the CPU socket.
3
Clean the surface of the CPU and the heatsink, removing the used thermal
grease. Reapply the proper amount of thermal grease on the surface before
4
re-installing the CPU and the heatsink.
Loosen screws in se-
quence as shown.
Screw#4
Screw#1
Screw#2
Motherboard
Screw#3
Remove the Heatsink
Bracket from under-
neath the mother-
board.
2-6
Page 29
Installing an Active Fan CPU Heatsink
Locate the CPU Fan power
connector on the motherboard.
1
(Refer to the layout on the right
for the CPU Fan location.)
Position the heatsink so that the
heatsink fan wires are closest
2
to the CPU fan power connector
and are not interfered with other
components.
Inspect the CPU Fan wires to
make sure that the wires are
3
routed through the bottom of the
heatsink.
Remove the thin layer of the pro-
tective lm from the copper core
4
of the heatsink.
Chapter 2: Installation
Thermal Grease
Heatsink Fins
(Warning: CPU may overheat if
the protective lm is not removed
from the heatsink.)
Apply the proper amount of
thermal grease on the CPU.
5
(Note: if your heatsink came with
a thermal pad, please ignore this
step.)
If necessary, rearrange the wires
to make sure that the wires are
6
not pinched between the heatsink
and the CPU. Also make sure to
keep clearance between the fan
wires and the ns of the heatsink.
Recommended Supermicro heatsink:
SNK-P0046A4 active heatsink
2-7
Page 30
X8SIL/X8SIL-F User's Manual
Align the four heatsink fasteners with
the mounting holes on the moth-
7
erboard. Gently push the pairs of
diagonal fasteners (#1 & #2, and #3 &
#4) into the mounting holes until you
hear a click. (Note: Make sure to orient
each fastener so that the narrow end
of the groove is pointing outward.)
Repeat Step 7 to insert all four heat-
sink fasteners into the mounting holes.
8
Once all four fasteners are se-
curely inserted into the mounting
9
holes and the heatsink is proper-
ly installed on the motherboard,
connect the heatsink fan wires to
the CPU Fan connector.
2-8
Page 31
Removing the Heatsink
Warning: We do not recommend that the CPU or the heatsink be re-
moved. However, if you do need to remove the heatsink, please follow
the instructions below to uninstall the heatsink and prevent damage to
the CPU or other components.
Active Heatsink Removal
Unplug the power cord from the power
supply.
1
Disconnect the heatsink fan wires from
the CPU fan header.
2
Chapter 2: Installation
Use your nger tips to gently press on
the fastener cap and turn it counter-
3
clockwise to make a 1/4 (900) turn,
and then pull the fastener upward to
loosen it.
Repeat Step 3 to loosen all fasteners
from the mounting holes.
4
With all fasteners loosened, remove
the heatsink from the CPU.
5
Remove
Pull Up
2-9
Page 32
X8SIL/X8SIL-F User's Manual
2-3 Installing DDR3 Memory
Note: Check the Supermicro web site for recommended memory modules.
CAUTION
Exercise extreme care when installing or removing
DIMM modules to prevent any possible damage.
DIMM Installation
Insert the desired number of DIMMs into the memory slots, starting with 1.
DIMM1A. Insert each DIMM module vertically into its slot. Pay attention to
the notch along the bottom of the module to prevent incorrect DIMM module
installation.
Gently press down on the DIMM module until it snaps into place in the slot. 2.
Repeat step 1 to install DIMM1B if needed.
Memory Support
The X8SIL/X8SIL-F supports up to 16GB of DDR3 ECC UDIMM or up to 32GB
of ECC DDR3 RDIMM (1333/1066/800 MHz in 4 DIMM slots.) Populating these
DIMM modules with a pair of memory modules of the same type and same size
will result in interleave d me mory, which will improve memor y perfor mance. Please
refer to the table below:
PlatformDIMM TypeIntel® Xeon® Series Processors
X8SIL/X8SIL-FNon-ECC UDIMM OnlyNot Supported
ECC UDIMM OnlySupported (see Table 1)
RDIMM Only (with ECC)Supported (see Table 2)
Mixed ECC with non-ECC Not Supported
Mixed UDIMM/RDIMMNot Supported
Table 1 - DDR3 ECC/Unbuffered (UDIMM) Memory Support
ECC UDIMM1Gb (x8 DRAM)2Gb (x8 DRAM)
Single RankUp to 4GB
(4 x 1GB DIMM Modules)
Dual RankUp to 8GB
(4 x 2GB DIMM Modules)
Quad RankNot SupportedNot Supported
Up to 8GB
(4 x 2GB DIMM Modules)
Up to 16GB
(4 x 4GB DIMM Modules)
2-10
Page 33
Chapter 2: Installation
JPI2C
JPW1
JPI2C:PWR I2C
FLOPPY
DIMM2B
DIMM2A
DIMM1A
Table 2 - DDR3 ECC Registered (RDIMM) Memory Support
RDIMM1Gb (x8 DRAM)2Gb (x8 DRAM)
Single RankUp to 4GB
(4 x 1GB DIMM Modules)
Dual RankUp to 8GB
(4 x 2GB DIMM Modules)
Quad RankUp to 16GB
(4 x 4GB DIMM Modules)
Up to 8GB
(4 x 2GB DIMM Modules)
Up to 16GB
(4 x 4GB DIMM Modules)
Up to 32GB
(4 x 8GB DIMM Modules)
Note: All other memory sizes, types, die, density, that are not listed in these tables
are NOT supported.
Memory Population Guidelines
Please follow the tables below when populating the X8SIL/X8SIL-F.
DDR3 ECC UDIMM Memory
DIMM Slots
per Channel
21Unbuffered
22Unbuffered
DIMMs
Populated
per Channel
DIMM Type POR SpeedsRanks per DIMM
(any combination)
1066, 1333Single Rank, Dual
DDR3 ECC
Rank
1066, 1333Single Rank, Dual
DDR3 ECC
Rank
DDR3 ECC RDIMM Memory
DIMM Slots
per Channel
DIMMs
Populated
DIMM Type POR SpeedsRanks per DIMM
(any combination)
per Channel
21Registered
DDR3 ECC
21Registered
1066, 1333Single Rank, Dual
Rank
1066Quad Rank
DDR3 ECC
22Registered
DDR3 ECC
22Registered
1066, 1333Single Rank, Dual
Rank
800*Quad Rank
DDR3 ECC
*Note: 1066 RDIMMs running at 800MHz-BIOS will be automatically downgraded to
800MHz speed.
Slot 2, Channel B
Slot 1, Channel B
2-11
Slot 2, Channel A
Slot 1, Channel A
Page 34
X8SIL/X8SIL-F User's Manual
Installing and Removing DIMMs
Position the DIMM
1
module's bottom key
receptive point on the slot.
notches align with the slot's Lock/
Release tabs as it is pressed in.
so it aligns with the
Push the Lock/Release
tabs to their Release po-
2
sitions. Make sure that
the DIMM module's side
Insert the DIMM module vertically and press
3
down until the module
snaps into place.
Release
Notches
Release
Lock/Release Tabs
When the module is
properlly inserted, the
4
Lock/Release tabs will
the DIMM module, locking it
into place.
ends of the module. This should
release it from the slot. Pull the
DIMM module upwards.
automatically secure
To Remove:
Use your thumbs to
5
gently push the Lock/
Release tabs near both
Lock
Press Down
Release
Lock
Release
2-12
Page 35
Chapter 2: Installation
Note: Due to memory allocation to system devices, the amount of memory that
remains available for operational use will be reduced when 4 GB of RAM is
used. The reduction in memory availability is disproportional.
For Microsoft Windows users: Microsoft implemented a design change in Win-
dows XP with Service Pack 2 (SP2) and Windows Vista. This change is specic
to the Physical Address Extension (PAE) mode behavior which improves driver
compatibility. For more information, please read the following article at Microsoft’s
Knowledge Base website at: http://support.microsoft.com/kb/888137.
Possible System Memory Allocation & Availability
System DeviceSizePhysical Memory
Firmware Hub ash memory (System
BIOS)
Local APIC4 KB3.99
Area Reserved for the chipset2 MB3.99
I/O APIC (4 Kbytes)4 KB3.99
PCI Enumeration Area 1256 MB3.76
PCI Express (256 MB)256 MB3.51
PCI Enumeration Area 2 (if needed)
-Aligned on 256-MB boundary-
VGA Memory16 MB2.85
TSEG1 MB2.84
Memory available to OS and other applications
1 MB3.99
512 MB3.01
Remaining (-Available)
(4 GB Total System Memory)
2.84
2-13
Page 36
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
2-4 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis.
Make sure that the locations of all the mounting holes for both motherboard and
chassis match. Although a chassis may have both plastic and metal mounting fas-
teners, metal ones are highly recommended because they ground the motherboard
to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Then use a screwdriver to secure the motherboard onto the motherboard tray.
Tools Needed
Philips Screwdriver
Pan head screws (8 pieces)
Stand Offs (8 pieces)
(Only if needed)
Location of Mounting Holes
There are eight (8) mounting holes on this motherboard indicated by the arrows.
Caution: 1) To avoid damaging the motherboard and its components, please
do not use a force greater than 8 lb/inch on each mounting screw during
motherboard installation. 2) Some components are very close to the mount-
2-14
ing holes. Please take precautionary measures to prevent damage to these
components when installing the motherboard to the chassis.
Page 37
Chapter 2: Installation
Installation Instructions
Install the I/O shield into the chassis.
Note: Image is for illustration
1
purposes only. Your particular
chassis may be different.
I/O Shield
Locate the mounting holes on the motherboard. Refer to the layout on the
previous page for mounting hole locations.
2
Locate the matching mounting holes on the chassis. Install standoffs in the
chassis as needed. Align the mounting holes on the motherboard against the
3
mounting holes on the chassis.
Stand Off
Install the motherboard into the chassis carefully to avoid damage to mother-
board components.
4
Insert a Pan head #6 screw into a mounting hole on the motherboard and its
matching mounting hole on the chassis, using the Philips screwdriver.
5
Repeat Step 4 to insert #6 screws into all mounting holes.
6
Make sure that the motherboard is securely placed in the chassis.
7
2-15
Page 38
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
2-5 Connectors/IO Ports
The I/O ports are color coded in conformance with the PC 99 specication. See the
gure below for the colors and locations of the various I/O ports.
Back Panel Connectors and IO Ports
2
1
5
4
6
78
9
3
Back Panel Connectors
1. Keyboard (Purple)7. VGA
2. PS/2 Mouse (Green)8. LAN1
3. USB Port 09. LAN2
4. USB Port 1
5. IPMI LAN (X8SIL-F)
6. COM 1
2-16
Page 39
Chapter 2: Installation
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
1
2
ATX PS/2 Keyboard and PS/2
Mouse Ports
The ATX PS/2 keyboard and PS/2
mouse are located next to the Back
Panel USB Ports 0/1 on the mother-
board. See the table at right for pin
denitions.
Mouse
Keyboard
PS/2 Keyboard/Mouse Pin
Denitions
PS2 KeyboardPS2 Mouse
Pin# Denition Pin# Denition
1KB Data1Mouse Data
2No Connection2No Connection
3Ground3Ground
4Mouse/KB VCC
(+5V)
4Mouse/KB VCC
(+5V)
5KB Clock5Mouse Clock
6No Connection6No Connection
VCC: with 1.5A PTC (current limit)
1. Keyboard (Purple)
2. Mouse (Green)
2-17
Page 40
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
4
3
5
1
2
Universal Serial Bus (USB)
Two Universal Serial Bus ports (USB
0/1) are located on the I/O back panel.
Additional four USB connections, USB
2/3 (X8SIL-F) and USB 10/11 are used
to provide front chassis access. USB 4
is a Type A Connector. (USB Cables
are not included). See the tables on
the right for pin denitions.
1. Backplane USB 0
2. Backplane USB 1
3. Front Panel USB 10/11
4. Front Panel USB 2/3 (X8SIL-F Only)
5. Internal 'Type A' USB 4
Back Panel USB 0/1
PinDenitions
Pin# Denition Pin# Denition
1+5V5+5V
2USB_PN16USB_PN0
3USB_PP17USB_PP0
4Ground8Ground
Front Panel USB 2/3, 10/11
PinDenitions
USB 2, 3
Pin # Denition
USB 10/11
Pin # Denition
1+5V6+5V
2USB_PN2 7USB_PN3
3USB_PP2 8USB_PP3
4Ground9Ground
5No Con-
nection
10Key
2-18
Page 41
Chapter 2: Installation
3
1
2
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Ethernet Ports
Two Ethernet ports (LAN1/LAN2) are
located next to the VGA port on the IO
Backplane. In addition, an IPMI Dedi-
cated LAN is also located above USB
0/1 ports on the X8SIL-F to provide a
dedicated network connection for IPMI
2.0 support. These ports accept RJ45
type cables.
Notes:
1. The IPMI Dedicated LAN
is for the X8SIL-F only.
2. Please refer to the LED
Ind icator Sect ion for LA N
LED information.
LAN Ports
PinDenition
Pin# Denition
1P2V5SB10SGND
2TD0+11Act LED
3TD0-12P3V3SB
4TD1+13Link 100 LED
5TD1-14Link 1000 LED
(Yellow, +3V3SB)
(Yellow, +3V3SB)
6TD2+15Ground
7TD2-16Ground
8TD3+17Ground
9TD3-88Ground
(NC: No Connection)
1. LAN1
2. LAN2
5 . IP MI De d ic at ed L A N
(X8SIL-F only)
2-19
Page 42
X8SIL/X8SIL-F User's Manual
2
1
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Serial Ports
A COM Port is located on the I/O
Backplane and a Serial port is lo-
cated next to Front Panel USB 2/3 to
provide front access. See the table on
the right for pin denitions.
SerialPortPinDenitions
(COM1/COM2)
Pin # DenitionPin # Denition
1CDC6DSR
2RXD7RTS
3TXD8CTS
4DTR9RI
5Ground10NC
1. COM1
2. COM2
2-20
Page 43
Video Connector
1
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
A Video (VGA) connector is located
next to the COM Port on the I/O
backplane. This connector is used
to provide video and CRT display.
Refer to the board layout below for
the location.
Chapter 2: Installation
1. VGA
2-21
Page 44
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
Ground
Ground
X
X
NIC2 LED
LED_Anode+
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally lo-
cated on a control panel at the front of the chassis. These connectors are designed
specically for use with Supermicro server chassis. See the gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin denitions.
JF1 Header Pins
Pin 15Pin 16
Pin 2
2-22
Pin 1
Page 45
FrontControlPanelPinDenitions
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
Ground
Ground
X
X
NIC2 LED
LED_Anode+
Chapter 2: Installation
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin denitions.
HDD LED
The HDD LED onnections are located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activ-
ity. See the table on the right for pin
denitions.
A
Power LED
PinDenitions(JF1)
Pin# Denition
15+5V
16Ground
HDD LED
PinDenitions(JF1)
Pin# Denition
13+5V
14HD Active
A. PWR LED
B. HDD LED
B
2-23
Page 46
X8SIL/X8SIL-F User's Manual
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
Ground
Ground
X
X
NIC2 LED
LED_Anode+
NIC1/NIC2 (LAN1/LAN2)
The NIC (Network Interface Control-
ler) LED connection for LAN port 1 is
located on pins 11 and 12 of JF1, and
the LED connection for LAN Port 2 is
on Pins 9 and 10. NIC1 LED and NIC2
LED are 2-pin NIC LED headers. At-
tach NIC LED cables to NIC1 LED and
NIC2 LED to display network activities
for LAN 1 and LAN2. Refer to the table
on the right for pin denitions.
Overheat (OH)/Fan Fail
Connect an LED cable to OH/Fan
Fail connections on pins 7 and 8 of
JF1 to provide warnings for chassis
overheat/fan failure. Refer to the table
on the right for pin denitions.
LAN1/LAN2 LED
PinDenitions(JF1)
Pin# Denition
9/11Vcc
10/12 Ground
OH/Fan Fail LED
PinDenitions(JF1)
Pin# Denition
7Vcc/Blue UID LED
8OH/Fan Fail LED
OH/Fan Fail Indicator
Status
State Denition
OffNormal
OnOverheat
Flash-
Fan Fail
ing
A. NIC1 LED
B. NIC2 LED
C. OH/Fan Fail
A
B
C
2-24
Page 47
Reset Button
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
Ground
Ground
X
X
NIC2 LED
LED_Anode+
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case to reset the system. Refer to the
table on the right for pin denitions.
Chapter 2: Installation
Reset Button
PinDenitions(JF1)
Pin# Denition
3Reset
4Ground
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - see Chapter
4). To turn off the power in the suspend
mode, press the button for at least 4
seconds. Refer to the table on the right
for pin denitions.
Power Button
PinDenitions(JF1)
Pin# Denition
1Signal
2+3V Standby
A. Reset Button
B. PWR Button
2-25
A
B
Page 48
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
2-6 Connecting Cables
This section provides brief descriptions and pin-out denitions for onboard headers
and connectors. Be sure to use the correct cable for each header or connector.
• For information on Backpanel USB and Front Panel USB ports, refer to Page
2-18. For COM Port 1 and COM Port 2, please see Page 2-16.
ATX Main PWR & CPU PWR
Connectors
The 24-pin main power connector
(JPW1) is used to provide power to
the motherboard. The 8-pin CPU PWR
connector (JPW2) is also required for
the processor. These power connectors
me et t he S SI E PS 12 V sp eci cat ion . S ee
the table on the right for pin denitions.
ATX Power 24-pin Connector
PinDenitions(JPW1)
Pin# Denition Pin # Denition
13+3.3V1+3.3V
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
12V 8-pin Power Connec-
torPinDenitions
A
24-Pin ATX
Main PWR
B
8-Pin
Processor
PWR
Pins Denition
A
1 through 4Ground
5 through 8+12V
(Required)
B
2-26
A. 24-Pin ATX Main PWR
B. 8-Pin Processor PWR
Page 49
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Fan Headers
F
The X8SIL/X8SIL-F has ve fan headers (Fan1
~ Fan5). These fans are 4-pin fan headers.
However, Pins 1-3 of the fan headers are
backward compatible with the traditional 3-pin
fans. A fan speed control setting in the BIOS
Hardware Monitoring section allows the BIOS
to automatically set fan speeds based on the
system temperature. The default setting is
Disabled which allows the onboard fans to run
at full speed. Refer to the table on the right for
pin denitions.
Note: Please use all 3-pin fans or all
4-pin fans on a motherboard. Please
do not use 3-pin fans and 4-pin fans
on the same board.
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on
the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intru-
sion when the chassis is opened.
Chapter 2: Installation
Fan Header
PinDenitions
Pin# Denition
1Ground (Black)
22.5A/+16V
(Red)
3Tachometer
4PWM_Control
Chassis Intrusion
PinDenitions(JL1)
Pin# Denition
1Intrusion Input
2Ground
A. Fan1
B. Fan2
C. Fan3
D. Fan4
E. Fan5
F. Chassis Intrusion
A
E
2-27
B
C
D
Page 50
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Internal Buzzer
The Internal Buzzer (SPKR1) can be
used to provide audible indications for
various beep codes. See the table on
the right for pin denitions. Refer to
the layout below for the locations of
the Internal Buzzer.
Speaker
On the JD1 header, Pins 3~4 are used
for internal speaker. Close Pins 3~4
with a cap to use the onboard speaker.
If you wish to use an external speaker,
close Pins 1~4 with a cable. See the
table on the right for pin denitions.
Internal Buzzer
PinDenition
Pin# Denitions
Pin 1Pos. (+)Beep In
Pin 2Neg. (-)Alarm
Speaker Connector
PinDenitions
Speaker
Pin Setting Denition
Pins 3~4Internal Speaker
Pins1~4External Speaker
A. Internal Buzzer
B. Speaker Header
A
2-28
B
Page 51
Chapter 2: Installation
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Onboard Power LED
An onboard Power LED header is
located at JLED. This Power LED
header is connected to Front Control
Panel located at JF1 to indicate the
status of system power. See the table
on the right for pin denitions.
Power Supply I2C Connector
Power Supply (I2C) Connector, locat-
ed at SMB_PS1 on the motherboard.
This connector monitors the status
of the power supply, fan and system
temperature. See the table on the right
for pin denitions.
B
Onboard PWR LED
PinDenitions
Pin# Denition
1VCC
2No Connection
3Connection to PWR
LED in JF1
PWR Supply I2C
PinDenitions
Pin# Denition
1Clock
2Data
3PWR Fail
4 Ground
53.3V
A. PWR LED
B. PWR SMB
2-29
A
Page 52
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
T-SGPIO 0/1 Headers
Two T-SGPIO (Serial-Link General Pur-
pose Input/Output) headers are located
near the SATA connectors on the moth-
erboard. These headers are used to
communicate with the enclosure manage-
ment chip in the system. See the table on
the right for pin denitions. Refer to the
board layout below for the locations of
the headers.
Alarm Reset
If three power supplies are installed and
Alarm Reset (JAR) is connected, the sys-
tem will notify you when any of the three
power modules fail. Connect JAR to a
micro-switch to turn off the alarm that is
activated when a power module fails. See
the table on the right for pin denitions.
Serial_Link-SGPIO
PinDenitions
Pin# Denition Pin Denition
1NC2NC
3Ground4DATA Out
5Load6Ground
7Clock8NC
NC: No Connections
Alarm Reset
PinDenitions
Pin Setting Denition
Pin 1Ground
Pin 2+5V
A. T-SGPIO 0
B. T-SGPIO 1
C. Alarm Reset
C
2-30
B
A
Page 53
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
2-7 Jumper Settings
Explanation of Jumpers
To modify the operation of the motherboard,
jumpers can be used to choose between
optional settings. Jumpers create shorts be-
tween two pins to change the function of the
connector. Pin 1 is identied with a square
solder pad on the printed circuit board.
Note: On two pin jumpers, "C lo se d"
means the jumper is on and "Open"
means the jumper is off the pins.
Chapter 2: Installation
LAN Port Enable/Disable
JPL1/JPL2 enable or disable LAN Port 1/LAN
Port 2 on the motherboard. See the table
on the right for jumper settings. The default
setting is enabled.
GLAN Enable
Jumper Settings
Pin# Denition
1-2Enabled (default)
2-3Disabled
A. LAN Port 1 Enable
B. LAN Port 2 Enable
A
B
2-31
Page 54
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads
to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such
as a small screwdriver to touch both pads at the same time to short the connection.
Always remove the AC power cord from the system before clearing CMOS.
Note: For an ATX power supply, you must completely shut down the system, remove
the AC power cord and then short JBT1 to clear CMOS.
PCI Slot SMB Enable
Use Jumpers I2C1/I2C2 to enable PCI
Slot SMB (System Management Bus)
support to improve system management
for the PCI slots. See the table on the
PCI Slot_SMB Enable
Jumper Settings
Jumper Setting Denition
ShortEnabled
Open (Default)Disabled
right for jumper settings.
A. Clear CMOS
2
B. JI
C1
2
C. JI
C2
B
C
2-32
A
Page 55
Chapter 2: Installation
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
VGA Enable
JPG1 allows you to enable or disable
the onboard VGA connector. The default
position is on pins 1 and 2 to enable
VGA. See the table on the right for
jumper settings.
VGA Enable/Disable
Jumper Settings (JPG1)
Both Jumpers Denition
Pins 1-2Enabled
Pins 2-3Disabled
A. VGA Enable
A
2-33
Page 56
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
USB Wake-Up
Use the JPUSB1 jumper to "wake-up" your
system by pressing a key on a USB keyboard
or clicking the USB mouse. The JPUSB1
jumper is used together with the USB Wake-
Up feature in the BIOS. Enable this jumper
and the USB feature in the BIOS to wake-up
your system via USB devices.
Note: When the USB function is set to
Enabled in the BIOS, and a USB Wake-
up jumper is set to Disabled, remove the
USB devices from the USB ports whose
USB jumper is Disabled before the sys-
tem goes into the standby mode.
BMC Jumper
JPB is used to enable or disable the BMC
(Baseboard Management Control) Chip and
the onboard IPMI connection. This jumper is
used together with the IPMI settings in the
BIOS. The default position is on pins 1 and
2 to Enable BMC. See the table on the right
for jumper settings.
A
JPUSB1 (BackPanel USB
0/1 Wake-up Enable)
Pin# Denition
1-2Enabled (Default)
2-3Disabled
BMC IPMI Enable/Disable Jumper
Settings
Settings Denition
Pins 1-2Enabled (Default)
Pins 2-3Disabled
A. BP USB 0/1 Wake-up
B. BMC Jumper
B
2-34
Page 57
Chapter 2: Installation
LAN 1/LAN 2
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
2-8 Onboard Indicators
LAN 1/LAN 2 LEDs
Two LAN ports (LAN 1/LAN 2) are located
on the IO Backplane of the motherboard.
Each Ethernet LAN port has two LEDs. The
yellow LED indicates activity, while the Link
LED may be green, amber or off to indicate
the speed of the connections. See the
tables at right for more information.
IPMI Dedicated LAN LEDs
In addition to LAN 1/LAN 2, an IPMI Dedi-
cated LAN is also located on the X8SIL/
X8SIL-F. The yellow LED on the right
indicates activity, while the green LED on
the left indicates the speed of the con-
nection. See the tables at right for more
information.
A. LAN Port 1
B. LAN Port 2
C. IPMI LAN
LAN1 LAN2
LAN 1/LAN 2
Activity LEDs (Yellow)
Color Status Denition
YellowBlinkingActive
LAN 1/LAN 2
Link LEDs (Green/Amber/Off)
LED Color Denition
OffNo Connection or 10 Mbps
Green100 Mbps
Amber1 Gbps
Link LED
IPMI LAN Link LED (Left) &
Activity LED (Right)
Color Status Denition
Link (Left)Green: Solid100 Mbps
Activity
(Right)
Link LED
Yellow: Blinking
IPMI LAN
Activity LED
Activity LED
Active
C
2-35
A
B
Page 58
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Onboard Power LED
An Onboard Power LED is located at LE4
on the motherboard. When LE4 is on, the
AC power cable is connected. Make sure to
disconnect the power cable before removing
or installing any component. See the layout
below for the LED location.
IPMI Heartbeat LED
An IPMI Heartbeat LED is located at
LE7. When LE7 blinks, the IPMI functions
properly. Refer to the table on the right
for details. Also see the layout below for
the LED location.
Onboard PWR LED Indicator
LED Settings
LED Color Denition
OffSystem Off
OnSystem on, or
IPMI Heartbeat LED Indicator (LE7)
System off and PWR
Cable Connected
LED Settings
Green: Blinking IPMI is ready for use
A. Onboard PWR LED
B. IPMI Heartbeat LED
B
2-36
A
Page 59
Chapter 2: Installation
F
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
2-9 SATA and Floppy Drive Connections
Note the following conditions when connecting the Serial ATA and oppy disk drive
cables:
• Be sure to use the correct cable for each connector. Refer to Page 1-1 for cables
that came with your shipment.
• A red mark on a wire indicates the location of pin 1.
SATA Connections
Six Serial ATA (SATA) connectors (I-SATA
0~5) are located on the X8SIL-F motherboard
(4 SATA ports for the X8SIL). These Serial
Link connections provide faster data transmis-
sion than legacy Parallel ATA. See the table
on the right for pin denitions.
SATA/SAS Connectors
PinDenitions
Pin# Signal
1Ground
2SATA_TXP
3SATA_TXN
4Ground
5SATA_RXN
6SATA_RXP
7Ground
A. I-SATA 0
B. I-SATA 1
C. I-SATA 2
D. I-SATA 3
E. I-SATA 4
E
B
D
2-37
A
F. I-SATA 5
C
Page 60
X8SIL/X8SIL-F User's Manual
MAC CODE
JPI2C
JF1
JPW1
U26
J8
J6
J5
J14
1
J13
U61
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR1
JBT1
1
JI2C1
1
JI2C2
1
JL1
LE4
LE2
LE3
LE7
JPT1
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2 JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VGA
COM1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TPM
JL1
LAN1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
JAR:
PSU ALARM RST
CPU
JLED1:Power LED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
REV:1.00
X8SIL
DESIGNED IN USA
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
JF1
ON
LED LED
PWRHDD
NIC1
NIC2
OH/FFXRST
PWR
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JAR
Floppy Connector
The oppy connector is located next
to the DIMM memory banks on the
motherboard. See the table on the
right for pin denitions.
Note the following when con-
necting the oppy cable:
• The oppy disk drive cable has
seven twisted wires.
• A red mark on a wire typic ally
designates the location of pin 1.
• A single oppy disk drive ribbon
cable has 34 wires and two con-
nectors to provide for two oppy
disk drives. The connector with
tw is ted wire s always connects
to drive A, an d t he co nn ector
that does not have twisted wires
always connects to drive B.
A
Floppy Drive Connector
PinDenitions
Pin# Denition Pin # Denition
1Ground2FDHDIN
3Ground4Reserved
5Key6FDEDIN
7Ground8Index
9Ground10Motor Enable
11Ground12Drive Select B
13Ground14Drive Select B
15Ground16Motor Enable
17Ground18DIR
19Ground20STEP
21Ground22Write Data
23Ground24Write Gate
25Ground26Track 00
27Ground28Write Protect
29Ground30Read Data
31Ground32Side 1 Select
33Ground34Diskette
A. Floppy
2-38
Page 61
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Always disconnect the AC power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that the Standby PWR LED (LE1) is not lit. (Note: If LE1 is on, the
onboard power is on. Be sure to unplug the power cable before installing or
removing the components.)
2. Make sure that there are no short circuits between the motherboard and chas-
sis.
3. Disconnect all ribbon/wire cables from the motherboard, including those for the
keyboard and mouse. Also, be sure to remove all add-on cards.
4. Install a CPU and heatsink (be sure that it is fully seated) and then connect the
chassis speaker and the power LED to the motherboard. Check all jumper
settings as well.
No Power
1. Make sure that there are no short circuits between the motherboard and chas-
sis.
2. Make sure that all jumpers are set to their default positions.
3. Check if the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to make sure that it still
supplies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on, but you have no video--in this case, you will need to remove
all the add-on cards and cables rst.
3-1
Page 62
X8SIL/X8SIL-FUser's Manual
2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A
for details on beep codes.)
3. Remove all memory modules and turn on the system. (If the alarm is on, check
the specs of memory modules, reset the memory or try a dif ferent one.)
Memory Errors
1. Make sure that the DIMM modules are properly installed and fully seated in
the slots.
2. You should be using unbuf fered ECC or registered ECC DDR3 (1.5 V)
1333/1066/800 MHz memor y (recommended by the manufacturer). Also, it
is recommended that you use the memory modules of the same type and
speed for all DIMMs in the system. Do not mix different sizes, speed, UDIMM
and RDIMM, ECC and non-ECC.
3. Check for bad DIMM modules or slots by swapping modules between slots to
see if you can locate the faulty modules.
4. Check the power supply voltage 115V/230V switch.
LosingtheSystem’sSetupConguration
1. Please be sure to use a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section
1-5 for details on recommended power supplies.
2. The batter y on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the Setup Conguration problem, contact your
vendor for repairs.
3-2 Technical Support Procedures
Before contacting Technical Support, please make sure that you have followed all
the steps listed below. Also, Note that as a motherboard manufacturer, Supermicro
does not sell directly to end users, so it is best to rst check with your distributor or
reseller for troubleshooting services. They should know of any possible problem(s)
with the specic system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(http://www.supermicro.com/support/faqs/) befo re contacting Technica l
Suppor t.
3-2
Page 63
Chapter 3: Troubleshooting
2. BIOS upgrades can be downloaded from our website at (http://www.supermicro.
com/support/bios/).
Note: Not all BIOS can be ashed. Some cannot be ashed; it depends
on the modications to the boot block code.
3. If you've followed the instructions above to troubleshoot your system, and still
cannot resolve the problem, then contact Supermicro's technical support and
provide them with the following information:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system rst boots up)
•System conguration
An example of a Technical Support form is on our website at (http://www.
supermicro.com/support/contact.cfm).
4. Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached
by e-mail at support@supermicro.com, by phone at: (408) 503-8000, option
2, or by fax at (408)503-8019.
3-3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The X8SIL/X8SIL-F supports up to 32GB of Registered ECC DDR3
or up to 16GB of unbuffered ECC DDR3 SDRAM (1.5V, 1333/1066/800 MHz).
See Section 2-3 for details on installing memory.
Question: Does the X8SIL/-F, X8SIE/- F/LN4 or X8SI6- F motherboard support
non-ECC UDIMM with the Xeon 34xx CPU?
Answer: No, they don't. With Xeon 34xx CPUs, memory type has to be either
ECC UDIMM or ECC RDIMM. Please refer to our “tested memory list” in our
motherboard website. For memory usage guidelines, please check Chapter 2
of this manual.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are not
experiencing any problems with your system. Updated BIOS les are located
on our web site at http://www.supermicro.com/support/bios/. Please check our
BIOS warning message and the information on how to update your BIOS on our
3-3
Page 64
X8SIL/X8SIL-FUser's Manual
web site. Select your motherboard model and download the BIOS (.rom) le to
your computer. Also, check the current BIOS revision and make sure that it is
newer than your BIOS before downloading. You may choose the zip le or the
.exe le. If you choose the zipped BIOS le, please unzip the BIOS le onto a
bootable device or a USB pen/thumb drive. To ash the BIOS, run the batch
le named "ami.bat" with the new BIOS .rom le from your bootable device or
USB pen/thumb drive. Use the following format:
F:\> ami xxxxxxxx.rom <Enter>
Notes: Be sure to insert a space after "ami" and always use the le named
“ami.bat” to update the BIOS.
When completed, your system will automatically reboot. If you choose the .exe
le, please run the .exe le under Windows to create the BIOS ash oppy disk.
Insert the oppy disk into the system you wish to ash the BIOS. Then, boot
the system to the oppy disk. The BIOS utility will automatically ash the BIOS
without any prompts. Please note that this process may take a few minutes to
complete. Do not be concerned if the screen is paused for a few minutes.
Warning: Do not shut down or reset the system while updating the BIOS to
prevent possible system boot failure!
When the BIOS ashing screen is completed, the system will reboot and will
show “Press F1 or F2”. At this point, you will need to load the BIOS defaults.
Press <F1> to go to the BIOS setup screen, and press <F9> to load the default
settings. Next, press <F10> to save and exit. The system will then reboot.
Note: The SPI BIOS chip installed on this motherboard is not removable. To
repair or replace a damaged BIOS chip, please send your motherboard to RMA
at Supermicro for service.
Question: I think my BIOS is corrupted. How can I recover my BIOS?
Answer: Please see Appendix C, BIOS Recovery for detailed instructions.
Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs
that will greatly enhance your system. We recommend that you review the CD
and install the applications you need. Applications on the CD include chipset
drivers for Windows, security and audio drivers.
Question: Why do I get an error message “IASTOR.SYS read error” when install-
ing Windows and "press F6 to install Intel R AID driver" on my X8SIL-F or X8SIE-F
motherboard?
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Answer: To solve this issue, disable the IPMI jumper. Another solution is to
use a USB op py dr ive instead of the onboa rd oppy d rive. For th e I PM I j um per
location, please check Chapter 1.
Question: Why c an't I for mat a oppy disk i n Windows or w hy does i t take to o long
to format a oppy disk on the X8SIL-F or X8SIE-F/X8SI6 -F motherboard?
Answer: This is maybe because C State Technology is enabled in the BIOS.
Please go to the BIOS (Advanced -> Processor & Clock options -> Intel ® C-
STATE tech), and select “disable”.
Question: What is the heat sink part number for my X8SIL/X8SIL-F, X8SIE/
X8SIE-F/X8SIE-LN4 or X8SI6-F motherboard?
Answer: For the 1U passive heat sink, ask for SNK-P0046P (back plate is
included), for the 2U active heat sink, SNK-P0046A4.
Question: Does the PCI-E slots on the X8SIL/X8SIL-F, X8SIE/X8SIE-F/X8SIE-
LN4 or X8SI6-F motherboard support graphic cards?
Answer: Yes they do, but not Slot 6 and Slot 7 on the X8SIL motherboard.
This is due to Intel chipset limitations.
Question: Why can't I recover the BIOS even when I’ve followed the instructions
in the user’s manual for X8SIL-F or X8SIE-F?
Answer: Please disable the IPMI jumper and tr y it again. For jumper the loca-
tion, please check Chapter 1.
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3-4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
Power off your system and unplug
1
your power cable.
Locate the onboard battery as shown
on the right.
2
Using a tool such as a pen or a small
3
4
screwdriver, push the battery lock
outwards to unlock it.
Once unlocked, the battery will pop
out from the holder.
Remove the battery.
5
Battery Disposal: Please handle used batteries carefully. Do not damage
the battery in any way; a damaged battery may release hazardous materials
into the environment. Do not discard a used battery in the garbage or a public
landll. Please comply with the regulations set up by your local hazardous
waste management agency to dispose of your used battery properly.
Battery Lock
Battery
Battery Holder
Battery Installation
To install an onboard battery, follow the steps 1~2 above and continue below:
This side should always
Indentify the battery's polarity. The
1
positive (+) side should be facing up.
Insert the battery into the battery
holder and push it down until you hear
2
a click to ensure that the battery is
securely locked.
Warning: When replacing a battery,
be sure to only replace it with the
same type.
3-6
face up.
1
Click!
2
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Chapter 3: Troubleshooting
3-5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required
before any warranty ser vice will be rendered. You can obtain service by calling
your vendor for a Returned Merchandise Authorization (RMA) number. (For faster
service, you may also obtain RMA authorizations online (http://www.supermicro.
com/support/rma/). When returning to the manufacturer, the RMA number should
be prominently displayed on the outside of the shipping carton, and mailed prepaid
or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.
This warranty only covers normal consumer use and does not cover damages
incurred in shipping or from failure due to the alteration, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor rst for any product prob-
lems.
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Notes
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Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS Setup Utility for the X8SIL/X8SIL-F. The AMI
ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter
describes the basic navigation of the AMI BIOS Setup Utility setup screens.
Note: For instructions on BIOS recovery, please refer to the instruction
guide posted at http://www.supermicro.com/support/manuals/.
Starting BIOS Setup Utility
To enter the AMI BIOS Setup Utility screens, press the <Delete> key while the
system is booting up.
Note: In most cases, the <Delete> key is used to invoke the AMI BIOS
setup screen. There are a few cases when other keys are used, such as
<F1>, <F2>, etc.
Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be congured. Grayed-out options cannot be congured. Options in blue can be
congured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for a text message. When an option is selected in the
left frame, it is highlighted in white. Often a text message will accompany it. (Note:
the AMI BIOS has default text messages built in. Supermicro retains the option to
include, omit, or change any of these text messages.)
The AMI BIOS Setup Utility uses a key-based navigation system called "hot keys".
Most of the AMI BIOS setup utility "hot keys" can be used at any time during the
setup navigation process. These keys include <F1>, <F10>, <Enter>, <ESC>, ar-
row keys, etc.
Note: Options printed in Bold are default settings.
HowToChangetheCongurationData
The conguration data that determines the system parameters may be changed by
entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing
<Del> at the appropriate time during system boot.
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How to Start the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS Setup Utility. From the main menu, you can access the other setup
screens. An AMI BIOS identication string is displayed at the left bottom corner of
the screen, below the copyright message.
Warning! Do not upgrade the BIOS unless your system has a BIOS-related
issue. Flashing the wrong BIOS can cause irreparable damage to the
system. In no event shall Supermicro be liable for direct, indirect, special,
incidental, or consequential damages arising from a BIOS update. If you
have to update the BIOS, do not shut down or reset the system while the
BIOS is updating. This is to avoid possible boot failure.
4-2 Main Setup
When you rst enter the AMI BIOS Setup Utility, you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.
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System Overview: The following BIOS information will be displayed:
System Time/System Date
Use this option to change the system time and date. Highlight System Time or Sys-
tem Date using the arrow keys. Enter new values through the keyboard. Press the
<Tab> key or the arrow keys to move between elds. The date must be entered in
Day MM/DD/YY format. The time is entered in HH:MM:SS format. (Note: The time
is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.)
Supermicro X8SIL/X8SIL-F
Version
Build Date
Processor
The AMI BIOS will automatically display the status of processor as shown below:
Type of Processor
Speed
Physical Count
Logical Count
System Memory
This displays the size of memory available in the system:
Populated Size
Available Size
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4-3 AdvancedSetupCongurations
Use the arrow keys to select Boot Setup and hit <Enter> to access the submenu
items:
BOOT Feature
Quick Boot
If Enabled, this option will skip certain tests during POST to reduce the time needed
for system boot. The options are Enabled and Disabled.
Quiet Boot
This option allows the bootup screen options to be modied between POST mes-
sages or the OEM logo. Select Disabled to display the POST messages. Select
Enabled to display the OEM logo instead of the normal POST messages. The op-
tions are Enabled and Disabled.
AddOn ROM Display Mode
This sets the display mode for Option ROM. The options are Force BIOS and
Keep Current.
Bootup Num-Lock
This feature selects the Power-on state for Numlock key. The options are Off
and On.
PS/2 Mouse Support
This feature enables support for the PS/2 mouse. The options are Disabled,
Enabled and Auto.
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Wait For 'F1' If Error
This forces the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.
Hit 'Del' Message Display
This feature displays "Press DEL to run Setup" during POST. The options are
Enabled and Disabled.
Watch Dog Function
If enabled, the Watch Dog Timer will allow the system to reboot when it is inactive
for more than 5 minutes. The options are Enabled and Disabled.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last state before a power loss. The options are Power-On, Power-Off
and Last State.
Interrupt 19 Capture
Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt
19 at boot and allow the drives that are attached to these host adaptors to function
as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adap-
tors will not capture Interrupt 19, and the drives attached to these adaptors will not
function as bootable devices. The options are Enabled and Disabled.
Processor & Clock Options
Warning: Take Caution when changing the Advanced settings. An incorrect
value, a very high DRAM frequency or incorrect DRAM timing may cause
system to become unstable. When this occurs, revert to the default setting.
CPU Ratio
This feature allows the user to use the CPU clock multiplier to multiply CPU
speed in order to enhance performance. Select Manual to Manually set the
multiplier setting. Select Auto for the BIOS to automatically select the CPU
multiplier setting for your system. The options are Auto and Manual.
Clock Spread Spectrum
Select Enable to use the feature of Clock Spectrum, which will allow the BIOS to
monitor and attempt to reduce the level of Electromagnetic Interference caused by
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X8SIL/X8SIL-F
the components whenever needed. Select Disabled to enhance system stability.
The options are Disabled and Enabled.
Hardware Prefetcher (Available when supported by the CPU)
If set to Enabled, the hardware pre fetcher will pre fetch streams of data and instruc-
tions from the main memory to the L2 cache in the forward or backward manner to
improve CPU performance. The options are Disabled and Enabled.
Adjacent Cache Line Prefetch (Available when supported by the CPU)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled.
Intel® Virtualization Technology (Available when supported by the CPU)
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creat-
ing multiple "virtual" systems in one physical computer. The options are Enabled
and Disabled. Note: If there is any change to this setting, you will need to power
off and restar t the system for the change to take effect. Please refer to Intel’s web
site for detailed information.
Execute-Disable Bit Capability (Available when supported by the OS and
the CPU)
Set to Enabled to enable the Execute Disable Bit which will allow the processor
to designate areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from ooding illegal codes
to overwhelm the processor or damage the system during an attack. The default is
Enabled. (Refer to Intel and Microsoft Web Sites for more information.)
Simultaneous Multi-Threading (Available when supported by the CPU)
Set to Enabled to use the Hyper-Threading Technology, which will result in increased
CPU performance. The options are Disabled and Enabled.
Active Processor Cores
Set to Enabled to use a processor's Second Core and beyond. (Please refer to
Intel's web site for more information.) The options are All, 1 and 2.
Intel® EIST Technology
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically
adjust processor voltage and core frequency in an effort to reduce power consump-
tion and heat dissipation. Please refer to Intel’s web site for detailed information.
The options are Disable and Enable.
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Chapter 4: AMI BIOS
Intel® Turbo Boost Technology (Available if Intel® EIST technology is
Enabled)
This feature allows processor cores to run faster than marked frequency in specic
conditions. The options are Disabled and Enabled.
C1E Support
Select Enabled to use the "Enhanced Halt State" feature. C1E signicantly reduces
the CPU's power consumption by reducing the CPU's clock cycle and voltage during
a "Halt State." The options are Disabled and Enabled.
Intel® C-STATE Tech
If enabled, C-State is set by the system automatically to either C2, C3 or C4 state. The op-
tions are Disabled and Enabled.
C-State package limit setting
If set to Auto, the AMI BIOS will automatically set the limit on the C-State package register.
The options are Auto, C1, C3, C6 and C7.
C1 Auto Demotion
When enabled, the CPU will conditionally demote C3, C6 or C7 requests to C1 based on
un-core auto-demote information. The options are Disabled and Enabled.
C3 Auto Demotion
When enabled, the CPU will conditionally demote C6 or C7 requests to C3 based on un-core
auto-demote information. The options are Disabled and Enabled.
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Advanced Chipset Control
The items included in the Advanced Settings submenu are listed below.
Memory Remap Feature
This feature when enabled, allows the remapping of everlapped PCI memory above
the total physical memory. The settings are Enabled and Disabled.
Intel VT-d
Select Enabled to enable Intel's Virtualization Technology support for Direct I/O VT-d
by reporting the I/O device assignments to VMM through the DMAR ACPI Tables.
This feature offers fully-protected I/O resource-sharing across the Intel platforms,
providing the user with greater reliability, security and availability in networking and
data-sharing. The settings are Enabled and Disabled.
Active State Power Management
Select Enabled to start Active-State Power Management for signal transactions
between L0 and L1 Links on the PCI Express Bus. This maximizes power-saving
and transaction speed. The options are Enabled and Disabled.
Route Port 80h Cycles to
This feature allows the user to decide which bus to send debug information to. The
options are Disabled, PCI and LPC.
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Chapter 4: AMI BIOS
USB Functions
This feature allows the user to decide the number of onboard USB ports to be
enabled. The Options are: Disabled and Enabled.
Legacy USB Support (available if USB Functions above is Enabled)
Select Enabled to use Legacy USB devices. If this item is set to Auto, Legacy
USB support will be automatically enabled if a legacy USB device is installed
on the motherboard, and vise versa. The settings are Disabled, Enabled and
Auto.
SATA/FloppyConguration
When this submenu is selected, the AMI BIOS automatically detects the presence
of the IDE Devices and displays the following items:
Floppy A
This feature allows the user to select the type of oppy drive connected to the sys-
tem. The options are Disabled, 360KB 5 1/4", 1.2MB 5 1/4", 720KB 3 1/2", 1.44MB
3 1/2" and 2.88MB 3 1/2".
SATA#1 Conguration
If Compatible is selected, it sets SATA#1 to legacy compatibility mode, while se-
lecting Enhanced sets SATA#1 to native SATA mode. The options are Disabled,
Compatible, Enhanced.
CongureSATAas
This feature allows the user to select the drive type for SATA#1. The options are
IDE, RAID, AHCI and Disabled.
ICH RAID CodeBase (Available if RAID is selected above)
Select Intel to enable the Intel SATA Host RAID Utility. Select Adaptec to use the
Adaptec Host RAID Utility. The options are Intel and Adaptec.
SATA#2 Conguration(Available if IDE is enabled under "Congure SATA#1
as" above)
Selecting Enhanced will set SATA#2 to native SATA mode. The options are
Compatible and Enhanced
IDE Detect Timeout (sec)
Use this feature to set the time-out value for the BIOS to detect the ATA, ATAPI
devices installed in the system. The options are 0 (sec), 5, 10, 15, 20, 25, 30, and
35.
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Primary IDE Master/Slave, Secondary IDE Master/Slave, Third IDE Master,
and Fourth IDE Master
These settings allow the user to set the parameters of Primary IDE Master/Slave,
Secondary IDE Master/Slave, Third and Fourth IDE Master slots. Hit <Enter> to
activate the following submenu screen for detailed options of these items. Set the
correct congurations accordingly. The items included in the submenu are:
Type
Select the type of device connected to the system. The options are Not Installed,
Auto, CD/DVD and ARMD.
LBA/Large Mode
LBA (Logical Block Addressing) is a method of addressing data on a disk drive.
In the LBA mode, the maximum drive capacity is 137 GB. For drive capacities
over 137 GB, your system must be equipped with a 48-bit LBA mode addressing.
If not, contact your manufacturer or install an ATA/133 IDE controller card that
supports 48-bit LBA mode. The options are Disabled and Auto.
Block (Multi-Sector Transfer)
Block Mode boosts the IDE drive performance by increasing the amount of data
transferred. Only 512 bytes of data can be transferred per interrupt if Block Mode
is not used. Block Mode allows transfers of up to 64 KB per interrupt. Select
Disabled to allow data to be transferred from and to the device one sector at
a time. Select Auto to allow data transfer from and to the device occur multiple
sectors at a time if the device supports it. The options are Auto and Disabled.
PIO Mode
The IDE PIO (Programmable I/O) Mode programs timing cycles between the
IDE drive and the programmable IDE controller. As the PIO mode increases, the
cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4.
Select Auto to allow the AMI BIOS to automatically detect the PIO mode. Use
this value if the IDE disk drive support cannot be determined.
Select 0 to allow the AMI BIOS to use PIO mode 0. It has a data transfer rate
of 3.3 MBs.
Select 1 to allow the AMI BIOS to use PIO mode 1. It has a data transfer rate
of 5.2 MBs.
Select 2 to allow the AMI BIOS to use PIO mode 2. It has a data transfer rate
of 8.3 MBs.
Select 3 to allow the AMI BIOS to use PIO mode 3. It has a data transfer rate
of 11.1 MBs.
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Chapter 4: AMI BIOS
Select 4 to allow the AMI BIOS to use PIO mode 4. It has a data transfer band-
width of 32-Bits. Select Enabled to enable 32-Bit data transfer.
DMA Mode
Select Auto to allow the BIOS to automatically detect IDE DMA mode when the
IDE disk drive support cannot be determined.
Select SWDMA0 to allow the BIOS to use Single Word DMA mode 0. It has a
data transfer rate of 2.1 MBs.
Select SWDMA1 to allow the BIOS to use Single Word DMA mode 1. It has a
data transfer rate of 4.2 MBs.
Select SWDMA2 to allow the BIOS to use Single Word DMA mode 2. It has a
data transfer rate of 8.3 MBs.
Select MWDMA0 to allow the BIOS to use Multi Word DMA mode 0. It has a
data transfer rate of 4.2 MBs.
Select MWDMA1 to allow the BIOS to use Multi Word DMA mode 1. It has a
data transfer rate of 13.3 MBs.
Select MWDMA2 to allow the BIOS to use Multi-Word DMA mode 2. It has a
data transfer rate of 16.6 MBs.
Select UDMA0 to allow the BIOS to use Ultra DMA mode 0. It has a data transfer
rate of 16.6 MBs. It has the same transfer rate as PIO mode 4 and Multi Word
DMA mode 2.
Select UDMA1 to allow the BIOS to use Ultra DMA mode 1. It has a data transfer
rate of 25 MBs.
Select UDMA2 to allow the BIOS to use Ultra DMA mode 2. It has a data transfer
rate of 33.3 MBs.
Select UDMA3 to allow the BIOS to use Ultra DMA mode 3. It has a data transfer
rate of 66.6 MBs.
Select UDMA4 to allow the BIOS to use Ultra DMA mode 4 . It has a data
transfer rate of 100 MBs.
The options are Auto, SWDMAn, MWDMAn, and UDMAn.
S.M.A.R.T. For Hard disk drives
Self-Monitoring Analysis and Reporting Technology (SMART) can help predict
impending drive failures. Select Auto to allow the AMI BIOS to automatically de-
tect hard disk drive support. Select Disabled to prevent the AMI BIOS from using
the S.M.A.R.T. Select Enabled to allow the AMI BIOS to use the S.M.A.R.T. to
support hard drive disk. The options are Disabled, Enabled, and Auto.
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32-Bit Data Transfer
Select Enable to enable the function of 32-bit IDE data transfer. The options are
Enabled and Disabled.
PCI/PnPConguration
This feature allows the user to set the PCI/PnP congurations for the following
items:
Clear NVRAM
This feature clears the NVRAM during system boot. The options are No and
Yes.
Plug & Play OS
Selecting Yes allows the OS to congure Plug & Play devices. (This is not required
for system boot if your system has an OS that supports Plug & Play.) Select No to
allow the AMI BIOS to congure all devices in the system.
PCI Latency Timer
This feature sets the latency Timer of each PCI device installed on a PCI bus. Select
64 to set the PCI latency to 64 PCI clock cycles. The options are 32, 64, 96, 128,
160, 192, 224 and 248.
PCI IDE Bus Master
When enabled, the BIOS uses PCI bus mastering for reading/writing to IDE drives.
The options are Disabled and Enabled.
PCIE I/O Performace
This feature selects the setting for the IOH PCIE maximum payload size. The op-
tions are 128B and 256B.
PCI Slots 5, 6, 7 & PCI Slot 4 OPROM
Use this feature to enable or disable PCI slot Option ROMs. The options are Dis-
abled and Enabled.
Onboard LAN Option ROM Select
This feature selects whether to load the iSCSI or PXE onboard LAN option ROM.
The options are iSCSI and PXE.
Load Onboard LAN1 Option ROM/Load Onboard LAN2 Option ROM
This feature is to enable or disable the onboard option ROMs. The options are
Disabled and Enabled.
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Initiate Graphic Adapter
Use the feature to select the graphics controller to be used as the primary boot
device. The options are Other and Onboard VGA.
SuperIODevice Conguration
Serial Port1 Address/ Serial Port2 Address
This option species the base I/O port address and the Interrupt Request address
of Serial Port 1 and Serial Port 2. Select Disabled to prevent the serial port from
accessing any system resources. When this option is set to Disabled, the serial
port physically becomes unavailable. Select 3F8/IRQ4 to allow the serial port to
use 3F8 as its I/O port address and IRQ 4 for the interrupt address. The options
for Serial Port1 are Disabled, 3F8/IRQ4, 2E8/IRQ3. The options for Serial Port2 are
Disabled, 2F8/IRQ3, and 2E8/IRQ3.
Onboard Floppy Controller
Select Enabled to enable the onboard Floppy Controller. The options are Enabled
and Disabled.
RemoteAccessConguration
Remote Access
This allows the user to enable the Remote Access feature. The options are Dis-
abled and Enabled.
If Remote Access is set to Enabled, the following items will display:
Serial Port Number
This feature allows the user decide which serial port to be used for Console
Redirection. The options are COM 1, COM 2 and COM 3.
Note: Serial Over LAN (SOL) is enabled on COM 3 on the X8SIL-F.
Serial Port Mode
This feature allows the user to set the serial port mode for Console Redirection.
The options are 115200 8, n 1; 57600 8, n, 1; 38400 8, n, 1; 19200 8, n, 1; and
9600 8, n, 1.
Flow Control
This feature allows the user to set the ow control for Console Redirection. The
options are None, Hardware, and Software.
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Redirection After BIOS POST
Select Disabled to turn off Console Redirection after Power-On Self-Test
(POST). Select Always to keep Console Redirection active all the time after
POST. (Note: This setting may not be supported by some operating systems.)
Select Boot Loader to keep Console Redirection active during POST and Boot
Loader. The options are Disabled, Boot Loader, and Always.
Terminal Type
This feature allows the user to select the target terminal type for Console Redi-
rection. The options are ANSI, VT100, and VT-UTF8.
VT-UTF8 Combo Key Support
A terminal keyboard denition that provides a way to send commands from a
remote console. Available options are Enabled and Disabled.
Sredir Memory Display Delay
This feature denes the length of time in seconds to display memory information.
The options are No Delay, Delay 1 Sec, Delay 2 Sec, and Delay 4 Sec.
Hardware Health Conguration
This feature allows the user to monitor Hardware Health of the system and review
the status of each item when displayed.
CPU Overheat Alarm
This option allows the user to select the CPU Overheat Alarm setting which determines
when the CPU OH alarm will be activated to provide warning of possible CPU overheat.
Warning: Any temperature that exceeds the CPU threshold temperature
predened by the CPU manufacturer may result in CPU overheat or system
instability. When the CPU temperature reaches this predened threshold, the
CPU and system cooling fans will run at full speed.
The options are:
The Early Alarm: Select this setting if you want the CPU overheat alarm (includ-•
ing the LED and the buzzer) to be triggered as soon as the CPU temperature
reaches the CPU overheat threshold as predened by the CPU manufacturer.
The Default Alarm•: Select this setting if you want the CPU overheat alarm
(including the LED and the buzzer) to be triggered when the CPU temperature
reaches about 5oC above the threshold temperature as predened by the CPU
manufacturer to give the CPU and system fans additional time needed for CPU
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Chapter 4: AMI BIOS
and system cooling. In both the alarms above, please take immediate action
as shown below.
System Temperature
This feature displays the absolute system temperature (i.e., 34oC).
CPU Temperature
The CPU Temperature feature will display the CPU temperature status as detected
by the BIOS:
Low – This level is considered as the ‘normal’ operating state. The CPU temperature
is well below the CPU ‘Temperature Tolerance’. The motherboard fans and CPU will
run normally as congured in the BIOS (Fan Speed Control).
User intervention: No action required.
Medium – The processor is running warmer. This is a ‘precautionary’ level and
generally means that there may be factors contributing to this condition, but the CPU
is still within its normal operating state and below the CPU ‘Temperature Tolerance’.
The motherboard fans and CPU will run normally as congured in the BIOS. The
fans may adjust to a faster speed depending on the Fan Speed Control settings.
User intervention: No action is required. However, consider checking the CPU
fans and the chassis ventilation for blockage.
High – The processor is running hot. This is a ‘caution’ level since the CPU’s ‘Tem-
perature Tolerance’ has been reached (or has been exceeded) and may activate
an overheat alarm:
The Default Alarm – the Overheat LED and system buzzer will activate if the High
condition continues for some time after it is reached. The CPU fan will run at full
speed to bring the CPU temperature down. If the CPU temperature still increases
even with the CPU fan running at full speed, the system buzzer will activate and
the Overheat LED will turn on.
The Early Alarm – the Overheat LED and system buzzer will be activated exactly
when the High level is reached. The CPU fan will run at full speed to bring the
CPU temperature down.
Note: In both the alarms above, please take immediate action as shown below.
See CPU Overheat Alarm to modify the above alarm settings.
User intervention: If the system buzzer and Overheat LED has activated, take
action immediately by checking the system fans, chassis ventilation and room
temperature to correct any problems. Note: the system may shut down if it con-
tinues for a long period to prevent damage to the CPU.
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Notes: The CPU thermal technology that reports absolute temperatures
(Celsius/Fahrenheit) has been upgraded to a more advanced feature by Intel
in its newer processors. The basic concept is that each CPU is embedded
by a unique temperature information that the motherboard can read. This
‘Temperature Threshold’ or ‘Temperature Tolerance’ has been assigned at
the factory and is the baseline by which the motherboard takes action during
different CPU temperature conditions (i.e., by increasing CPU Fan speed,
triggering the Overheat Alarm, etc). Since CPUs can have different ‘Tem-
perature Tolerances’, the installed CPU can now send its ‘Temperature Toler-
ance’ to the motherboard resulting in better CPU thermal management.
Supermicro has leveraged this feature by assigning a temperature status to
certain thermal conditions in the processor (Low, Medium and High). This
makes it easier for the user to understand the CPU’s temperature status,
rather than by just simply seeing a temperature reading (i.e., 25oC).
The information provided above is for your reference only. For more information on
thermal management, please refer to Intel’s Web site at www.Intel.com.
Fan Speed Control Modes
This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When the
CPU on-die temperature increases, the fan speed will also increase for effective
system cooling. Select "Full Speed/FS" to allow the onboard fans to run at full
speed (of 100% Pulse Width Modulation Duty Cycle) for maximum cooling. The
FS setting is recommended for special system conguration or debugging. Select
"Performance/PF" for the onboard fans to run at 70% of the Initial PWM Cycle for
better system cooling. The PF setting is recommended for high-power-consuming
and high-density systems. Select "Balanced/BL" for the onboard fans to run at 50%
of the Initial PWM Cycle in order to balance the needs between system cooling
and power saving. The BL setting is recommended for regular systems with normal
hardware congurations. Select "Energy Saving/ES" for the onboard fans to run at
30% of the Initial PWM Cycle for best power efciency and maximum quietness.
The Options are: Full Speed (@100% of PWM Cycle), Performance (@70% of
PWM Cycle), Balanced (@50% of PWM Cycle), and Energy Saving (@30% of
PWM Cycle).
Fan1 ~ Fan 6 Reading
This feature displays the fan speed readings from fan interfaces Fan1 through
Fan5.
Vcore, AVCC, 3.3Vcc, 12V, V_DIMM, 5V, -12V, 3.3Vsb, and Vbat
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ACPIConguration
Use this feature to congure Advanced Conguration and Power Interface (ACPI)
power management settings for your system.
High Performance Event Timer
Select Enabled to activate the High Performance Event Timer (HPET) that produces
periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in
synchronizing multimedia streams, providing smooth playback and reducing the de-
pendency on other timestamp calculation devices, such as an x86 RDTSC Instruc-
tion embedded in the CPU. The High Performance Event Timer is used to replace
the 8254 Programmable Interval Timer. The options are Enabled and Disabled.
ACPI Aware O/S
Enable ACPI support if it is supported by the OS to control ACPI through the Operat-
ing System. Otherwise, disable this feature. The options are Yes and No.
ACPI APIC Support
Select Enabled to include the ACPI APIC Table Pointer in the RSDT (Root System
Description Table) pointer list. The options are Enabled and Disabled.
APIC ACPI SCI IRQ
When this item is set to Enabled, APIC ACPI SCI IRQ is supported by the system.
The options are Enabled and Disabled.
Headless Mode
This feature is used to enable the system to function without a keyboard, monitor
or mouse attached The options are Enabled and Disabled.
ACPI Version Features
The options are ACPI v1.0, ACPI v2.0 and ACPI v3.0. Please refer to ACPI's website
for further explanation: http://www.acpi.info/
IPMIConguration(X8SIL-FOnly)
Intelligent Platform Management Interface (IPMI) is a set of common interfaces that
IT administrators can use to monitor system health and to manage the system as a
whole. For more information on the IPMI specications, please visit Intel's website
at www.intel.com.
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IPMI Firmware Revision
This item displays the current IPMI rmware revision.
Status of BMC
Baseboard Management Controller (BMC) manages the interface between system
management software and platform hardware. This is an informational feature which
returns the status code of the BMC micro controller.
View BMC System Event Log
This feature is used to view any BMC events. It shows the total number of entries
and will allow the viewing of each event by scrolling down on an Entry Number
and pressing Enter.
Clear BMC System Event Log
This feature is used to clear the System Event Log. Caution: Any cleared information
is unrecoverable. Make absolutely sure you no longer need any data stored in the
log before clearing the BMC Event Log.
SetLANConguration
Set this feature to congure the IPMI LAN adapter with a network address.
Channel Number - Enter the channel number for the SET LAN Cong com-
mand. This is initially set to [1]. Press "+" or "-" on your keyboard to change
the Channel Number.
Channel Number Status - This feature returns the channel status for the
Channel Number selected above: "Channel Number is OK" or "Wrong Channel
Number".
IP Address Source - This feature selects whether the IP address, Subnet Mask
and Gateway Address are automatically assigned by the network's DHCP server
(Dynamic Host and Conguration Protocol) or manually entered by the user
(Static). If Static is selected, the IP Address, Subnet Mask and Gateway Address
must be manually entered below. The options are Static and DHCP.
IP Address - Enter the IP address for this machine. This should be in decimal
and in dotted quad form (i.e., 192.168.10.253). The value of each three-digit
number separated by dots should not exceed 255.
Subnet Mask - Subnet masks tell the network which subnet this machine be-
longs to. The value of each three-digit number separated by dots should not
exceed 255.
Gateway Address - Enter the Gateway address this machine will use (i.e.,
192.168.10.1).
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Chapter 4: AMI BIOS
MAC Address - The BIOS will automatically enter the MAC address of this
machine, however it may be over-ridden. MAC addresses are 6 two-digit hexa-
decimal numbers (Base 16, 0 ~ 9, A, B, C, D, E, F) separated by dots. (i.e.,
00.30.48.D0.D4.60)
BMC Watch Dog Timer Action
Allows the BMC to reset or power down the system if the operating system hangs
or crashes. The options are Disabled, Reset System, Power Down, Power Cycle.
BMC WatchDog TimeOut [Min:Sec]
This option appears if BMC Watch Dog Timer Action (above) is enabled. This
is a timed delay in minutes or seconds, before a system power down or reset
after an operating system failure is detected. The options are [5 Min], [1 Min],
[30 Sec], and [10 Sec].
EventLogConguration
View Event Log
Use this option to view the System Event Log.
Mark all events as read
This option marks all events as read. The options are OK and Cancel.
Clear event log
This option clears the Event Log memory of all messages. The options are OK
and Cancel.
Intel®TXT(LT)Conguration
Intel TXT Initialization
Intel TXT (Trusted Execution Technology) helps protect against software-based at-
tacks and ensures protection, condentiality and integrity of data stored or created
on the system. The options are Enabled and Disabled. When enabled the following
information are displayed along with their status.:
BIOS AS [SCLEAN]
BIOS AC [SCHECK]
Lock DPR
Reset TPM Establishment Flag
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4-4 Security Settings
The AMI BIOS provides a Supervisor and a User password. If you use both pass-
words, the Supervisor password must be set rst.
Supervisor Password
This item indicates if a supervisor password has been entered for the system. Clear
means such a password has not been used and Set means a supervisor password
has been entered for the system.
User Password:
This item indicates if a user password has been entered for the system. Clear
means such a password has not been used and Set means a user password has
been entered for the system.
Change Supervisor Password
Select this feature and press <Enter> to access the submenu, and then type in a
new Supervisor Password.
User Access Level (Available when Supervisor Password is set as above)
Available options are Full Access: grants full User read and write access to the
Setup Utility, View Only: allows access to the Setup Utility but the elds cannot be
changed, Limited: allows only limited elds to be changed such as Date and Time,
No Access: prevents User access to the Setup Utility.
Change User Password
Select this feature and press <Enter> to access the submenu , and then type in a
new User Password.
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Chapter 4: AMI BIOS
Clear User Password (Available only if User Password has been set)
Password Check
Available options are Setup and Always.
Boot Sector Virus Protection
When Enabled, the AMI BOIS displays a warning when any program (or virus) is-
sues a Disk Format command or attempts to write to the boot sector of the hard
disk drive. The options are Enabled and Disabled.
4-5 Boot Settings
Use this feature to congure Boot Settings:
Boot Device Priority
This feature allows the user to specify the sequence of priority for the Boot Device.
The settings are 1st boot device, 2nd boot device, 3rd boot device, 4th boot device,
5th boot device and Disabled.
1st Boot Device - 1st Floppy Drive•
2nd Boot Device - [USB: XXXXXXXXX]•
3rd Boot Device - [SATA: XXXXXXXXX]•
4th Boot Device - [Network: XXXXXXXXX]•
5th Boot Device - [Network: XXXXXXXXX]•
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Removable Drives
This feature allows the user to specify the boot sequence from available Removable
Drives. The settings are 1st boot device, 2nd boot device, and Disabled.
1st Drive•
2nd Drive - [USB: XXXXXXXXX]•
Retry Boot Devices
Select this option to retry booting from the congured boot devices if the systems
fail to boot initially. The options are Disabled and Enabled.
CD/DVD Drives
This feature allows the user to specify the boot sequence from available CD/DVD
Drives (i.e., 1st Drive, 2nd Drive, etc).
4-6 Exit Options
Select the Exit tab from the AMI BIOS Setup Utility screen to enter the Exit BIOS
Setup screen.
Save Changes and Exit
When you have completed the system conguration changes, select this option
to leave the BIOS Setup Utility and reboot the computer, so the new system con-
guration parameters can take effect. Select Save Changes and Exit from the Exit
menu and press <Enter>.
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Chapter 4: AMI BIOS
Discard Changes and Exit
Select this option to quit the BIOS Setup without making any permanent changes
to the system conguration, and reboot the computer. Select Discard Changes and
Exit from the Exit menu and press <Enter>.
Discard Changes
Select this option and press <Enter> to discard all the changes and return to the
AMI BIOS Utility Program.
Load Optimal Defaults
To set this feature, select Load Optimal Defaults from the Exit menu and press
<Enter>. Then, select OK to allow the AMI BIOS to automatically load Optimal De-
faults to the BIOS Settings. The Optimal settings are designed for maximum system
performance, but may not work best for all computer applications.
Load Fail-Safe Defaults
To set this feature, select Load Fail-Safe Defaults from the Exit menu and press
<Enter>. The Fail-Safe settings are designed for maximum system stability, but not
for maximum performance.
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Notes
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Appendix A: POST Error Beep Codes
Appendix A
POST Error Beep Codes
This section lists POST (Power On Self Test) error beep codes for the AMI BIOS.
POST error beep codes are divided into two categories: recoverable and terminal.
This section lists Beep Codes for recoverable POST errors.
Recoverable POST Error Beep Codes
When a recoverable type of error occurs during POST, BIOS will display a POST
code that describes the problem. BIOS may also issue one of the following beep
codes:
1 long and eight short beeps - video conguration error
1 repetitive long beep - no memor y detected
1 continuous beep with the front panel Overheat LED on - system overheat
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Notes
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Appendix B: Software Installation Instructions
Appendix B
Software Installation Instructions
B-1 Installing Drivers
After you've installed the Windows Operating System, a screen as shown below
will appear. You are ready to install software programs and drivers that have not
yet been installed. To install these software programs and drivers, click the icons
to the right of these items. (Note: To install the Windows Operating System, please
refer to the instructions posted on our website at http://www.supermicro.com/
support/manuals/.)
Driver/Tool Installation Display Screen
Note: Click the icons showing a hand writing on the paper to view the
readme les for each item. Click a computer icon to the right of an item to
install an item (from top to the bottom) one at a time. After installing each
item, you must re-boot the system before proceeding with the next item
on the list. The bottom icon with a CD on it allows you to view the entire
contents of the CD.
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B-2 ConguringSuperoDoctorIII
The Supero Doctor III program is a Web-base management tool that supports
remote management capability. It includes Remote and Local Management tools.
The local management is called the SD III Client. The Supero Doctor III program
included on the CDROM that came with your motherboard allows you to monitor
the environment and operations of your system. Supero Doctor III displays crucial
system information such as CPU temperature, system voltages and fan status. See
the Figure below for a display of the Supero Doctor III interface.
Note 1: Both default user name and password are ADMIN.
Note 2: In the Windows OS environment, the Supero Doctor III settings
take precedence over the BIOS settings. When rst installed, Supero
Doctor III adopts the temperature threshold settings previously set in the
BIOS. Any subsequent changes to these thresholds must be made within
Supero Doctor, since the SD III settings override the BIOS settings. For
the Windows OS to adopt the BIOS temperature threshold settings, please
change the SDIII settings to be the same as those set in the BIOS.
Supero Doctor III Interface Display Screen-I (Health Information)
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Appendix B: Software Installation Instructions
Supero Doctor III Interface Display Screen-II (Remote Control)
Note: SD III Software Revision 1.0 can be downloaded from our Web
site at: ftp://ftp.supermicro.com/utility/Supero_Doctor_III/. You can also