The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates.
Please Note: For the most up-to-date version of this manual, please see our web
site at www.supermicro.com.
SUPERMICRO COMPUTER reserves the right to make changes to the product described in this
manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any
medium or machine without prior written consent.
IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all
claims will not exceed the price paid for the hardware product.
Manual Revision: Rev. 1.0a
Release Date: Aug. 8, 2006
Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
(*Note:The drawings and pictures shown in this manual were based on
the latest PCB Revision available at the time of publishing of the manual. The
motherboard you’ve received may or may not look exactly the same as the
graphics shown in the manual.)
1-3
X7DB8/X7DBE User's Manual
Figure 1-2. X7DB8/X7DBE Motherboard Layout
(not drawn to scale)
KB/
Mous e
SB
U
JUSB1
CO
Parrallel
VGA
Fan5
6
n
a
F
JKM1
1
0/
M1
Port
JLAN1
J1
5
GLAN1
GLAN2
L
CTRL
/O
I
S
O
C
J
J9B2
J9B1
JCO
M
1
J8B3
2
J8B
8B 1
J
7B 3
J
J7B2
J21
J7B1
JLAN1
JLAN2
S
UP ERX7DB 8/
t7
o
l
S
SIMLP IPMI
JPG1
Slot6
PCI-Exp x8
A
VG
CTRL
Slot5
P
Slot4
PCI-Exp x4
JWD
t3
o
l
S
JPL
JPL2
Slo
Slot1
1
t2
PCI
PCI
PCI-X1
N
A
2
M
4-Pin
WR
P
JPW2
DIMM 4
DIMM 4A (B a nk 4)
DIMM 3
D
IMM 3A (B ank3)
DIMM2B (Bank 2)
DIMM 2A (B ank 2)
DIMM 1
DIMM 1A (B ank 1)
®
SEPC
J
5
Ba
x8
xp
CI-E
-
-
X1
X1
J
J
J
W
3
3
8
2
7
2
33 MH
R
O
00
MH
MH
J
6
J9
z
z
zZCR
in
-P
24
ATX PWR
B(Bank4)
B
(B
ank 3)
B
(B
ank 1)
E
ttery
J
1
6
1
1
J
North
OS
I
B
JPW1
SATA0
Fan3
Fan8
3
JPA
2
J
JPA2
8-pin P WR
JPW3
y
p
p
act Flash
p
Flo
m
Co
2
JA1
A2
J
LE1
SGPI
SG
JIDE2
320 S CS I C hannel A
JF1
SPK
PW LED
J
J
PIO1
Fan4
Fan1
FP Ctrl
Fan2
D1
J
JP1
JOH1
2
O
0
3
9
2
1
IDE
JIDE1
1
A
D
SMBPS
P
X
JL1
JAR
JB
H
SATA4
J17
1
T
7
J
SATA2
PSF
J3P
SATA5
SATA3
B
US
JU
S
SB
U
JUSB2
CPU1
4
B
3
2/3
U2
CP
th
u
o
S
dge
i
r
B
JWOL1
L
O
W
SCSI CTRL
DA2
JPA1
320 S CS I C hannel B
CF1
J
F1
W
J
Fan7
ridge
B
14
J
J13
12
J
B
M
S
J
K1
J
1
6
SATA1
1. Jumpers not indicated are for test purposes only.
2. See Chapter 2 for detailed information on jumpers, I/O ports and
JF1 front panel connections.
3. " " indicates the location of Pin 1.
4. SCSI is for the X7DB8 only.
5. SEPC: Supermicro Enhanced Power Connector, specially designed
to support Supermicro 2U Riser Card only.
6. When LE1 is on, make sure to turn off the power before removing or installing
components.
7. For the ZCR card to function properly, be sure to install it in the green slot.
1-4
Chapter 1: Introduction
Quick Reference ( X7DB8/X7DBE)
Jumper Description Default Setting
J27, J28 I
J3P 3rd PWR Failure Detect Off (Disabled)
• Six SATA2 ports (supporting RAID0, RAID1,10 and 5)
• One SIMLP IPMI socket
• Intel 82563 Gigabit Ethernet controller supporting two Giga-bit LAN ports
• Two EIDE Ultra DMA/100 bus master interfaces supporting one IDE (the blue
slot) and one Compact Flash card (the blue slot)
• Two SGPIO (Serial General Purpose Input/Output) headers
• One fl oppy port interface
• Two COM ports (1 header, 1 port)
• One EPP/ECP Parallel Port
• PS/2 mouse and PS/2 keyboard ports
• Up to fi ve USB 2.0 (Universal Serial Bus) (2 ports, 3 Headers)
• ATI ES1000 with 16 MB Graphic Controller
• Super I/O: Winbond W83627HF w/Hardware Monitor support: W83793,
HECETA
Other
• External modem ring-on
• Wake-on-LAN (WOL)
• Wake-on-Ring (WOR)
• Console redirection
• Onboard Fan Speed Control by Thermal Management via BIOS
CD/Diskette Utilities
• BIOS fl ash upgrade utility and device drivers
Dimensions
• Ext. ATX 13.5" x 13.05" (342.90 x 331.5 mm)
1-7
X7DB8/X7DBE User's Manual
#2
Slot
X
I-
PC
#3
#1
Slot
ZCR
Slot
PCI -X
SCSI
7902
#5
PC
PCI -
VRM
ISLISL
6307
#6
PROCESSOR#2
667/1067/
MT/S
PC
EXP x8
I-
1333
Slot
PCI -
EX
P x8
PCI - EXP x8 Slot
PCI -E XP x8
PROCESSOR#1
5000P
MCH
667/1067/
MT/S
FBD CHNL0
FBD CHNL1
FBD
FBD CHNL
PC
x8
IE
PC
ESB2
x4
IE
PC
I-
133
x
x133
SE
#4
PCI - EXP x4
PCI-EXPx8
A
PX
H
B
PCI -X
PC
P x8
I-EX
133
MHz
1333
CHNL
2
3
AT A
3.
-1B
#1A
DIMM
100
0 Gb/ S
D
FB
VRM
6307
#2A-2B
#3A-3B
MM
MM
DI
DI
D
FB
FBD
-#5
#0
SATA
#4A-4B
MM
DI
FBD
CONNIDE
PCI -X
A
VG
CONN
VGA
Controller
RJ
45
RJ45
PCI 32/ 33
MHz
PARALLEL
GB L AN
GIGAL
PORT
KU
ME
RA
N
FDD
SIO
83627
W
HF
MS/
KB
US
LPC
CO M
B 2.0
1/2
FW
-#4
US B
#0
H
Figure 1-9. Block Diagram of the 5000P (Blackford) Chipset
Note: This is a general block diagram. Please see the previous Motherboard Features
pages for details on the features of each motherboard.
1-8
Chapter 1: Introduction
1-2 Chipset Overview
Built upon the functionality and the capability of the 5000P (Blackford) chipset, the
X7DB8/X7DBE motherboard provides the performance and feature set required
for dual processor-based servers with confi guration options optimized for commu-
nications, presentation, storage, computation or database applications. The 5000P
(Blackford) chipset supports single or dual Xeon 64-bit dual core processor(s) with
front side bus speeds of up to 1.333 GHz. The chipset consists of the 5000P
(Blackford) Memory Controller Hub (MCH), the Enterprise South Bridge 2 (ESB2),
and the I/O subsystem (PXH).
The 5000P (Blackford) MCH chipset is designed for symmetric multiprocessing
across two independent front side bus interfaces. Each front side bus uses a 64-
bit wide, 1333 MHz data bus that transfers data at 10.7 GB/sec. In addition, the
5000P (Blackford) chipset offers a wide range of RAS features, including memory
interface ECC, x4/x8 Single Device Data Correction, CRC, parity protection, memory
mirroring and memory sparing.
The Xeon Dual Core Processor Features
Designed to be used with conjunction of the 5000P (Blackford) chipset, the Xeon
dual core Processor provides a feature set as follows:
The Xeon Dual Core Processors
*L1 Cache Size: Instruction Cache (32KB/16KB), Data Cache (32KB/24KB)
*L2 Cache Size: 4MB/2MB (per core)
*Data Bus Transfer Rate: 8.5 GB/s
*Package: FC-LGA6/FC-LGA4, 771 Lands
1-9
X7DB8/X7DBE User's Manual
1-3 Special Features
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond when AC
power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must hit the power switch to turn it back on)
or for it to automatically return to a power- on state. See the Power Lost Control
setting in the Advanced BIOS Setup section (Peripheral Device Confi guration) to
change this setting.
1-4 PC Health Monitoring
This section describes the PC health monitoring features of the X7DB8/X7DBE. All
have an onboard System Hardware Monitor chip that supports PC health monitor-
ing.
Onboard Voltage Monitors for CPUCore, +3.3V, +5V, +12V, −12V
and +5V standby
An onboard voltage monitor will scan these voltages continuously. Once a
voltage becomes unstable, a warning is given or an error message is sent to
the screen. Users can adjust the voltage thresholds to defi ne the sensitivity
of the voltage monitor.
Fan Status Monitor with Firmware Control
The PC health monitor can check the RPM status of the cooling fans. The onboard
CPU and chassis fans are controlled by Thermal Management via BIOS (under
Hardware Monitoring in the Advanced Setting).
Environmental Temperature Control
The thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-defi ned
threshold. The overheat circuitry runs independently from the CPU. Once it detects
that the CPU temperature is too high, it will automatically turn on the thermal fan
control to prevent any overheat damage to the CPU. The onboard chassis thermal
circuitry can monitor the overall system temperature and alert users when the chas-
sis temperature is too high.
1-10
Chapter 1: Introduction
CPU Fan Auto-Off in Sleep Mode
The CPU fan activates when the power is turned on. It continues to operate when
the system enters Standby mode. When in sleep mode, the CPU will not run at
full power, thereby generating less heat.
CPU Overheat LED and Control
This feature is available when the user enables the CPU overheat warning function
in the BIOS. This allows the user to defi ne an overheat temperature. When this tem-
perature is exceeded, both the overheat fan and the warning LED are triggered.
System Resource Alert
This feature is available when used with Supero Doctor III in the Windows OS en-
vironment or used with Supero Doctor II in Linux. Supero Doctor is used to notify
the user of certain system events. For example, you can also confi gure Supero
Doctor to provide you with warnings when the system temperature, CPU tempera-
tures, voltages and fan speeds go beyond a pre-defi ned range.
.
1-5 ACPI Features
ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi -
cation defi nes a fl exible and abstract hardware interface that provides a standard
way to integrate power management features throughout a PC system, including its
hardware, operating system and application software. This enables the system to
automatically turn on and off peripherals such as CD-ROMs, network cards, hard
disk drives and printers. This also includes consumer devices connected to the PC
such as VCRs, TVs, telephones and stereos.
In addition to enabling operating system-directed power management, ACPI
provides a generic system event mechanism for Plug and Play and an operating
system-independent interface for confi guration control. ACPI leverages the Plug
and Play BIOS data structures while providing a processor architecture-independent
implementation that is compatible with both Windows 2000 and Windows NT 5.0.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start blinking
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will wake-up and the LED will automatically stop blinking and remain on.
1-11
X7DB8/X7DBE User's Manual
Main Switch Override Mechanism
When an ATX power supply is used, the power button can function as a system
suspend button to make the system enter a SoftOff state. The monitor will be
suspended and the hard drive will spin down. Pressing the power button again
will cause the whole system to wake-up. During the SoftOff state, the ATX power
supply provides power to keep the required circuitry in the system alive. In case
the system malfunctions and you want to turn off the power, just press and hold
the power button for 4 seconds. This option can be set in the Power section of
the BIOS Setup routine.
External Modem Ring-On
Wake-up events can be triggered by a device such as the external modem ringing
when the system is in the SoftOff state. Note that external modem ring-on can only
be used with an ATX 2.01 (or above) compliant power supply.
Wake-On-LAN (WOL)
Wake-On-LAN is defi ned as the ability of a management application to remotely
power up a computer that is powered off. Remote PC setup, up-dates and asset
tracking can occur after hours and on weekends so that daily LAN traffi c is kept to
a minimum and users are not interrupted. The motherboard has a 3-pin header
(WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has
WOL capability. In addition, an onboard LAN controller can also support WOL
without any connection to the WOL header. The 3-pin WOL header is to be used
with a LAN add-on card only.
*Note: Wake-On-LAN requires an ATX 2.01 (or above) compliant power supply.
1-6 Power Supply
As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.
The X7DB8/X7DBE can only accommodates 24-pin ATX power supplies. Although
most power supplies generally meet the specifi cations required by the CPU, some
are inadequate. In addition, the 12V 4-pin power supply - is also required to ensure
adequate power supply to the system. Also your power supply must supply 1.5A
for the Ethernet ports.
1-12
Chapter 1: Introduction
NOTE: The + 12V 8-pin Aux. Power Connector is also required to support
Intel 64-bit CPUs. Failure to provide this extra power will result in CPU PWR
Failure. See Section 2-5 for details on connecting the power supply.
It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specifi cation 2.02 or above. It must also be SSI compliant (info at
http://www.ssiforum.org/). Additionally, in areas where noisy power transmission is
present, you may choose to install a line fi lter to shield the computer from noise. It
is recommended that you also install a power surge protector to help avoid problems
caused by power surges.
1-7 Super I/O
The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive
controller that is compatible with industry standard 82077/765, a data separator,
write pre-compensation circuitry, decode logic, data rate selection, a clock genera-
tor, drive interface control logic and interrupt and DMA logic. The wide range of
functions integrated onto the Super I/O greatly reduces the number of components
required for interfacing with fl oppy disk drives. The Super I/O supports 360 K, 720
K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s
or 1 Mb/s.It also provides two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.
The Super I/O supports one PC-compatible printer port (SPP), Bi-directional Printer
Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities Port (ECP).
The Super I/O provides functions that comply with ACPI (Advanced Confi guration
and Power Interface), which includes support of legacy and ACPI power manage-
ment through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.
1-13
X7DB8/X7DBE User's Manual
Notes
1-14
Chapter 2: Installation
Chapter 2
Installation
2-1 Static-Sensitive Devices
Electric-Static-Discharge (ESD) can damage electronic com ponents. To prevent
damage to your system board, it is important to handle it very carefully. The following
measures are generally suffi cient to protect your equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic
bag.
• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not in
use.
• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.
• Use only the correct type of onboard CMOS battery as specifi ed by the manu-
facturer. Do not install the onboard battery upside down to avoid possible explo-
sion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static protected.
2-1
X7DB8/X7DBE User's Manual
2-2 Processor and Heatsink Fan Installation
When handling the processor package, avoid placing
direct pressure on the label area of the fan.
(*Notes: 1. Always connect the power cord last and always remove it before adding,
removing or changing any hardware components. Make sure that you install the
processor into the CPU socket before you install the CPU heatsink.
2. Intel's boxed Xeon CPU package contains the CPU fan and heatsink assembly.
If you buy a CPU separately, make sure that you use only Intel-certifi ed multi-di-
rectional heatsink and fan.
3. The Intel Xeon LGA 771 heatsink and fan comes with a push-pin design and no
tool is needed for installation.
4. Make sure to install the motherboard into the chassis before you install the CPU
heatsink and fan.)
5. When purchasing an LGA 771 CPU or when receiving a motherboard with an LGA
771 CPU pre-installed, make sure that the CPU plastic cap is in place and none of
the CPU pins are bent; otherwise, contact the retailer immediately.
6. Refer to the MB Features Section for more details on CPU support.
!
Installation of the LGA771 Processor
1. Press the socket clip to release
the load plate, which covers the CPU
socket, from its locking position.
2. Gently lift the socket clip to open
the load plate.
Socket Clip
Load Plate
Load Plate
2-2
Chapter 2: Installation
3. Use your thumb and your index
fi nger to hold the CPU at the North
Center Edge and the South Center
Edge of the CPU.
4. Align CPU Pin1 (the CPU corner
marked with a triangle) against the
socket corner that is marked with a
triangle cutout.
5. Align the CPU key that is the
semi-circle cutout below a gold dot
against the socket key, the notch on
the same side of the triangle cutout
on the socket.
6. Once aligned, carefully lower the
CPU straight down to the socket.
(**Do not drop the CPU on the
socket. Do not move the CPU hori-
zontally or vertically. Do not rub the
CPU against the surface or against
any pins of the socket to avoid dam-
age to the CPU or the socket.)
Socket Key
(Socket Notch)
CPU Key (semi-
circle cutout)
below the circle.
Corner with a
triangle cutout
North Center Edge
South Center Edge
gold dot
CPU Pin1
7. With the CPU inside the socket,
inspect the four corners of the CPU
to make sure that the CPU is prop-
erly installed.
8. Use your thumb to gently push the
socket clip down to the clip lock.
9. If the CPU is properly installed
into the socket, the plastic cap will
be automatically released from the
load plate when the clip is pushed in
the clip lock. Remove the plastic cap
from the motherboard.
!
(*Warning: Please save the
plastic cap. The motherboard must
be shipped with the plastic cap
properly installed to protect the CPU
socket pins. Shipment without the
plastic cap properly installed will
cause damage to the socket pins.)
Socket clip
CPU in the CPU socket
Plastic cap
is released
from the
load plate
if the CPU
is properly
installed.
2-3
X7DB8/X7DBE User's Manual
Installation of the Heatsink
CEK Heatsink Installation
1. Do not apply any thermal grease to
the heatsink or the CPU die-the required
amount has already been applied.
2. Place the heatsink on top of the
CPU so that the four mounting holes
are aligned with those on the retention
mechanism.
3. Screw in two diagonal screws (ie the
#1 and the #2 screws) until just snug (-do
not fully tighten the screws to avoid pos-
sible damage to the CPU.)
4. Finish the installation by fully tightening
all four screws.
CEK Passive Heatsink
Screw#1Screw#2
Screw#1
To Un-install the Heatsink
(Warning: We do not recommend
that the CPU or the heatsink be
!
removed. However, if you do need
to uninstall the heatsink, please
follow the instructions below to
uninstall the heatsink to prevent
damage done to the CPU or the
CPU socket.)
Screw#2
2-4
1. Unscrew and remove the heatsink
screws from the motherboard in the
sequence as show in the picture on the
right.
2. Hold the heatsink as shown in the
picture on the right and gently wriggle the
heatsink to loosen it from the CPU. (Do
not use excessive force when wriggling
the heatsink!!)
3. Once the CPU is loosened, remove the
heatsink from the CPU socket.
Chapter 2: Installation
4. Clean the surface of the CPU and
the heatsink to get rid of the old thermal
grease. Reapply the proper amount of
thermal grease on the surface before you
re-install the CPU and the heatsink.
Mounting the Motherboard in the Chassis
All motherboards have standard mounting holes to fi t different types of chas-
sis. Make sure that the locations of all the mounting holes for both motherboard
and chassis match. Make sure that the metal standoffs click in or are screwed in
tightly. Then, use a screwdriver to secure the motherboard onto the motherboard
tray. (*Note: some components are very close to the mounting holes. Please take
precautionary measures to prevent damage done to these components when you
install the motherboard to the chassis.)
2-5
X7DB8/X7DBE User's Manual
2-3 Installing DIMMs
Note: Check the Supermicro web site for recommended memory modules.
CAUTION
Exercise extreme care when installing or removing DIMM
modules to prevent any possible damage. Also note that the
memory is interleaved to improve performance (see step 1).
DIMM Installation (See Figure 2-2)
1. Insert the desired number of DIMMs into the memory slots, starting with DIMM
#1A. The memory scheme is interleaved so you must install four modules at
a time, beginning with DIMM #1A, then DIMM #2A and so on. *For optimal
performance, please install four modules at a time up to 8 modules. (*See
the Memory Installation Table Below.)
2. Insert each DIMM module vertically into its slot. Pay attention to the notch along
the bottom of the module to prevent inserting the DIMM module incorrectly.
3. Gently press down on the DIMM module until it snaps into place in the slot.
Repeat for all modules (see step 1 above).
Memory Support
The X7DB8/X7DBE supports up to 16 GB (32 GB) fully buffered (FBD) ECC DDR2
533/667 in 8 DIMMs. Populating DIMM modules with pairs of memory modules
of the same size and same type will result in Interleaving Memory which will
increase memory performance.
*Note: Due to OS limitations, some operating systems may not show more than 4
(*Notes: i. DIMM slot# specified: DIMM slot to be populated; “---“: DIMM slot not to
be populated. ii. Both FBD 533 MHz and 667MHz DIMMs are supported; however,
you need to use the memory modules of the same speed and of the same type on a
motherboard. iii. Interleaving memory is supported when pairs of DIMM modules are
installed. To optimize memory performance, please install pairs of DIMMs in bothBranch 0 and Branch 1. iv. For memory to work properly, you need to follow the
restrictions listed above. )
2-6
JLAN1
UPER X7DB8/E
S
Chapter 2: Installation
Figure 2-2. Installing and Removing DIMMs
DDR2 FBD
II
®
To Install: Insert module vertically and press down until it
snaps into place. Pay attention to the alignment notch at
the bottom.
To Remove:
Use your thumbs
to gently push
the release tabs
near both ends of
the module. This
should release it
from the slot.
DDR2 FBD Slot
II
2-7
X7DB8/X7DBE User's Manual
2-4 Control Panel Connectors/IO Ports
The I/O ports are color coded in conformance with the PC 99 specifi cation. See
Figure 2-3 below for the colors and locations of the various I/O ports.
A. Back Panel Connectors/IO Ports
JLAN1
®
UPER X7DB8/E
S
Figure 2-3. Back Panel I/O Port Locations and Defi nitions
Back Panel Connectors
1. Keyboard (Purple)
2. PS/2 Mouse (Green)
3. Back Panel USB Port 0
4. Back Panel USB Port 1
5. COM Port 1 (Turquoise)
6. VGA Port (Blue)
7. Parallel Port (Printer)
8. Gigabit LAN 1
9. Gigabit LAN 2
2
1
4
3
5
7
6
89
(*See Section 2-5 for details.)
2-8
Chapter 2: Installation
B. Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located
on a control panel at the front of the chassis. These connectors are designed specifi -
cally for use with Supermicro server chassis. See Figure 2-4 for the descriptions of
the various control panel buttons and LED indicators. Refer to the following section
for descriptions and pin defi nitions.
Figure 2-4. JF1 Header Pins
1920
Ground
NMI
JLAN1
S
UPER
®
X7DB8/E
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
PWR Fail LED
Ground
Ground
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
PWR
2
1
Reset Button
Power Button
2-9
X7DB8/X7DBE User's Manual
C. Front Control Panel Pin Defi nitions
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19Control
20Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
15+5V
16Ground
A. NMI
B. PWR LED
Fan6
KB/
Mouse
USB0/1
COM1
Parrallel
Port
JLAN1
VGA
GLAN1
GLAN2
UPER
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
S I/O
Slot1
JCOM2
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
®
X7DB8/E
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
MHz
PCI-X 133
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz ZCR
SEPC
Battery
24-Pin
ATX PWR
BIOS
North Bridge
JK
SATA0
1920
Fan3
Fan8
JCF1
JWF1
JPA3
JPA2
SCSI CTRL
320 SCSI Channel B
8-pin PWR
Floppy
Compact Flash
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
SGPIO2
SGPIO1
IDE1
320 SCSI Channel A
A1
D
Fan4
Ground
B
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
PWR Fail LED
Ground
Ground
NMI
A
X
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
PWR
2
1
PSF
Fan7
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
South
Bridge
J7
USB4
PXH
1
SMB
JL1
SATA1
SATA4
SATA2
USB2/3
SATA5
SATA3
WOL
DA
2
JPA
1
2-10
Chapter 2: Installation
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach the
hard drive LED cable here to display
disk activity (for any hard drives on
the system, including SAS, Serial ATA
and IDE). See the table on the right
for pin defi nitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Control-
ler) LED connection for GLAN port1 is
located on pins 11 and 12 of JF1 and
the LED connection for GLAN Port2
is on Pins 9 and 10. Attach the NIC
LED cables to display network activity.
Refer to the table on the right for pin
defi nitions.
HDD LED
Pin Defi nitions (JF1)
Pin# Defi nition
13+5V
14HD Active
GLAN1/2 LED
Pin Defi nitions (JF1)
Pin# Defi nition
9/11Vcc
10/12Ground
A. HDD LED
B. NIC1 LED
C. NIC2 LED
Fan6
KB/
Mouse
USB0/1
COM1
Parrallel
Port
JLAN1
VGA
GLAN1
GLAN2
UPER
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
S I/O
Slot1
JCOM2
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
®
X7DB8/E
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
MHz
PCI-X 133
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz ZCR
SEPC
Battery
24-Pin
ATX PWR
BIOS
North Bridge
JK
1
SATA0
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
PWR
2
1
JWF1
8-pin PWR
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
SGPIO2
SGPIO1
Fan3
Fan8
JCF1
Floppy
Compact Flash
IDE1
OH/Fan Fail LED
Power LED
HDD LED
A
B
NIC1 LED
NIC2 LED
C
Ground
X
PWR Fail LED
JPA3
JPA2
PSF
Fan7
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
South
Bridge
J7
Ground
USB4
PXH
SMB
JL1
SATA1
SATA4
SATA2
USB2/3
SATA5
SATA3
WOL
DA
2
JPA
1
SCSI CTRL
320 SCSI Channel B
320 SCSI Channel A
A1
D
Fan4
Ground
2-11
X7DB8/X7DBE User's Manual
Overheat/Fan Fail LED (OH)
Connect an LED to the OH/Fan Fail
connection on pins 7 and 8 of JF1 to
provide advanced warning of chassis
overheating or fan failure. Refer to
the table on the right for pin defi ni-
tions.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
defi nitions.
OH/Fan Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
7Vcc
8Ground
OH/Fan Fail Indicator
Status
State Defi nition
OffNormal
OnOverheat
Flash-
Fan Fail
ing
PWR Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
5Vcc
6Ground
A. OH/Fan Fail LED
B. PWR Supply Fail
4-Pin
Fan5
Fan6
KB/
Mouse
USB0/1
COM1
VGA
Parrallel
Port
JLAN1
GLAN1
GLAN2
S I/O
JCOM2
LAN
CTRL
S
VGA
CTRL
UPER
Slot7
JPG1
Slot6
Slot5
Slot4
Slot3
JPL1
JPL2
Slot2
Slot1
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
®
X7DB8/E
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
MHz
PCI-X 133
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz ZCR
SEPC
Battery
24-Pin
ATX PWR
BIOS
North Bridge
JK
SATA0
1920
Fan3
Fan8
JCF1
JWF1
JPA3
JPA2
SCSI CTRL
320 SCSI Channel B
8-pin PWR
Floppy
Compact Flash
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
SGPIO2
SGPIO1
IDE1
320 SCSI Channel A
A1
D
Fan4
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
A
PWR Fail LED
B
Ground
Ground
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
PWR
2
1
PSF
Fan7
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
South
Bridge
J7
USB4
PXH
1
SMB
JL1
SATA1
SATA4
SATA2
USB2/3
SATA5
SATA3
WOL
DA
2
JPA
1
2-12
Reset Button
Chapter 2: Installation
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to the
hardware reset switch on the computer
case. Refer to the table on the right for
pin defi nitions.
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be
confi gured to function as a suspend but-
ton (with a setting in BIOS - see Chapter
4). To turn off the power when set to
suspend mode, press the button for at
least 4 seconds. Refer to the table on
the right for pin defi nitions.
Reset Button
Pin Defi nitions (JF1)
Pin# Defi nition
3Reset
4Ground
Power Button
Pin Defi nitions (JF1)
Pin# Defi nition
1Signal
2+3V Standby
A. Reset Button
B. PWR Button
Fan5
Fan6
KB/
Mouse
USB0/1
COM1
Parrallel
Port
JLAN1
VGA
GLAN1
GLAN2
®
X7DB8/E
UPER
S
Slot7
SIMLP IPMI
JPG1
Slot6
PCI-Exp x8
VGA
Slot5
CTRL
PCI-Exp x8
Slot4
PCI-Exp x4
JWD
Slot3
PCI-X 133
LAN
JPL1
JPL2
Slot2
Slot1
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz ZCR
CTRL
S I/O
JCOM2
4-Pin
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
SEPC
Battery
MHz
ATX PWR
BIOS
North Bridge
JK
1
SATA0
1920
Fan3
Fan8
JCF1
JWF1
JPA3
JPA2
SCSI CTRL
320 SCSI Channel B
8-pin PWR
Floppy
Compact Flash
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
SGPIO2
SGPIO1
IDE1
320 SCSI Channel A
A1
D
Fan4
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
PWR Fail LED
Ground
Ground
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
A
Power Button
PWR
2
1
B
PSF
Fan7
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
South
Bridge
J7
USB4
PXH
SMB
JL1
SATA1
SATA4
SATA2
USB2/3
SATA5
SATA3
WOL
DA
2
JPA
1
2-13
X7DB8/X7DBE User's Manual
2-5 Connecting Cables
ATX Power Connector
There are a 24-pin main power sup-
ply connector(JPW1) and an 8-pin
CPU PWR connector (JPW3) on the
motherboard. These power connec-
tors meet the SSI EPS 12V specifi ca-
tion. The 4-pin 12V PWR supply is
required to provide adequate power
to the system. See the table on the
right for pin defi nitions. For the 8-pin
PWR (JPW3), please refer to the item
listed below.
Processor Power Connector
In addition to the Primary ATX power
connector (above), the 12V 8-pin CPU
PWR connector at JPW3 must also
be connected to your power supply.
See the table on the right for pin
defi nitions.
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
Port
JLAN1
GLAN1
GLAN2
LAN
CTRL
S I/O
JCOM2
S
VGA
CTRL
Fan5
Fan6
UPER
Slot7
SIMLP IPMI
JPG1
Slot6
PCI-Exp x8
Slot5
PCI-Exp x8
Slot4
PCI-Exp x4
JWD
Slot3
PCI-X 133 MHz
JPL1
JPL2
Slot2
PCI-X 133 MHz
Slot1
PCI-X 100 MHz ZCR
C
4-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM
®
X7DB8/E
J28
J27
JWOR
24-Pin
ATX PWR
1A (Bank 1)
SEPC
Battery
BIOS
A
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
PSF
SMB PS
J3P
JAR
JBT1
J7
PXH
SATA5
SATA4
JL1
SATA3
SATA2
USB4
USB2/3
CPU1
CPU2
South
Bridge
WOL
DA2
JPA1
ATX Power 20-pin Connector
Pin Defi nitions
Pin# Defi nition Pin # Defi nition
13+3.3V1+3.3V
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
Required Connection
12V 4-pin Power Con-
Pin Defi nitions
Pins Defi nition
1 and 2Ground
3 and 4+12V
Required Connection
12V 8-pin Power CPU
Connector
Pin Defi nitions
Pins Defi nition
1 through 4Ground
5 through 8+12V
A. 24-pin ATX PWR
B. 8-pin Processor PWR
JP1
C. 4-pin PWR
JOH1
Fan3
Fan8
JCF1
JWF1
JPA3
JPA2
SCSI CTRL
320 SCSI Channel B
8-pin PWR
Floppy
B
Compact Flash
Fan1
FP Ctrl
Fan2
SPK
PW LED
LE1
SGPIO2
SGPIO1
IDE1
320 SCSI Channel A
DA1
Fan4
nector
2-14
Universal Serial Bus (USB)
There are fi ve USB 2.0 (Universal
Serial Bus) ports/headers on the
motherboard. Two of them are Back
Panel USB ports (USB#0/1:JUSB1),
and the other three are Front Panel
USB headers (USB#2/3:JUSB2,
USB#4: JUSB3). See the tables on
the right for pin defi nitions.
Chassis Intrusion
A Chassis Intrusion header (JL1) is
located next to the IDE ports on the
motherboard. Attach the appropriate
cable from the chassis to inform you of
a chassis intrusion when the chassis
is opened.
Chapter 2: Installation
Back Panel USB
(USB#0/1)
Pin# Defi nitions
1+5V
2PO-
3PO+
4Ground
5N/A
Front Panel USB
Pin Defi nitions
USB#2/4
Pin # Defi nition
1+5V1+5V
2PO-2PO-
3PO+3PO+
4Ground4Ground
5Key5No connection
Chassis Intrusion
Pin Defi nitions (JL1)
Pin# Defi nition
1Intrusion Input
2Ground
USB#3
Pin # Defi nition
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
A
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
A. Backpanel USB 0-1
B. Front Panel USB 2-3
Fan1
C. Front Panel USB 4
FP Ctrl
D. Chassis Intrusion
Fan2
SPK
PW LED
JP1
JOH1
IDE1
DA1
JCF1
JWF1
Fan3
Fan8
JPA3
Floppy
JPA2
8-pin PWR
LE1
SGPIO2
SGPIO1
Compact Flash
320 SCSI Channel A
Fan4
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
D
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
C
DA2
B
JPA1
WOL
SCSI CTRL
320 SCSI Channel B
2-15
X7DB8/X7DBE User's Manual
Fan Headers
The X7DB8/X7DBE has eight chassis/system
fan headers (Fan1 to Fan8) and two CPU Fans
(Fans 7/8). (*Note: all these fans are 4-pin fans.
However, Pins 1-3 of the fan headers are
backward compatible with the traditional 3-pin
fans.) See the table on the right for pin defi ni-
tions. (*The onboard fan speeds are controlled
by Thermal Management via BIOS Hardware
Monitor in the Advanced Setting. Note: Default:
Disabled, When using Thermal Management
setting, please use all 3-pin fans or all 4-pin
fans on the motherboard.)
Keylock
The keyboard lock connection is designated
JK1. Utilizing this header allows you to inhibit
any actions made on the keyboard, effectively
"locking" it.
Fan Header
Pin Defi nitions (Fan1-8)
Pin# Defi nition
1Ground
2+12V
3Tachometer
4PWR Modulation
Keylock
Pin Defi nitions
Pin# Defi nition
1Ground
2Keylock R-N
F
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
E
Fan5
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
4-Pin
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ZCR
ATX PWR
SEPC
Battery
BIOS
North Bridge
JK1
I
SATA0
SMB
Fan7
G
SATA1
H
JCF1
JWF1
C
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
LE1
320 SCSI Channel A
Fan4
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
A. Fan 1
A
Fan1
B. Fan 2
FP Ctrl
C. Fan 3
D. Fan 4
B
Fan2
E. Fan 5
SPK
F. Fan 6
PW LED
JP1
G. Fan 7 (CPU Fan 1)
JOH1
H. Fan 8 (CPU Fan 2)
I. Keylock
IDE1
DA1
D
2-16
Chapter 2: Installation
ATX PS/2 Keyboard and
PS/2 Mouse Ports
The ATX PS/2 keyboard and the PS/2
mouse are located at JKM1. See the
table on the right for pin defi nitions.
(The mouse port is above the key-
board port. See the table on the right
for pin defi nitions.)
Serial Ports
COM1 is a connector located on the
IO Backpanel and COM2 is a header
located at JCOM2. See the table on
the right for pin defi nitions.
PS/2 Keyboard and
Mouse Port Pin
Defi nitions
Pin# Defi nition
1Data
2NC
3Ground
4VCC
5Clock
6NC
Serial Port Pin Defi nitions
(COM1/COM2)
Pin # Defi nitionPin # Defi nition
1CD6DSR
2RD7RTS
3TD8 CTS
4DTR9RI
5Ground10NC
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
A
B
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
C
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
(Pin 10 is available on COM2
only. NC: No Connection.)
JCF1
JWF1
Fan3
Fan8
JPA3
Floppy
JPA2
8-pin PWR
LE1
SGPIO2
SGPIO1
Compact Flash
320 SCSI Channel A
Fan4
Fan1
FP Ctrl
Fan2
SPK
PW LED
IDE1
DA1
A. Keyboard/Mouse
B. COM1
C. COM2
JP1
JOH1
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-17
X7DB8/X7DBE User's Manual
Wake-On-Ring
The Wake-On-Ring header is desig-
nated JWOR. This function allows
your computer to receive and be
"waken up" by an incoming call to
the modem when the system is in
the suspend state. See the table on
the right for pin defi nitions. You must
have a Wake-On-Ring card and cable
to use this feature.
Wake-On-LAN
The Wake-On-LAN header is located
at JWOL on the motherboard. See the
table on the right for pin defi nitions.
(You must also have a LAN card with
a Wake-On-LAN connector and cable
to use this feature.)
Wake-On-Ring
Pin Defi nitions
(JWOR)
Pin# Defi nition
1Ground
2Wake-up
Wake-On-LAN
Pin Defi nitions
(JWOL)
Pin# Defi nition
1+5V Standby
2Ground
3Wake-up
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
4-Pin
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
A
ZCR
ATX PWR
SEPC
Battery
BIOS
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
IDE1
320 SCSI Channel A
DA1
Fan4
A. WOR
B. WOL
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
B
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-18
Chapter 2: Installation
GLAN 1/2 (Giga-bit Ethernet
Ports)
Two G-bit Ethernet ports are desig-
nated JLAN1 and JLAN2 on the IO
backplane. This port accepts RJ45
type cables.
Power LED/Speaker
On the JD1 header, pins 1-3 are for
a power LED and pins 4-7 are for the
speaker.. See the table on the right
for speaker pin definitions. Note:
The speaker connector pins are for
use with an external speaker. If you
wish to use the onboard speaker, you
should close pins 6-7 with a jumper.
GLAN1
GLAN2
Speaker Connector
Pin Setting Defi nition
Pins 6-7Internal Speaker
Pins 4-7External Speaker
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
A
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
A. GLAN1/2
B. PWR LED/Speaker
Fan1
FP Ctrl
Fan2
B
JP1
JOH1
IDE1
DA1
JCF1
JWF1
Fan3
Fan8
JPA3
Floppy
JPA2
8-pin PWR
SPK
PW LED
LE1
SGPIO2
SGPIO1
Compact Flash
320 SCSI Channel A
Fan4
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-19
X7DB8/X7DBE User's Manual
Power Fault (PWR Supply
Failure)
Connect a cable from your power
supply to the Power Fail (PSF) header
to provide warning of power supply
failure. This warning signal is passed
through the PWR_LED pin to indicate
of a power failure on the chassis.
See the table on the right for pin
defi nitions.
Alarm Reset
PWR Supply Fail LED
Pin Defi nitions
Pin# Defi nition
1PWR 1: Fail
2PWR 2: Fail
3PWR 3: Fail
4Signal: Alarm Reset
Note: This feature is only available when using
Supermicro redundant power supplies.
If three power supplies are installed
and Alarm Reset (JAR) is enabled, the
system will notify you when any of the
three power modules fails. Connect
JAR to a micro-switch to enable you
to turn off the alarm that is activated
when a power module fails. See the
table on the right for pin defi nitions.
4-Pin
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
JCOM2
Fan5
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
PWR
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ZCR
ATX PWR
SEPC
Battery
BIOS
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
PXH
JL1
SMB PS
JAR
B
JBT1
SATA4
SATA2
Alarm Reset
Pin Setting Defi nition
Pin 1Ground
Pin 2+5V
A
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
IDE1
320 SCSI Channel A
DA1
Fan4
PSF
J3P
CPU1
CPU2
South
USB4
USB2/3
SATA5
SATA3
Bridge
WOL
DA2
JPA1
320 SCSI Channel B
SCSI CTRL
J7
A. Power Fault
B. Alarm Reset
2-20
Chapter 2: Installation
Overheat LED/Fan Fail
(JOH1)
The JOH1 header is used to connect
an LED to provide warning of chassis
overheating. This LED will blink to in-
dicate a fan failure. Refer to the table
on right for pin defi nitions.
SMB
A System Management Bus header
is located at J18. Connect the ap-
propriate cable here to utilize SMB on
your system.
Overheat LED
Pin Defi nitions
Pin# Defi nition
15vDC
2OH Active
OH/Fan Fail LED
State Message
SolidOverheat
BlinkingFan Fail
SMB Header
Pin Defi nitions
Pin# Defi nition
1Data
2Ground
3Clock
4No Connection
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
4-Pin
24-Pin
PWR
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ATX PWR
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
B
SMB
Fan7
SATA1
PXH
JL1
SMB PS
JAR
JBT1
SATA4
J7
SATA2
A. OH/Fan Fail LED
B. SMB
Fan1
FP Ctrl
Fan2
JP1
A
JOH1
JCF1
JWF1
Fan3
Fan8
JPA3
Floppy
JPA2
8-pin PWR
LE1
SGPIO2
SGPIO1
Compact Flash
320 SCSI Channel A
Fan4
SPK
PW LED
IDE1
DA1
PSF
J3P
CPU1
CPU2
South
Bridge
USB4
WOL
USB2/3
SATA5
SATA3
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-21
X7DB8/X7DBE User's Manual
Power SMB (I2 C) Connector
Power SMB (I2 C) Connector (J17)
monitors the status of PWR Supply,
Fan and system temperature. See the
table on the right for pin defi nitions.
VGA Connector
A VGA connector (JG1) is located next
to the COM1 port on the IO backplane.
Refer to the board layout below for
the location.
PWR SMB
Pin Defi nitions
Pin# Defi nition
1Clock
2Data
3PWR Fail
4Ground
5+3.3V
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
B
UPER X7DB8/E
S
Slot7
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
4-Pin
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ZCR
ATX PWR
SEPC
Battery
BIOS
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
A
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
SPK
PW LED
LE1
320 SCSI Channel A
Fan4
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
Fan1
FP Ctrl
Fan2
JP1
JOH1
IDE1
DA1
A. PWR SMB
B. VGA
2-22
Compact Flash Card PWR
Connector
A Compact Flash Card Power
Connector is located at JWF1. For
the Compact Flash Card or the Compact
Flash Jumper (JCF1) to work properly,
you will need to connect the Compact
Flash Card power cable to JWF1 fi rst.
Refer to the board layout below for
the location.
SGPIO Headers
There are two SGPIO (Serial General
Purpose Input/Output) headers (J29,
J30) located on the motherboard. These
headers support serial link interfaces for
the onboard SATA and SAS connectors.
See the table on the right for pin
defi nitions. Refer to the board layout
below for the location.
Chapter 2: Installation
Compact Flash Card PWR
Connector
Jumper Defi nition
OnCompact Flash
Power On
OffCompact Flash
Power Off
SGPIO
Pin Defi nitions
Pin# Defi nition Pin Defi nition
1*NC2*NC
3Ground4Data
5Load6Ground
7*NC8*NC
*Note: NC= No Connections
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
JCF1
A
JWF1
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
A. Compact Flash PWR
B. SGPIO1
Fan1
B. SGPIO2
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
C
B
IDE1
320 SCSI Channel A
DA1
Fan4
2-23
X7DB8/X7DBE User's Manual
2-6 Jumper Settings
Explanation of
Jumpers
To modify the operation of the
motherboard, jumpers can be used
to choose between optional settings.
Jumpers create shorts between two
pins to change the function of the
connector. Pin 1 is identifi ed with a
square solder pad on the printed circuit
board. See the motherboard layout
pages for jumper locations.
Note: On two pin jumpers, "Closed"
means the jumper is on and "Open"
means the jumper is off the pins.
Connector
Pins
Jumper
Cap
Setting
3 2 1
3 2 1
Pin 1-2 short
GLAN Enable/Disable
JPL1/JPL2 enable or disable the
GLAN Port1/GLAN Port2 on the
motherboard. See the table on the
right for jumper settings. The default
setting is enabled.
4-Pin
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
A
J28
J27
B
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ZCR
ATX PWR
SEPC
Battery
BIOS
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
SMB PS
JAR
PXH
JL1
JBT1
J7
SATA4
SATA2
GLAN Enable
Pin# Defi nition
1-2Enabled (*default)
2-3Disabled
A. GLAN Port1 Enable
B. GLAN Port2 Enable
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
JOH1
IDE1
DA1
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
LE1
320 SCSI Channel A
Fan4
PSF
J3P
CPU1
CPU2
South
Bridge
USB4
WOL
USB2/3
SATA5
SATA3
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-24
Chapter 2: Installation
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact
pads to prevent the accidental clearing of CMOS. To clear CMOS, use a metal
object such as a small screwdriver to touch both pads at the same time to short
the connection. Always remove the AC power cord from the system before clear-
ing CMOS. Note: For an ATX power supply, you must completely shut down the
system, remove the AC power cord and then short JBT1 to clear CMOS.
Watch Dog Enable/Disable
JWD controls the Watch Dog function. Watch
Dog is a system monitor that can reboot the
system when a software application is “hung
up”. Pins 1-2 will cause WD to reset the sys-
tem if an application is hung up. Pins 2-3 will
generate a non-maskable interrupt signal for
the application that is hung up. See the table
on the right for jumper settings. Watch Dog
must also be enabled in BIOS.
Note: When enabled, the user needs to write
their own application software in order to dis-
able the Watch Dog Timer.
4-Pin
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
B
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
A
SMB
Fan7
SATA1
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
JPA1
WOL
SCSI CTRL
DA2
320 SCSI Channel B
JCF1
JWF1
Watch Dog
Jumper Settings (JWD)
Jumper Setting Defi nition
Pins 1-2Reset
Pins 2-3NMI
OpenDisabled
A. Clear CMOS
B. Watch Dog Enable
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
IDE1
320 SCSI Channel A
DA1
Fan4
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
(*default)
2-25
X7DB8/X7DBE User's Manual
SCSI Controller Enable/
Disable
Jumpe r JPA1 is used to e nable or disab le
the LSI SCSI controller. The default set-
ting is on pins 1-2 to enable SCSI. See
the table on the right for jumper settings.
SCSI Termination Enable/
Disable
Jumpers JPA2/JPA3 are used to enable
or disable termination for SCSI Channel
A (JPA2) and Channel B (JPA3) con-
nectors. The default setting is open to
enable termination. See the table on the
right for jumper settings.
VGA Enable/Disable
Jumper Settings (JPG1)
Jumper Setting Defi nition
Pins 1-2Enabled
Pins 2-3Disabled
SCSI Term. Enable/Disable
Jumper Settings
Jumper Setting Defi nition
OpenEnabled
ClosedDisabled
*Note: In order for the SCSI drives to
function properly, please do not change
the default setting (enabled) set by the
manufacturer.
4-Pin
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
133 MHz
PCI-X
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz ZCR
SEPC
Battery
24-Pin
ATX PWR
BIOS
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
PSF
SMB PS
JAR
JBT1
J7
PXH
SATA4
JL1
SATA2
J3P
USB4
USB2/3
SATA5
SATA3
CPU1
CPU2
South
Bridge
WOL
DA2
A
JPA1
Fan3
Fan8
JCF1
JWF1
JPA3
JPA2
C
B
SCSI CTRL
320 SCSI Channel B
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
A. SCSI Enable
B. SCSI Channel A Termi-
Fan1
nation Enable
FP Ctrl
C. SCSI Channel B Termi-
Fan2
nation Enable
SPK
PW LED
JP1
LE1
JOH1
IDE1
320 SCSI Channel A
DA1
Fan4
2-26
Chapter 2: Installation
3rd PWR Supply PWR Fault
Detect (J3P)
The system can notify you in the event
of a power supply failure. This feature
available when three power supply units
are installed in the chassis with one act-
ing as a backup. If you only have one
or two power supply units installed, you
should disable this (the default setting)
with J3P to prevent false alarms.
VGA Enable/Disable
JPG1 allows you to enable or disable the
VGA port. The default position is on pins
1 and 2 to enable VGA. See the table
on the right for jumper settings.
3rd PWR Supply PWR Fault
Jumper Settings
Jumper Setting Defi nition
ClosedEnabled
Open Disabled (*Default)
SCSI Enable/Disable
Jumper Settings (JPA1)
Both Jumpers Defi nition
Pins 1-2Enabled
Pins 2-3Disabled
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
B
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
A. 3rd PWR Fail
B. VGA Enabled
JCF1
JWF1
Fan3
Fan8
JPA3
Floppy
JPA2
8-pin PWR
LE1
SGPIO2
SGPIO1
Compact Flash
320 SCSI Channel A
Fan4
Fan1
FP Ctrl
Fan2
SPK
PW LED
IDE1
DA1
JP1
JOH1
PSF
SMB PS
J3P
A
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-27
X7DB8/X7DBE User's Manual
Compact Flash Master/Slave
Select
A Compact Flash Master (Primary)/
Slave (Secondary) Select Jumper is
located at JCF1. Close this jumper to
enable Compact Flash Card. For the
Compact Flash Card or the Compact
Flash Jumper (JCF1) to work properly,
you will need to connect the Compact
Flash Card power cable to JWF1 fi rst.
Refer to the board layout below for the
location.
I2C Bus to PCI-X/PCI-Exp.
Slots
Jumpers J27, J28 allow you to connect
the System Management Bus (I2C) to
PCI-X/PCI-E slots
is "Open" to disable the connection.
See the table on the right for jumper
settings.
. The default setting
Compact Flash Card Master/
Slave Select
Jumper Defi nition
OpenSlave (Secondary)
ClosedMaster (Primary)
I2C to PCI-S/PCI/Exp
Jumper Settings
Jumper Setting Defi nition
ClosedEnabled
Open Disabled (*Default)
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
4-Pin
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ATX PWR
SEPC
Battery
BIOS
B
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
A. Compact Flash Master/
Slave Select
Fan1
B. SMBus to PCI slots
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
IDE1
320 SCSI Channel A
DA1
Fan4
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
USB4
USB2/3
SATA5
SATA4
JL1
SATA2
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
A
2-28
Chapter 2: Installation
2-7 Onboard Indicators
GLAN LEDs
There are two GLAN ports on the
motherboard. Each Gigabit Ether-
net LAN port has two LEDs. The
green LED indicates activity, while
the power LED may be green, am-
ber or off to indicate the speed of
the connection. See the tables at
right for more information.
Activity
LED
Link
LED
GLAN Activity Indicator
Color Status Defi nition
AmberFlashingActive
GLAN Link Indicator
LED Color Defi nition
OffNo Connection or 10 Mbps
Green100 Mbps
Amber1 Gbps
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
A
B
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
C
JK1
SATA0
SMB
Fan7
SATA1
A. GLAN Port1 LEDs
B. GLAN Port2 LEDs
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
LE1
JOH1
IDE1
320 SCSI Channel A
DA1
Fan4
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-29
X7DB8/X7DBE User's Manual
Onboard SCSI Activity LED
Indicators (*X7DB8 only)
There are two Onboard SCSI Activity LED
indicators on the X7DB8. DA1 indicates
the activity status of SCSI Channel A, and
DA2 indicates the activity status of SCSI
Channel B.
Onboard Power LED
There is an Onboard Power LED located
on the motherboard. When this LED is lit,
the system is on. Be sure to turn off the
system and unplug the power cord before
removing or installing components. See
the layout below for the LED location.
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
4-Pin
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ZCR
ATX PWR
SEPC
Battery
BIOS
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
SMB PS
JAR
PSF
J3P
CPU1
8-pin PWR
C
CPU2
JBT1
J7
PXH
USB4
USB2/3
SATA5
SATA4
JL1
SATA2
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
B
JPA1
320 SCSI Channel B
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
Floppy
SGPIO2
SGPIO1
Compact Flash
A. SCSI Channel A Activ-
ity LED
Fan1
B. SCSI Channel B Activ-
FP Ctrl
ity LED
Fan2
C. Onboard PWR LED
SPK
PW LED
JP1
LE1
JOH1
IDE1
320 SCSI Channel A
DA1
A
Fan4
2-30
Chapter 2: Installation
2-8 Parallel Port, Floppy Drive, Hard Disk Drive, SIMLP
IPMI and SCSI Connections
Note the following when connecting the fl oppy and hard disk drive cables:
• The fl oppy disk drive cable has seven twisted wires.
• A red mark on a wire typically designates the location of pin 1.
• A single fl oppy disk drive ribbon cable has 34 wires and two connectors to provide
for two fl oppy disk drives. The connector with twisted wires always connects to
drive A, and the connector that does not have twisted wires always connects to
drive B.
Parallel (Printer) Port
Connector
The parallel (printer) port is located
on the IO Back Panel. See the table
on the right for pin defi nitions.
Pin# Defi nition Pin # Defi nition
1Strobe-2Auto Feed-
3Data Bit 04Error-
5Data Bit 16Init-
7Data Bit 28SLCT IN-
9Data Bit 310GND
11Data Bit 412GND
13Data Bit 514GND
15Data Bit 616GND
17Data Bit 718GND
19ACK20GND
21BUSY22Write Data
23PE24Write Gate
25SLCT26NC
Parallel (Printer) Port Connector
Pin Defi nitions
KB/
Mouse
USB0/1
COM1
Fan6
A
Parrallel
Port
JLAN1
VGA
GLAN1
GLAN2
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
S I/O
Slot1
JCOM2
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
JCF1
JWF1
Fan3
Fan8
JPA3
Floppy
JPA2
8-pin PWR
LE1
SGPIO2
SGPIO1
Compact Flash
320 SCSI Channel A
Fan4
Fan1
FP Ctrl
Fan2
SPK
PW LED
IDE1
DA1
A. Parallel Port
JP1
JOH1
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-31
X7DB8/X7DBE User's Manual
Floppy Connector
The fl oppy connector is located next
to the compact fl ash card slot. See
the table below for pin defi nitions.
SIMLP IPMI Slot
There is a SIM Low Profile
IPMI Slot on the motherboard.
Refer to the layout below for
the IPMI Slot location.
Floppy Drive Connector
Pin Defi nitions (Floppy)
Pin# Defi nition Pin # Defi nition
1Ground2FDHDIN
3Ground4Reserved
5Key6FDEDIN
7Ground8Index
9Ground10Motor Enable
11Ground12Drive Select B
13Ground14Drive Select B
15Ground16Motor Enable
17Ground18DIR
19Ground20STEP
21Ground22Write Data
23Ground24Write Gate
25Ground26Track 00
27Ground28Write Protect
29Ground30Read Data
31Ground32Side 1 Select
33Ground34Diskette
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
B
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
Fan5
®
SIMLP IPMI
JPG1
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
4-Pin
24-Pin
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
ZCR
ATX PWR
SEPC
Battery
BIOS
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
Fan1
FP Ctrl
Fan2
SPK
PW LED
JP1
JOH1
IDE1
DA1
A. Floppy
B. SIMLP IPMI
JCF1
JWF1
Fan3
Fan8
JPA3
JPA2
A
8-pin PWR
Floppy
SGPIO2
SGPIO1
Compact Flash
LE1
320 SCSI Channel A
Fan4
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-32
Chapter 2: Installation
IDE Connectors
There are two IDE Connectors (JIDE1:
Blue, JIDE2: White) on the mother-
board. The blue IDE connector (JIDE1)
is designated as the Primary IDE Drive.
The white IDE connector (JIDE2) is des-
ignated as the Secondary IDE Drive,
reserved for Compact Flash Card use
only. (See the note below.) See the
table on the right for pin defi nitions.
*Note: JIDE2 (the white slot) is reserved
for Compact Flash Card only. Do not
use it for other devices. If JIDE2 is
populated with a Compact Flash Card,
JIDE1 (the blue slot) will be available for
one device only. For the Compact Flash
Card to work properly, you will need to
connect a power cable to JWF1 fi rst.
IDE Drive Connectors
Pin Defi nitions
Pin# Defi nition Pin # Defi nition
1Reset IDE2Ground
3Host Data 74Host Data 8
5Host Data 66Host Data 9
7Host Data 58Host Data 10
9Host Data 410Host Data 11
11Host Data 312Host Data 12
13Host Data 214Host Data 13
15Host Data 116Host Data 14
17Host Data 018Host Data 15
19Ground20Key
21DRQ322Ground
23I/O Write24Ground
25I/O Read26Ground
27IOCHRDY28BALE
29DACK330Ground
31IRQ1432IOCS16
33Addr134Ground
35Addr036Addr2
37Chip Select 038Chip Select 1
39Activity40Ground
KB/
Mouse
USB0/1
COM1
Parrallel
VGA
GLAN1
GLAN2
S I/O
JCOM2
Fan6
Port
JLAN1
UPER X7DB8/E
S
Slot7
JPG1
Slot6
VGA
Slot5
CTRL
Slot4
Slot3
LAN
JPL1
CTRL
JPL2
Slot2
Slot1
4-Pin
Fan5
PWR
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 1B (Bank 1)
®
SIMLP IPMI
PCI-Exp x8
PCI-Exp x8
PCI-Exp x4
JWD
PCI-X 133 MHz
J28
J27
PCI-X 133 MHz
JWOR
PCI-X 100 MHz
24-Pin
ATX PWR
DIMM 1A (Bank 1)
SEPC
Battery
BIOS
ZCR
North Bridge
JK1
SATA0
SMB
Fan7
SATA1
JCF1
JWF1
Fan3
Fan8
JPA3
Floppy
JPA2
8-pin PWR
LE1
SGPIO2
SGPIO1
B
Compact Flash
320 SCSI Channel A
Fan4
Fan1
FP Ctrl
A. IDE#1
Fan2
B. Compact Flash Card
SPK
PW LED
JP1
JOH1
A
IDE1
DA1
PSF
SMB PS
J3P
JAR
CPU1
CPU2
JBT1
J7
PXH
SATA4
JL1
SATA2
USB4
USB2/3
SATA5
SATA3
South
Bridge
WOL
SCSI CTRL
DA2
JPA1
320 SCSI Channel B
2-33
X7DB8/X7DBE User's Manual
Ultra 320 SCSI
Connectors (*X7DB8
only)
There are two SCSI
connectors on the
motherboard. SCSI
Channel A is located at
JA1, and SCSI Channel B
is located at JA2. Refer
to the table below for the
pin defi nitions of the Ultra
320 SCSI connectors
located at JA1 and JA2.
A. SCSI Channel A
B. SCSI Channel B
JLAN1
Pin# Defi nition Pin # Defi nition
1+DB (12)35-DB (12)
2+DB (13)36-DB (13)
3+DB (14)37-DB (14)
4+DB (15)38-DB (15)
5+DB (P1)39-DB (P1)
6+DB (0)40-DB (0)
7+DB (1)41-DB (1)
8+DB (2)42-DB (2)
9+DB (3)43-DB (3)
10+DB (4)44-DB (4)
11+DB (5)45-DB (5)
12+DB (6)46-DB (6)
13+DB (7)47-DB (7)
14+DB (P)48-DB (P)
15Ground49Ground
16DIFFSENS50Ground
17TERMPWR51TERMPWR
18TERMPWR52TERMPWR
19Reserved53Reserved
20Ground54Ground
21+ATN55-ATN
22Ground56Ground
23+BSY57-BSY
24+ACK58-ACK
25+RST59-RST
26+MSG60-MSG
27+SEL61-SEL
28+C/D62-C/D
29+REQ63-REQ
30+I/O64-I/O
31+DB (8)65-DB (8)
32+DB (9)66-DB (9)
33+DB (10)67-DB (10)
34+DB (11)68-DB (11)
Ultra320 SCSI Drive Connector
Pin Defi nitions (J28)
UPER X7
S
®
DB8/E
A
B
2-34
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Note: Always disconnect the power cord before adding, changing or installing
any hardware components.
Before Power On
1. Make sure no short circuits exist between the motherboard and chassis.
2. Disconnect all ribbon/wire cables from the motherboard, including those for the
keyboard and mouse.
3. Remove all add-on cards.
4. Install one CPU (making sure it is fully seated) and connect the chassis speaker
and the power LED to the motherboard. (Check all jumper settings as well.)
5. Use only the correct type of CMOS onboard battery as recommended by the
Manufacturer. Do not install the onboard battery upside down to avoid pos-
sible explosion.
No Power
1. Make sure no short circuits exist between the motherboard and the chassis.
2. Verify that all jumpers are set to their default positions.
3. Check that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on but you have no video, remove all the add-on cards and
cables.
2. Use the speaker to determine if any beep codes exist. Refer to the Appendix
for details on beep codes.
Losing the System’s Setup Confi guration
1. Ensure that you are using a high quality power supply. A poor quality power
supply may cause the system to lose the CMOS setup information. Refer to
Section 1-6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies
3-1
X7DB8/X7DBE User's Manual
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fi x the Setup Confi guration problem, contact your
vendor for repairs.
NOTE
If you are a system integrator, VAR or OEM, a POST diagnostics
card is recommended. For I/O port 80h codes, refer to App. B.
Memory Errors
1. Make sure the DIMM modules are properly and fully installed.
2. Determine if different speeds of DIMMs have been installed and verify that the
BIOS setup is confi gured for the fastest speed of RAM used. It is recom-
mended to use the same RAM speed for all DIMMs in the system.
3. Make sure you are using the correct type of DDR2 Fully Buffered (FBD) ECC
533/667 SDRAM (*recommended by the manufacturer.)
4. Check for bad DIMM modules or slots by swapping a single module between
four slots and noting the results.
5. Make sure all memory modules are fully seated in their slots. As an interleaved
memory scheme is used, you must install two modules at a time, beginning
with Bank 1, then Bank 2, and so on (see Section 2-3).
6. Check the position of the 115V/230V switch on the power supply.
3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, note
that as a motherboard manufacturer, Super Micro does not sell directly to end-us-
ers, so it is best to fi rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specifi c system
confi guration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our web site
(http://www.supermicro.com/TECHSUPPORT/techsupport.htm) before con-
tacting Technical Support.
2. BIOS upgrades can be downloaded from our web site at
This setting allows the user to enable or disable the function of Parallel ATA. The
options are Disabled, Channel 0, Channel 1, and Both.
Serial ATA
This setting allows the user to enable or disable the function of Serial ATA. The
options are Disabled and Enabled.
Native Mode Operation
Select the native mode for ATA. The options are: Parallel ATA, Serial ATA,
Both, and Auto.
SATA Controller Mode
Select Compatible to allow the SATA and PATA drives to be automatically-detected
and be placed in the Legacy Mode by the BIOS. Select Enhanced to allow the
SATA and PATA drives to be to be automatically-detected and be placed in the
Native IDE Mode. (*Note: The Enhanced mode is supported by the Windows
2000 OS or a later version.)
When the SATA Controller Mode is set to "Enhanced", the following items will
display:
Serial ATA (SATA) RAID Enable
Select Enable to enable Serial ATA RAID Functions. (*For the Windows OS
environment, use the RAID driver if this feature is set to Enabled. When this item
is set to Enabled, the item: "ICH RAID Code Base" will be available for you to
select either Intel or Adaptec Host RAID fi rmware to be activated. If this item is
set to Disabled, the item-SATA AHCI Enable will be available.) The options are
Enabled and Disabled.
ICH RAID Code Base
Select Intel to enable Intel's SATA RAID fi rmware. Select Adaptec to use Adaptec's
HostRAID fi rmware. The options are Intel and Adaptec.
SATA AHCI
Select Enable to enable the function of Serial ATA Advanced Host Interface. (*Take
caution when using this function. This feature is for advanced programmers only.
The options are Enabled and Disabled.)
4-6
Chapter 4: BIOS
System Memory
This display informs you how much system memory is recognized as being present
in the system.
Extended Memory
This display informs you how much extended memory is recognized as being
present in the system.
4-4 Advanced Setup
Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. The items with a triangle beside them have sub
menus that can be accessed by highlighting the item and pressing <Enter>.
4-7
X7DB8/X7DBE User's Manual
Boot Features
Access the submenu to make changes to the following settings.
Quick Boot Mode
If enabled, this feature will speed up the POST (Power On Self Test) routine by
skipping certain tests after the computer is turned on. The settings are Enabled
and Disabled. If Disabled, the POST routine will run at normal speed.
Quiet Boot
This setting allows you to Enable or Disable the graphic logo screen during
boot-up.
ACPI Mode
Use the setting to determine if you want to employ ACPI (Advanced Confi guration
and Power Interface) power management on your system. The options are
Yes and No.
Power Button Behavior
If set to Instant-Off, the system will power off immediately as soon as the user
hits the power button. If set to 4-sec., the system will power off when the user
presses the power button for 4 seconds or longer. The options are instant-off
and 4-sec override.
Resume On Modem Ring
Select On to “wake your system up” when an incoming call is received by
your modem. The options are On and Off.
Power Loss Control
This setting allows you to choose how the system will react when power returns
after an unexpected loss of power. The options are Stay Off, Power On, and
Last State.
Watch Dog
If enabled, this option will automatically reset the system if the system is not
active for more than 5 minutes. The options are Enabled and Disabled.
Summary Screen
This setting allows you to Enable or Disable the summary screen which displays
the system confi guration during bootup.
4-8
Chapter 4: BIOS
Memory Cache
Cache System BIOS Area
This setting allows you to designate a reserve area in the system memory to be
used as a System BIOS buffer to allow the BIOS write (cache) its data into this
reserved memory area. Select "Write Protect" to enable this function, and this
area will be reserved for BIOS ROM access only. Select "Uncached" to disable this
function and make this area available for other devices.
Cache Video BIOS Area
This setting allows you to designate a reserve area in the system memory to be
used as a Video BIOS buffer to allow the BIOS write (cache) its data into this
reserved memory area. Select "Write Protect" to enable the function and this area
will be reserved for Video BIOS ROM access only. Select "Uncached" to disable
this function and make this area available for other devices.
Cache Base 0-512K
If enabled, this feature will allow the data stored in the base memory area: block
0-512K to be cached (written) into a buffer, a storage area in the Static DROM
(SDROM) or to be written into L1, L2 cache inside the CPU to speed up CPU
operations . Select "Uncached" to disable this function. Select "Write Through" to
allow data to be cached into the buffer and written into the system memory at
the same time. Select "Write Protect" to prevent data from being written into the
base memory area of Block 0-512K. Select "Write Back" to allow CPU to write data
back directly from the buffer without writing data to the System Memory for fast
CPU data processing and operation. The options are Uncached, Write Through,
Write Protect, and Write Back.
Cache Base 512K-640K
If enabled, this feature will allow the data stored in the memory area: 512K-640K
to be cached (written) into a buffer, a storage area in the Static DROM (SDROM)
or written into L1, L2, L3 cache inside the CPU to speed up CPU operations .
Select "Uncached" to disable this function. Select "Write Through" to allow data to
be cached into the buffer and written into the system memory at the same time.
Select "Write Protect" to prevent data from being written into the base memory
area of Block 512-640K. Select "Write Back" to allow CPU to write data back
directly from the buffer without writing data to the System Memory for fast CPU
data processing and operation. The options are Uncached, Write Through, Write
Protect, and Write Back.
Cache Extended Memory
If enabled, this feature will allow the data stored in the extended memory area to
be cached (written) into a buffer, a storage area in the Static DROM (SDROM)
or written into L1, L2, L3 cache inside the CPU to speed up CPU operations.
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X7DB8/X7DBE User's Manual
Select "Uncached" to disable this function. Select "Write Through" to allow data
to be cached into the buffer and written into the system memory at the same
time. Select "Write Protect" to prevent data from being written into the base
memory area of Block 0-512K. Select "Write Back" to allow CPU to write data back
directly from the buffer without writing data to the System Memory for fast CPU
data processing and operation. The options are Uncached, Write Through, Write
Protect, and Write Back.
Discrete MTRR Allocation
If enabled, MTRRs (-Memory Type Range Registers) are confi gured as distinct,
separate units and cannot be overlapped. If enabled, the user can achieve better
graphic effects when using a Linux graphic driver that requires the write-combining
confi guration with 4GB or more memory. The options are Enabled and Disabled.
PCI Confi guration
Access the submenu to make changes to the following settings for PCI devices.
Onboard GLAN1/Onboard GLAN2 (Gigabit- LAN) OPROM Confi gure
Enabling this option provides the capability to boot from GLAN. The options are
Disabled and Enabled.
Onboard SCSI OPROM Confi gure
Enabling this option provides the capitally to boot from SCSI HDD. The options
are Disabled and Enabled.
PCI Parity Error Forwarding
The feature allows SERR and PERR errors detected in PCI slots to be sent
(forwarded) to the BIOS DMI Event Log for the user to review. The options are
Enabled and Disabled.
Reset Confi guration Data
If set to Yes, this setting clears the Extended System Confi guration Data- (ESCD)
area. The options are Yes and No.
Frequency for PCI-X#1, PCI-X#2, PCI-X#3
This option allows the user to change the bus frequency for the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
MHz, PCI-X 100 MHz, and PCI-X 133 MHz.
Frequency for PCI-X#1 On Riser, Frequency for PCI-X#2-#3 On Riser
(*Available when an Active Riser Card is present.)
This option allows the user to change the bus frequency of the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
Access the submenu for each of the settings above to make changes to the
following:
Option ROM Scan
When enabled, this setting will initialize the device expansion ROM. The options
are Enabled and Disabled.
Enable Master
This setting allows you to enable the selected device as the PCI bus master.
The options are Enabled and Disabled.
Latency Timer
This setting allows you to set the clock rate for Bus Master. A high-priority, high-
throughout device may benefi t from a greater clock rate. The options are Default,
0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and
other Operating Systems, please select the option: other. If a drive fails after
the installation of a new software, you might want to change this setting and
try again. A different OS requires a different Bus Master clock rate.
Large Disk Access Mode
This setting determines how large hard drives are to be accessed. The options are
DOS or Other (for Unix, Novelle NetWare and other operating systems).
Advanced Chipset Control
Access the submenu to make changes to the following settings.
*Warning: Take Caution when changing the Advanced settings. Incorrect
values entered may cause system malfunction. Also, a very high DRAM
frequency or incorrect DRAM timing may cause system instability. When this
occurs, revert to the default setting.
SERR Signal Condition
This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.
4GB PCI Hole Granularity
This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs
are not enough, this option may be used to reduce MTRR occupation. The options
are: 256 MB, 512 MB, 1GB and 2GB.
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X7DB8/X7DBE User's Manual
Memory Branch Mode
This option determines how the two memory branches operate. System address
space can either be interleaved between the two branches or Sequential from one
branch to another. Mirror mode allows data correction by maintaining two copies
of data in two branches. Single Channel 0 allows a single DIMM population during
system manufacturing. The options are Interleave, Sequential, Mirroring, and
Single Channel 0.
Branch 0 Rank Sparing
Select enable to enable the sparing feature for Branch 0 Rank. The options are
Enabled and Disabled.
Branch 1 Rank Sparing
Select enable to enable the sparing feature for Branch 0 Rank. The options are
Enabled and Disabled.
Enhanced x8 Detection
Select Enabled to enable Enhanced x8 DRAM UC Error Detection. The options
are Disabled and Enabled.
Crystal Beach Features
This feature cooperates with Intel I/O AT (Acceleration Technology) to accelerate
the performance of TOE devices. (*Note: A TOE device is a specialized,
dedicated processor that is installed on an add-on card or a network card to
handle some or all packet processing of this add-on card. For the X7DB8/E,
the TOE device is built inside the ESB 2 South Bridge chip.) The options are
Enabled and Disabled.
Route Port 80h Cycles to
This feature allows the user to decide which bus to send debug information to. The
options are Disabled, PCI and LPC.
Clock Spectrum Feature
If Enabled, the BIOS will monitor the level of Electromagnetic Interference caused
by the components and will attempt to decrease the interference whenever needed.
The options are Enabled and Disabled.
Enabling Multi-Media Timer
Select Yes to activate a set of timers that are alternative to the traditional 8254
timers for the OS use. The options are Yes and No.
USB Function
Select Enabled to enable the function of USB devices specifi ed. The settings are
Enabled and Disabled.
Legacy USB Support
This setting allows you to enable support for Legacy USB devices. The settings
are Enabled and Disabled.
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Chapter 4: BIOS
Advanced Processor Options
Access the submenu to make changes to the following settings.
CPU Speed
This is a display that indicates the speed of the installed processor.
Frequency Ratio (*Available when supported by the CPU.)
The feature allows the user to set the internal frequency multiplier for the CPU.
The options are: Default, x12, x13, x14, x15, x16, x17 and x18.
Hyper-threading (*Available when supported by the CPU.)
Set to Enabled to use the Hyper-Threading Technology, which will result in increased
CPU performance. The options are Disabled and Enabled.
Core-Multi-Processing (*Available when supported by the CPU.)
Set to Enabled to use a processor's Second Core and beyond. (Please refer to
Intel's web site for more information.) The options are Disabled and Enabled.
Machine Checking (*Available when supported by the CPU.)
Set to Enabled to activate the function of Machine Checking and allow the CPU to
detect and report hardware (machine) errors via a set of model-specifi c registers
(MSRs). The options are Disabled and Enabled.
Thermal Management 2 (*Available when supported by the CPU.)
Set to Enabled to use Thermal Management 2 (TM2) which will lower CPU voltage
and frequency when the CPU temperature reaches a predefi ned overheat threshold.
Set to Disabled to use Thermal Manager 1 (TM1), allowing CPU clocking to be
regulated via CPU Internal Clock modulation when the CPU temperature reaches
the overheat threshold.
C1 Enhanced Mode (*Available when supported by the CPU.)
Set to Enabled to enable Enhanced Halt State to lower CPU voltage/frequency to
prevent overheat. The options are Enabled and Disabled. (*Note: please refer
to Intel’s web site for detailed information.)
No Execute Mode Memory Protection (*Available when supported by the
CPU and the OS.)
Set to Enabled to enable Execute Disable Bit and allow the processor to classify
areas in memory where an application code can execute and where it cannot, and
thus preventing a worm or a virus from inserting and creating a fl ood of codes to
overwhelm the processor or damage the system during an attack.
(*Note: this feature is available when your OS and your CPU support the function
of Execute Disable Bit.) The options are Disabled and Enabled. (Note: For more
information regarding hardware/software support for this function, please refer to
Intel's and Microsoft's web sites.)
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X7DB8/X7DBE User's Manual
Adjacent Cache Line Prefetch (*Available when supported by the CPU.)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.
Hardware Prefetch (*Available when supported by the CPU.)
Set to this option to enabled to enable the hardware components that are used in
conjunction with software programs to prefetch data in order to shorten execution
cycles and maximize data processing effi ciency. The options are Disabled and
Enabled.
PECI Absent Alarm (*Available when supported by the CPU.)
If set to Enabled, the PECI Absent Alarm will be activated if the function of PECI
(Platform Environment Control Interface) is not available for the onboard process(s)
or for the motherboard. The options are Disabled and Enabled.
Intel <R> Virtualization Technology (*Available when supported by
the CPU.)
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creating
multiple "virtual" systems in one physical computer. The options are Enabled and
Disabled. (*Note: If there is any change to this setting, you will need to power off
and restart the system for the change to take effect.) Please refer to Intel’s web
site for detailed information.
Intel EIST Support (*Available when supported by the CPU.)
Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the
system to automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. The options are Enabled and
Disabled. Please refer to Intel’s web site for detailed information.
I/O Device Confi guration
Access the submenu to make changes to the following settings.
KBC Clock Input
This setting allows you to select clock frequency for KBC. The options are 6MHz,
8MHz, 12MHz, and 16MHz.
Serial Port A
This setting allows you to assign control of serial port A. The options are Enabled
(user defi ned), Disabled, and Auto (BIOS- or OS- controlled).
Base I/O Address
This setting allows you to select the base I/O address for serial port A. The options
are 3F8, 2F8, 3E8, and 2E8.
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Chapter 4: BIOS
Interrupt
This setting allows you to select the IRQ (interrupt request) for serial port A. The
options are IRQ3 and IRQ4.
Serial Port B
This setting allows you to assign control of serial port B. The options are Enabled
(user defi ned), Disabled, Auto (BIOS controlled) and OS Controlled.
Mode
This setting allows you to set the type of device that will be connected to serial
port B. The options are Normal and IR (for an infrared device).
Base I/O Address
This setting allows you to select the base I/O address for serial port B. The
options are 3F8, 2F8, 3E8 and 2E8.
Interrupt
This setting allows you to select the IRQ (interrupt request) for serial port B. The
options are IRQ3 and IRQ4.
Parallel Port
This setting allows you to assign control of the parallel port. The options are
Enabled (user defi ned), Disabled and Auto (BIOS-or OS- controlled).
Base I/O Address
Select the base I/O address for the parallel port. The options are 378, 278 and
3BC.
Interrupt
This setting allows you to select the IRQ (interrupt request) for the parallel port.
The options are IRQ5 and IRQ7.
Mode
This feature allows you to specify the parallel port mode. The options are Output
only, Bi-Directional, EPP and ECP.
DMA Channel
This item allows you to specify the DMA channel for the parallel port. The options
are DMA1 and DMA3.
Floppy Disk Controller
This setting allows you to assign control of the fl oppy disk controller. The options
are Enabled (user defi ned), Disabled, and Auto (BIOS and OS controlled).
Base I/O Address
This setting allows you to select the base I/O address for the Floppy port. The
options are Primary and Secondary.
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X7DB8/X7DBE User's Manual
DMI Event Logging
Access the submenu to make changes to the following settings.
Event Log Validity
This is a display to inform you of the event log validity. It is not a setting.
Event Log Capacity
This is a display to inform you of the event log capacity. It is not a setting.
View DMI Event Log
Highlight this item and press <Enter> to view the contents of the event log.
Event Logging
This setting allows you to Enable or Disable event logging.
ECC Event Logging
This setting allows you to Enable or Disable ECC event logging.
Mark DMI Events as Read
Highlight this item and press <Enter> to mark the DMI events as read.
Clear All DMI Event Logs
Select Yes and press <Enter> to clear all DMI event logs. The options are Yes
and No.
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Chapter 4: BIOS
Console Redirection
Access the submenu to make changes to the following settings.
COM Port Address
This item allows you to specify to redirect the console to Onboard COM A or
Onboard COM B. This setting can also be Disabled.
BAUD Rate
This item allows you to select the BAUD rate for console redirection. The options
are 300, 1200, 2400, 9600, 19.2K, 38.4K, 57.6K, and 115.2K.
Console Type
This item allows you to choose from the available options to select the console
type for console redirection. The options are VT100, VT100,8bit, PC-ANSI, 7bit,
PC ANSI, VT100+,
and VT-UTF8.
Flow Control
This item allows you to choose from the available options to select the fl ow control
for console redirection. The options are: None, XON/XOFF, and CTS/RTS.
Console Connection
This item allows you to choose select the console connection: either Direct or
Via Modem.
Continue CR after POST
Choose whether to continue with console redirection after the POST routine.
The options are On and Off.
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X7DB8/X7DBE User's Manual
Hardware Monitor Logic
*Note: The Phoenix BIOS will automatically detect the type of CPU(s)
and hardware monitoring chip used on the motherboard and will display
the Hardware Monitoring Screen accordingly. Your Hardware Monitoring
Screen may look like the one shown on this page, on P. 4-19, or on P. 4-20,
depending on the type of CPU(s) and HW Monitoring chip you are using.
CPU Temperature Threshold
This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature
threshold. The options are 70
Highlight this and hit <Enter> to see monitor data for the following items:
CPU1 Temperature
CPU1 Second Core
CPU2 Temperature
CPU2 Second Core
o
C, 75oC, 80oC and 85oC.
System Temperature
Fan1-Fan8 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will
automatically display the status of the fans indicated in this item.
Fan Speed Control Modes
This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When
the CPU on-die temperature increases, the fan speed will also increase, and vise
versa. If the option is set to “3-pin fan”, the fan speed is controlled by voltage.
If the option is set to “4-pin”, the fan speed will be controlled by Pulse Width
Modulation (PWM). Select “3-pin” if your chassis came with 3-pin fan headers.
Select “4-pin” if your chassis came with 4-pin fan headers. Select “Workstation”
if your system is used as a Workstation. Select “Server” if your system is used
as a Server. Select “Disable” to disable the fan speed control function to allow
the onboard fans to run at the full speed (12V) at all the time. The Options are:
CPU Temperature Threshold (*See the Note on Page 4-18.)
This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature
threshold. The options are 70
Highlight this and hit <Enter> to see monitor data for the following items:
CPU1 Temperature
CPU1 Second Core
CPU2 Temperature
CPU2 Second Core
System Temperature
Fan1-Fan8 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will
automatically display the status of the fans indicated in this item.
o
C, 75oC, 80oC and 85oC.
Fan Speed Control Modes
This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When
the CPU on-die temperature increases, the fan speed will also increase, and vise
versa. If the option is set to “3-pin fan”, the fan speed is controlled by voltage.
If the option is set to “4-pin”, the fan speed will be controlled by Pulse Width
Modulation (PWM). Select “3-pin” if your chassis came with 3-pin fan headers.
Select “4-pin” if your chassis came with 4-pin fan headers. Select “Workstation”
if your system is used as a Workstation. Select “Server” if your system is used
as a Server. Select “Disable” to disable the fan speed control function to allow
the onboard fans to run at the full speed (12V) at all the time. The Options are:
The following items will be monitored and displayed:
Vcore A
Vcore B
-12V
P1V5
+3.3V
+12V
5Vsb
5VDD
P_VTT
Vbat
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X7DB8/X7DBE User's Manual
Hardware Monitor Logic (*See the Note on Page 4-18.)
CPU Temperature Threshold
This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature
threshold. The hardcode default setting is 72
o
C.
Temperature Monitoring
Highlight this and hit <Enter> to see monitor data for the following items:
PECI Agent 1 Temperature
PECI Agent 2 Temperature
PECI Agent 3 Temperature
PECI Agent 4 Temperature
System Temperature
Fan1-Fan8 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will
automatically display the status of the fans indicated in this item.
Fan Speed Control Modes
This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When
the CPU on-die temperature increases, the fan speed will also increase, and vise
versa. If the option is set to “3-pin fan”, the fan speed is controlled by voltage.
If the option is set to “4-pin”, the fan speed will be controlled by Pulse Width
Modulation (PWM). Select “3-pin” if your chassis came with 3-pin fan headers.
Select “4-pin” if your chassis came with 4-pin fan headers. Select “Workstation”
if your system is used as a Workstation. Select “Server” if your system is used
as a Server. Select “Disable” to disable the fan speed control function to allow
the onboard fans to run at the full speed (12V) at all the time. The Options are:
The following items will be monitored and displayed:
Vcore A:
Vcore B:
-12V
P1V2_NIC_SEN
+3.3V
+12V
5Vsb
5VDD
P_VTT
Vbat
4-20
Chapter 4: BIOS
IPMI (The option is available only when an IPMI card is installed
in the system.)
IPMI Specifi cation Version:
This item displays the current IPMI Version.
Firmware Version: This item displays the current Firmware Version.
System Event Logging
Select Enabled to enable IPMI Event Logging. When this function is set to
Disabled, the system will continue to log events received via system interface.
The options are Enabled and Disabled.
Clear System Event Logging
Enabling this function to force the BIOS to clear the system event logs during the
next cold boot. The options are Enabled and Disabled.
Existing Event Log Number
This item displays the number of the existing event log.
Event Log Control
System Firmware Progress
Enabling this function to log POST progress. The options are Enabled and
Disabled.
BIOS POST Errors
Enabling this function to log POST errors. The options are Enabled and
Disabled.
BIOS POST Watch Dog
Set to Enabled to enable POST Watch Dog. The options are Enabled and
Disabled.
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X7DB8/X7DBE User's Manual
OS Boot Watch Dog
Set to Enabled to enable OS Boot Watch Dog. The options are Enabled and
Disabled.
Timer for Loading OS (Minutes)
This feature allows the user to set the time value (in minutes) for the previous
item: OS Boot Watch Dog by keying-in a desired number in the blank. The
default setting is 10 (minutes.) (Please ignore this option when OS Boot Watch
Dog is set to "Disabled".)
Time Out Option
This feature allows the user to determine what action to take in an event of a
system boot failure. The options are No Action, Reset, Power Off and Power
Cycles.
System Event Log/System Event Log (List Mode)
These options display the System Event (SEL) Log and System Event (SEL) Log
in List Mode. Items include: SEL (System Event Log) Entry Number, SEL Record
ID, SEL Record Type, Time Stamp, Generator ID, SEL Message Revision,
Sensor Type, Sensor Number, SEL Event Type, Event Description, and SEL
Event Data.
4-22
Chapter 4: BIOS
Realtime Sensor Data
This feature display information from motherboard sensors, such as
temperatures, fan speeds and voltages of various components.
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X7DB8/X7DBE User's Manual
4-5 Security
Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow
keys. You should see the following display. Security setting options are displayed
by highlighting the setting using the arrow keys and pressing <Enter>. All Security
BIOS settings are described in this section.
Supervisor Password Is:
This displays whether a supervisor password has been entered for the system.
Clear means such a password has not been used and Set means a supervisor
password has been entered for the system.
User Password Is:
This displays whether a user password has been entered for the system. Clear
means such a password has not been used and Set means a user password has
been entered for the system.
Set Supervisor Password
When the item "Set Supervisor Password" is highlighted, hit the <Enter> key. When
prompted, type the Supervisor's password in the dialogue box to set or to change
supervisor's password, which allows access to the BIOS.
Set User Password
When the item "Set User Password" is highlighted, hit the <Enter> key. When
prompted, type the user's password in the dialogue box to set or to change the
user's password, which allows access to the system at boot-up.
4-24
Chapter 4: BIOS
Password on Boot
This setting allows you to require a password to be entered when the system
boots up. The options are Enabled (password required) and Disabled (password
not required).
4-6 Boot
Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. See details on how to change the order and
specs of boot devices in the Item Specifi c Help window. All Boot BIOS settings are
described in this section.
Boot List
Candidate
List
Boot Priority Order/Excluded from Boot Orders
The devices included in the boot list section (above) are bootable devices listed in
the sequence of boot order as specifi ed. The boot functions for the devices included
in the candidate list (above) are currently disabled. Use a <+> key or a <-> key to
move the device up or down. Use the <f> key or the <r> key to specify the type of
an USB device, either fi xed or removable. You can select one item from the boot
list and hit the <x> key to remove it from the list of bootable devices (to make its
resource available for other bootable devices). Subsequently, you can select an
item from the candidate list and hit the <x> key to remove it from the candidate
list and put it in the boot list. This item will then become a bootable device. See
details on how to change the priority of boot order of devices in the "Item Specifi c
Help" window.
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X7DB8/X7DBE User's Manual
4-7 Exit
Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. All Exit BIOS settings are described in this
section.
Exit Saving Changes
Highlight this item and hit <Enter> to save any changes you made and to exit the
BIOS Setup utility.
Exit Discarding Changes
Highlight this item and hit <Enter> to exit the BIOS Setup utility without saving any
changes you may have made.
Load Setup Defaults
Highlight this item and hit <Enter> to load the default settings for all items in the
BIOS Setup. These are the safest settings to use.
Discard Changes
Highlight this item and hit <Enter> to discard (cancel) any changes you made.
You will remain in the Setup utility.
Save Changes
Highlight this item and hit <Enter> to save any changes you made. You will remain
in the Setup utility.
4-26
Appendix A: BIOS POST Messages
Appendix A
BIOS POST Messages
During the Power-On Self-Test (POST), the BIOS will check for problems. If a prob-
lem is found, the BIOS will activate an alarm or display a message. The following is
a list of such BIOS messages.
Failure Fixed Disk
Fixed disk is not working or not confi gured properly. Check to see if fi xed disk is
attached properly. Run Setup. Find out if the fi xed-disk type is correctly identifi ed.
Stuck key
Stuck key on keyboard.
Keyboard error
Keyboard not working.
Keyboard Controller Failed
Keyboard controller failed test. May require replacing keyboard controller.
Keyboard locked - Unlock key switch
Unlock the system to proceed.
Monitor type does not match CMOS - Run SETUP
Monitor type not correctly identifi ed in Setup
Shadow Ram Failed at offset: nnnn
Shadow RAM failed at offset nnnn of the 64k block at which the error
was detected.
System RAM Failed at offset: nnnn
System RAM failed at offset nnnn of in the 64k block at which the error
was detected.
Extended RAM Failed at offset: nnnn Extended memory not
working or not confi gured properly at offset nnnn.
System battery is dead - Replace and run SETUP
The CMOS clock battery indicator shows the battery is dead. Replace the
battery and run Setup to reconfi gure the system.
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X7DB8/X7DBE User's Manual
System CMOS checksum bad - Default confi guration used
System CMOS has been corrupted or modifi ed incorrectly, perhaps by an
application program that changes data stored in CMOS. The BIOS installed Default
Setup Values. If you do not want these values, enter Setup and enter your own
values. If the error persists, check the system battery or contact your dealer.
System timer error
The timer test failed. Requires repair of system board.
Real time clock error
Real-Time Clock fails BIOS hardware test. May require board repair.
Check date and time settings
BIOS found date or time out of range and reset the Real-Time Clock. May require
setting legal date (1991-2099).
Previous boot incomplete - Default confi guration used
Previous POST did not complete successfully. POST loads default values and
offers to run Setup. If the failure was caused by incorrect values and they are not
corrected, the next boot will likely fail. On systems with control of wait states,
improper Setup settings can also terminate POST and cause this error on the next
boot. Run Setup and verify that the waitstate confi guration is correct. This error is
cleared the next time the system is booted.
Memory Size found by POST differed from CMOS
Memory size found by POST differed from CMOS.
Diskette drive A error
Diskette drive B error
Drive A: or B: is present but fails the BIOS POST diskette tests. Check to see that
the drive is defi ned with the proper diskette type in Setup and that the diskette drive
is attached correctly.
Incorrect Drive A type - run SETUP
Type of fl oppy drive A: not correctly identifi ed in Setup.
Incorrect Drive B type - run SETUP
Type of fl oppy drive B: not correctly identifi ed in Setup.
A-2
Appendix A: BIOS POST Messages
System cache error - Cache disabled
RAM cache failed and BIOS disabled the cache. On older boards, check the cache
jumpers. You may have to replace the cache. See your dealer. A disabled cache
slows system performance considerably.
CPU ID:
CPU socket number for Multi-Processor error.
EISA CMOS not writeable
ServerBIOS2 test error: Cannot write to EISA CMOS.
DMA Test Failed
ServerBIOS2 test error: Cannot write to extended DMA (Direct Memory
Access) registers.
Software NMI Failed
ServerBIOS2 test error: Cannot generate software NMI (Non-Maskable
Interrupt).
Fail-Safe Timer NMI Failed
ServerBIOS2 test error: Fail-Safe Timer takes too long.
device Address Confl ict
Address confl ict for specifi ed device.
Allocation Error for: device
Run ISA or EISA Confi guration Utility to resolve resource confl ict for the
specifi ed device.
CD ROM Drive
CD ROM Drive identifi ed.
Entering SETUP ...
Starting Setup program
Failing Bits: nnnn
The hex number nnnn is a map of the bits at the RAM address which failed
the memory test. Each 1 (one) in the map indicates a failed bit. See errors
230, 231, or 232 above for offset address of the failure in System,
Extended, or Shadow memory.
A-3
X7DB8/X7DBE User's Manual
Fixed Disk n
Fixed disk n (0-3) identifi ed.
Invalid System Confi guration Data
Problem with NVRAM (CMOS) data.
I/O device IRQ confl ict
I/O device IRQ confl ict error.
PS/2 Mouse Boot Summary Screen:
PS/2 Mouse installed.
nnnn kB Extended RAM Passed
Where nnnn is the amount of RAM in kilobytes successfully tested.
nnnn Cache SRAM Passed
Where nnnn is the amount of system cache in kilobytes successfully tested.
nnnn kB Shadow RAM Passed
Where nnnn is the amount of shadow RAM in kilobytes successfully
tested.
nnnn kB System RAM Passed
Where nnnn is the amount of system RAM in kilobytes successfully tested.
One or more I2O Block Storage Devices were excluded from the Setup Boot
Menu
There was not enough room in the IPL table to display all installed I2O block-stor-
age devices.
Operating system not found
Operating system cannot be located on either drive A: or drive C:. Enter Setup and
see if fi xed disk and drive A: are properly identifi ed.
Parity Check 1 nnnn
Parity error found in the system bus. BIOS attempts to locate the address and
display it on the screen. If it cannot locate the address, it displays ????. Parity is
a method for checking errors in binary data. A parity error indicates that some data
has been corrupted.
A-4
Appendix A: BIOS POST Messages
Parity Check 2 nnnn
Parity error found in the I/O bus. BIOS attempts to locate the address and display it
on the screen. If it cannot locate the address, it displays ????.
Press <F1> to resume, <F2> to Setup, <F3> for previous
Displayed after any recoverable error message. Press <F1> to start the boot
process or <F2> to enter Setup and change the settings. Press <F3> to display the
previous screen (usually an initialization error of an Option ROM, i.e., an add-on
card). Write down and follow the information shown on the screen.
Press <F2> to enter Setup
Optional message displayed during POST. Can be turned off in Setup.
PS/2 Mouse:
PS/2 mouse identifi ed.
Run the I2O Confi guration Utility
One or more unclaimed block storage devices have the Confi guration Request bit
set in the LCT. Run an I2O Confi guration Utility (e.g. the SAC utility).
System BIOS shadowed
System BIOS copied to shadow RAM.
UMB upper limit segment address: nnnn
Displays the address nnnn of the upper limit of Upper Memory Blocks, indicat-
ing released segments of the BIOS which can be reclaimed by a virtual memory
manager.
Video BIOS shadowed
Video BIOS successfully copied to shadow RAM.
A-5
X7DB8/X7DBE User's Manual
Notes
A-6
Appendix B: BIOS POST Codes
Appendix B
BIOS POST Codes
This section lists the POST (Power On Self Test) codes for the PhoenixBIOS. POST
codes are divided into two categories: recoverable and terminal.
Recoverable POST Errors
When a recoverable type of error occurs during POST, the BIOS will display an
POST code that describes the problem. BIOS may also issue one of the follow-
ing beep codes:
1 long and two short beeps - video confi guration error
1 repetitive long beep - no memory detected
Terminal POST Errors
If a terminal type of error occurs, BIOS will shut down the system. Before doing
so, BIOS will write the error to port 80h, attempt to initialize video and write the
error in the top left corner of the screen. The following is a list of codes that may
be written to port 80h.
POST Code Description
01h IPMI Initialization
02h Verify Real Mode
03h Disable Non-Maskable Interrupt (NMI)
04h Get CPU type
06h Initialize system hardware
07h Disable shadow and execute code from the ROM.
08h Initialize chipset with initial POST values
09h Set IN POST fl ag
0Ah Initialize CPU registers
0Bh Enable CPU cache
0Ch Initialize caches to initial POST values
0Eh Initialize I/O component
0Fh Initialize the local bus IDE
10h Initialize Power Management
11h Load alternate registers with initial POST values
12h Restore CPU control word during warm boot
13h Reset PCI Bus Mastering devices
14h Initialize keyboard controller
16h 1-2-2-3 BIOS ROM checksum
17h Initialize cache before memory Auto size
B-1
X7DB8/X7DBE User's Manual
POST Code Description
18h 8254 timer initialization
1Ah 8237 DMA controller initialization
1Ch Reset Programmable Interrupt Controller
20h 1-3-1-1 Test DRAM refresh
22h 1-3-1-3 Test 8742 Keyboard Controller
24h Set ES segment register to 4 GB
28h Auto size DRAM
29h Initialize POST Memory Manager
2Ah Clear 512 kB base RAM
2Ch 1-3-4-1 RAM failure on address line xxxx*
2Eh 1-3-4-3 RAM failure on data bits xxxx* of low byte of
memory bus
2Fh Enable cache before system BIOS shadow
32h Test CPU bus-clock frequency
33h Initialize Phoenix Dispatch Manager
36h Warm start shut down
38h Shadow system BIOS ROM
3Ah Auto size cache
3Ch Advanced confi guration of chipset registers
3Dh Load alternate registers with CMOS values
41h Initialize extended memory for RomPilot (optional)
42h Initialize interrupt vectors
45h POST device initialization
46h 2-1-2-3 Check ROM copyright notice
48h Check video confi guration against CMOS
49h Initialize PCI bus and devices
4Ah Initialize all video adapters in system
4Bh QuietBoot start (optional)
4Ch Shadow video BIOS ROM
4Eh Display BIOS copyright notice
4Fh Initialize MultiBoot
50h Display CPU type and speed
51h Initialize EISA board (optional)
52h Test keyboard
54h Set key click if enabled
55h Enable USB devices
58h 2-2-3-1 Test for unexpected interrupts
59h Initialize POST display service
5Ah Display prompt “Press <ESC> to enter SETUP”
5Bh Disable CPU cache
B-2
Appendix B: BIOS POST Codes
POST Code Description
5Ch Test RAM between 512 and 640 kB
60h Test extended memory
62h Test extended memory address lines
64h Jump to UserPatch1
66h Confi gure advanced cache registers
67h Initialize Multi Processor APIC
68h Enable external and CPU caches
69h Setup System Management Mode (SMM) area
6Ah Display external L2 cache size
6Bh Load custom defaults (optional)
6Ch Display shadow-area message
70h Display error messages
72h Check for confi guration errors
76h Check for keyboard errors
7Ch Set up hardware interrupt vectors
7Dh Initialize Intelligent System Monitoring (optional)
7Eh Initialize coprocessor if present
80h Disable onboard Super I/O ports and IRQs (optional)
81h Late POST device initialization
82h Detect and install external RS232 ports
83h Confi gure non-MCD IDE controllers
84h Detect and install external parallel ports
85h Initialize PC-compatible PnP ISA devices
86h Re-initialize onboard I/O ports.
87h Confi gure Motherboard Confi gurable Devices
(optional)
88h Initialize BIOS Data Area
89h Enable Non-Maskable Interrupts (NMIs)
8Ah Initialize Extended BIOS Data Area
8Bh Test and initialize PS/2 mouse
8Ch Initialize fl oppy controller
8Fh Determine number of ATA drives (optional)
90h Initialize hard-disk controllers
91h Initialize local-bus hard-disk controllers
92h Jump to UserPatch2
93h Build MPTABLE for multi-processor boards
95h Install CD ROM for boot
96h Clear huge ES segment register
97h Fix up Multi Processor table
98h 1-2 Search for option ROMs and shadow if successful. One
long, two short beeps on checksum failure
B-3
X7DB8/X7DBE User's Manual
POST Code Description
99h Check for SMART Drive (optional)
9Ch Set up Power Management
9Dh Initialize security engine (optional)
9Eh Enable hardware interrupts
9Fh Determine number of ATA and SCSI drives
A0h Set time of day
A2h Check key lock
A4h Initialize typematic rate
A8h Erase <ESC> prompt
AAh Scan for <ESC> key stroke
ACh Enter SETUP
AEh Clear Boot fl ag
B0h Check for errors
B1h Inform RomPilot about the end of POST (optional)
B2h POST done - prepare to boot operating system
B4h 1 One short beep before boot
B5h Terminate QuietBoot (optional)
B6h Check password (optional)
B7h Initialize ACPI BIOS and PPM Structures
B9h Prepare Boot
BAh Initialize SMBIOS
BCh Clear parity checkers
BDh Display MultiBoot menu
BEh Clear screen (optional)
BFh Check virus and backup reminders
C0h Try to boot with INT 19
C1h Initialize POST Error Manager (PEM)
C2h Initialize error logging
C3h Initialize error display function
C4h Initialize system error fl ags
C6h Console redirection init.
C7h Unhook INT 10h if console redirection enabled
C8h Force check (optional)
C9h Extended ROM checksum (optional)
CDh Reclaim console redirection vector
B-4
Appendix B: BIOS POST Codes
POST Code Description
D2h Unknown interrupt
D4h Check Intel Branding string
D8h Alert Standard Format initialization
D9h Late init for IPMI
DEh Log error if micro-code not updated properly
The following are for boot block in Flash ROM
POST Code Description
E0h Initialize the chipset
E1h Initialize the bridge
E2h Initialize the CPU
E3h Initialize system timer
E4h Initialize system I/O
E5h Check force recovery boot
E6h Checksum BIOS ROM
E7h Go to BIOS
E8h Set Huge Segment
E9h Initialize Multi Processor
EAh Initialize OEM special code
EBh Initialize PIC and DMA
ECh Initialize Memory type
EDh Initialize Memory size
EEh Shadow Boot Block
EFh System memory test
F0h Initialize interrupt vectors
F1h Initialize Run Time Clock
F2h Initialize video
F3h Initialize System Management Manager
F4h Output one beep
F5h Clear Huge Segment
F6h Boot to Mini DOS
F7h Boot to Full DOS
* If the BIOS detects error 2C, 2E, or 30 (base 512K RAM error), it displays an addi-
tional word-bitmap (xxxx) indicating the address line or bits that failed. For example,
“2C 0002” means address line 1 (bit one set) has failed. “2E 1020" means data bits
12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. The BIOS also sends
the bitmap to the port-80 LED display. It fi rst displays the checkpoint code, followed
by a delay, the high-order byte, another delay, and then the loworder byte of the error.
It repeats this sequence continuously.
B-5
X7DB8/X7DBE User's Manual
Notes
B-6
Appendix C: The Intel HostRAID Setup Guidelines
Appendix C
The Intel HostRAID Setup Guidelines
After all the hardware has been installed, you must fi rst confi gure Intel's ESB2
SATA RAID* before you install the Windows Operating System and other software
drivers.
Important Notes to the User:
*Note 1: If you do not wish to confi gure onboard SATA RAID functions, please go
directly to Section C-3 for Operating System & Other Software Installation.
*Note 2: This chapter describes RAID Confi guration Instructions for the Intel ESB2
RAID Controller designed for the Windows OS.
C-1 Introduction to Serial ATA and Parallel ATA
To confi gure the SATA RAID functions, you must fi rst use the Intel ESB2 SATA
RAID Utility program to confi gure the RAID Level that you desire before installing
the Windows XP/2000/2003 operating system and other software drivers. (The
necessary drivers are all included on the Supermicro CD that came packaged with
your motherboard.) Note that the current version of the ESB2 SATA RAID Utility
can only support Windows XP/2000/2003 Operating Systems.
Serial ATA (SATA)
Serial ATA (SATA) is a physical storage interface that uses a single cable with a
minimum of four wires to create a point-to-point connection between devices. It is a
serial link, which supports transfer rates up to 3.0 Gbps. Because the serial cables
used in SATA are thinner than the traditional cables used in Parallel ATA (PATA),
SATA systems have better airfl ow and can be installed in smaller chassis than
Parallel ATA. In addition, the cables used in PATA are limited to a length of 40cm,
while Serial ATA cables can be up to one meter in length. Overall, SATA provides
better functionality than PATA.
Introduction to the Intel ESB2 Serial RAID
Located in the South Bridge of the 5000P (Blackford) chipset, the I/O Controller
Hub (ESB2) provides the I/O subsystem with access to the rest of the system. It
supports an 1-channel UltraATA/100 Bus Master IDE controller (PATA) and six Se-
rial ATA (SATA) ports. The ESB2 supports the following PATA and SATA device
confi gurations: Legacy mode and Native mode.
C-1
X7DB8/X7DBE User's Manual
The Intel HostRAID Confi gurations
The following types of Intel's HostRAID confi gurations are supported:
RAID 0 (Data Striping): this writes data in parallel, interleaved ("striped") sections
of two hard drives. Data transfer rate is doubled over using a single disk.
RAID1 (Data Mirroring): an identical data image from one drive is copied to another
drive. The second drive must be the same size or larger than the fi rst drive.
RAID 10 (Striping & Mirroring): RAID 0 and 1 schemes are combined (without parity
information) to get the benefi ts of both.
RAID 5: both data and parity information are striped and mirrored across three or
more hard drives.
The Intel Matrix Storage
The Intel Matrix Storage, supported by the ESB2, allows the user to create RAID
0, RAID 1, RAID 10 and RAID 5 sets by using only six identical hard disk drives.
The Intel Matrix Storage Technology creates two partitions on each hard disk
drive and generate a virtual RAID 0, RAID 1, RAID 10 and RAID 5 sets. It also
allows you the change the HDD partition size without any data.
Confi guring BIOS settings for SATA RAID Functions (Native Mode)
1. Press the <Del> key during system bootup to enter the BIOS Setup Utility.
Note: If it is the fi rst time powering on the system, we recommend you load the
Optimized Default Settings. If you have already done so, please skip to Step 3.
2. Use the arrow keys to select the "Exit" Settings. Once in the "Exit" settings,
Scroll down to select "Load Optimized Default Settings" and press the <Enter>
key. Select "OK" to confi rm the selection. Press the <Enter> key to load the default
settings for the BIOS.
3. Use the arrow keys to select the "Main" section in BIOS.
4. Scroll down to "SATA Controller Mode" and press the <Enter> key to select
"Enhanced"
5. Scroll down to "SATA RAID Enabled" and press <Enter>. Then, select "En-
abled."
6. Go to "Exit." Select "Exit Saving Changes" from the "Exit" menu. Press the
<Enter> key to save the changes and exit the BIOS.
7. Once you've exited the BIOS Utility, the system will re-boot.
8. During the system boot-up, press the <Ctrl> and <I> keys simultaneously to run
the Intel RAID Confi guration Utility when prompted by the following message: Press
<Ctrl> <I> for the Intel RAID Confi guration Utility.
C-2
Appendix C: The Intel HostRAID Setup Guidelines
Using the Intel ESB2 SATA RAID Utility Program
1. Creating, Deleting and Resetting RAID Volumes:
a. After the system exits from the BIOS Setup Utility, the system will automatically
reboot. The following screen appears after Power-On Self Test.
b. When you see the above screen, press the <Ctrl> and the <I> keys simultane-
ously to have the main menu of the SATA RAID Utility appear:
(*Note: All graphics and screen shots shown in the manual are for reference only. The screen shots shown in the manual do not imply Supernicro's
endorsement or non-endorsement on any 3rd party's product. Your screens
may or many not look exactly the same as the graphics shown in this
manual.)
C-3
X7DB8/X7DBE User's Manual
Creating a RAID 0 Volume:
a. Select "Create RAID Volume" from the main menu and press the <Enter> key.
The following screen will appear:
b. Specify a name for the RAID 0 set and press the <Tab> key or the <Enter> key
to go to the next fi eld. (You can use the <Esc> key to select the previous menu.)
c. When RAID Level item is highlighted, press the <Up Arrow>, <Down Arrow> keys
to select RAID 0 (Stripe) and hit <Enter>.
d. When the Disks item is highlighted, press <Enter> to select the HDD to confi gure
as RAID. The following pop-up screen (*See Note on Page C-3) displays:
e. Use the <Up Arrow>, <Down Arrow> keys to highlight a drive and press <Space>
to select it. A triangle appears to confi rm the selection of the drive.
f. Use the <Up Arrow>, <Down Arrow> keys to select the stripe size, ranged from
4 KB to 128 KB for the RAID 0 array, and hit <Enter>. (*Note: For a server, please
use a lower stripe size, and for a multimedia system, use a higher stripe size. The
default stripe size is 128 KB.)
g. Press <Enter> when the Create Volume item is highlighted. A warning message
displays.
h. When asked "Are you sure you want to create this volume (Y/N), press "Y" to
create the RAID volume, or type "N" to go back to the Create Volume menu.
C-4
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